Zephyr Project API 3.7.0
A Scalable Open Source RTOS
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irq_multilevel.h
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1/*
2 * Copyright (c) 2023 Meta
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
11#ifndef ZEPHYR_INCLUDE_IRQ_MULTILEVEL_H_
12#define ZEPHYR_INCLUDE_IRQ_MULTILEVEL_H_
13
14#ifndef _ASMLANGUAGE
15#include <zephyr/sys/__assert.h>
17#include <zephyr/types.h>
18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
23#if defined(CONFIG_MULTI_LEVEL_INTERRUPTS) || defined(__DOXYGEN__)
32static inline unsigned int irq_get_level(unsigned int irq)
33{
34 const uint32_t mask2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS) <<
35 CONFIG_1ST_LEVEL_INTERRUPT_BITS;
36 const uint32_t mask3 = BIT_MASK(CONFIG_3RD_LEVEL_INTERRUPT_BITS) <<
37 (CONFIG_1ST_LEVEL_INTERRUPT_BITS + CONFIG_2ND_LEVEL_INTERRUPT_BITS);
38
39 if (IS_ENABLED(CONFIG_3RD_LEVEL_INTERRUPTS) && (irq & mask3) != 0) {
40 return 3;
41 }
42
43 if (IS_ENABLED(CONFIG_2ND_LEVEL_INTERRUPTS) && (irq & mask2) != 0) {
44 return 2;
45 }
46
47 return 1;
48}
49
60static inline unsigned int irq_from_level_2(unsigned int irq)
61{
62 if (IS_ENABLED(CONFIG_3RD_LEVEL_INTERRUPTS)) {
63 return ((irq >> CONFIG_1ST_LEVEL_INTERRUPT_BITS) &
64 BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS)) - 1;
65 } else {
66 return (irq >> CONFIG_1ST_LEVEL_INTERRUPT_BITS) - 1;
67 }
68}
69
77#define IRQ_TO_L2(irq) ((irq + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS)
78
91static inline unsigned int irq_to_level_2(unsigned int irq)
92{
93 return IRQ_TO_L2(irq);
94}
95
106static inline unsigned int irq_parent_level_2(unsigned int irq)
107{
108 return irq & BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS);
109}
110
122static inline unsigned int irq_from_level_3(unsigned int irq)
123{
124 return (irq >> (CONFIG_1ST_LEVEL_INTERRUPT_BITS + CONFIG_2ND_LEVEL_INTERRUPT_BITS)) - 1;
125}
126
134#define IRQ_TO_L3(irq) \
135 ((irq + 1) << (CONFIG_1ST_LEVEL_INTERRUPT_BITS + CONFIG_2ND_LEVEL_INTERRUPT_BITS))
136
149static inline unsigned int irq_to_level_3(unsigned int irq)
150{
151 return IRQ_TO_L3(irq);
152}
153
164static inline unsigned int irq_parent_level_3(unsigned int irq)
165{
166 return (irq >> CONFIG_1ST_LEVEL_INTERRUPT_BITS) &
167 BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS);
168}
169
178static inline unsigned int irq_from_level(unsigned int irq, unsigned int level)
179{
180 if (level == 1) {
181 return irq;
182 } else if (level == 2) {
183 return irq_from_level_2(irq);
184 } else if (level == 3) {
185 return irq_from_level_3(irq);
186 }
187
188 /* level is higher than 3 */
189 __ASSERT_NO_MSG(false);
190 return irq;
191}
192
201static inline unsigned int irq_to_level(unsigned int irq, unsigned int level)
202{
203 if (level == 1) {
204 return irq;
205 } else if (level == 2) {
206 return irq_to_level_2(irq);
207 } else if (level == 3) {
208 return irq_to_level_3(irq);
209 }
210
211 /* level is higher than 3 */
212 __ASSERT_NO_MSG(false);
213 return irq;
214}
215
224static inline unsigned int irq_parent_level(unsigned int irq, unsigned int level)
225{
226 if (level == 1) {
227 /* doesn't really make sense, but return anyway */
228 return irq;
229 } else if (level == 2) {
230 return irq_parent_level_2(irq);
231 } else if (level == 3) {
232 return irq_parent_level_3(irq);
233 }
234
235 /* level is higher than 3 */
236 __ASSERT_NO_MSG(false);
237 return irq;
238}
239
247static inline unsigned int irq_get_intc_irq(unsigned int irq)
248{
249 const unsigned int level = irq_get_level(irq);
250
251 __ASSERT_NO_MSG(level > 1 && level <= 3);
252
253 return irq & BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS +
254 (level == 3 ? CONFIG_2ND_LEVEL_INTERRUPT_BITS : 0));
255}
256
257#endif /* CONFIG_MULTI_LEVEL_INTERRUPTS */
258#ifdef __cplusplus
259}
260#endif
261
262#endif /* _ASMLANGUAGE */
263#endif /* ZEPHYR_INCLUDE_IRQ_MULTILEVEL_H_ */
#define IS_ENABLED(config_macro)
Check for macro definition in compiler-visible expressions.
Definition util_macro.h:124
#define BIT_MASK(n)
Bit mask with bits 0 through n-1 (inclusive) set, or 0 if n is 0.
Definition util_macro.h:68
static unsigned int irq_from_level(unsigned int irq, unsigned int level)
Return the interrupt number for a given level.
Definition irq_multilevel.h:178
#define IRQ_TO_L3(irq)
Preprocessor macro to convert irq from level 1 to level 3 format.
Definition irq_multilevel.h:134
static unsigned int irq_to_level_3(unsigned int irq)
Converts irq from level 1 to level 3 format.
Definition irq_multilevel.h:149
static unsigned int irq_from_level_3(unsigned int irq)
Return the 3rd level interrupt number.
Definition irq_multilevel.h:122
static unsigned int irq_from_level_2(unsigned int irq)
Return the 2nd level interrupt number.
Definition irq_multilevel.h:60
static unsigned int irq_get_level(unsigned int irq)
Return IRQ level This routine returns the interrupt level number of the provided interrupt.
Definition irq_multilevel.h:32
static unsigned int irq_to_level_2(unsigned int irq)
Converts irq from level 1 to level 2 format.
Definition irq_multilevel.h:91
static unsigned int irq_parent_level(unsigned int irq, unsigned int level)
Returns the parent IRQ of the given level raw IRQ number.
Definition irq_multilevel.h:224
#define IRQ_TO_L2(irq)
Preprocessor macro to convert irq from level 1 to level 2 format.
Definition irq_multilevel.h:77
static unsigned int irq_get_intc_irq(unsigned int irq)
Returns the parent interrupt controller IRQ of the given IRQ number.
Definition irq_multilevel.h:247
static unsigned int irq_parent_level_2(unsigned int irq)
Returns the parent IRQ of the level 2 raw IRQ number.
Definition irq_multilevel.h:106
static unsigned int irq_parent_level_3(unsigned int irq)
Returns the parent IRQ of the level 3 raw IRQ number.
Definition irq_multilevel.h:164
static unsigned int irq_to_level(unsigned int irq, unsigned int level)
Converts irq from level 1 to a given level.
Definition irq_multilevel.h:201
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
Macro utilities.