Zephyr Project API
4.4.99
A Scalable Open Source RTOS
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ite-intc.h
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/*
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* Copyright (c) 2020 ITE Corporation. All Rights Reserved.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_ITE_INTC_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_ITE_INTC_H_
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#define IRQ_TYPE_NONE 0
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#define IRQ_TYPE_EDGE_RISING 1
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#define IRQ_TYPE_EDGE_FALLING 2
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#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
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#define IRQ_TYPE_LEVEL_HIGH 4
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#define IRQ_TYPE_LEVEL_LOW 8
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/* IRQ numbers of WUC */
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/* Group 0 of INTC */
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#define IT8XXX2_IRQ_WU20 1
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#define IT8XXX2_IRQ_KBC_OBE 2
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#define IT8XXX2_IRQ_SMB_D 4
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#define IT8XXX2_IRQ_WKINTD 5
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#define IT8XXX2_IRQ_WU23 6
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/* Group 1 */
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#define IT8XXX2_IRQ_SMB_A 9
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#define IT8XXX2_IRQ_SMB_B 10
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#define IT8XXX2_IRQ_WU26 12
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#define IT8XXX2_IRQ_WKINTC 13
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#define IT8XXX2_IRQ_WU25 14
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/* Group 2 */
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#define IT8XXX2_IRQ_SMB_C 16
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#define IT8XXX2_IRQ_WU24 17
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#define IT8XXX2_IRQ_WU22 21
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#define IT8XXX2_IRQ_USB 23
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/* Group 3 */
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#define IT8XXX2_IRQ_KBC_IBF 24
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#define IT8XXX2_IRQ_PMC1_IBF 25
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#define IT8XXX2_IRQ_PMC2_IBF 27
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#define IT8XXX2_IRQ_TIMER1 30
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#define IT8XXX2_IRQ_WU21 31
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/* Group 5 */
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#define IT8XXX2_IRQ_WU50 40
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#define IT8XXX2_IRQ_WU51 41
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#define IT8XXX2_IRQ_WU52 42
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#define IT8XXX2_IRQ_WU53 43
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#define IT8XXX2_IRQ_WU54 44
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#define IT8XXX2_IRQ_WU55 45
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#define IT8XXX2_IRQ_WU56 46
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#define IT8XXX2_IRQ_WU57 47
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/* Group 6 */
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#define IT8XXX2_IRQ_WU60 48
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#define IT8XXX2_IRQ_WU61 49
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#define IT8XXX2_IRQ_WU62 50
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#define IT8XXX2_IRQ_WU63 51
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#define IT8XXX2_IRQ_WU64 52
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#define IT8XXX2_IRQ_WU65 53
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#define IT8XXX2_IRQ_WU66 54
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#define IT8XXX2_IRQ_WU67 55
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/* Group 7 */
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#define IT8XXX2_IRQ_RTCT_ALARM1 56
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#define IT8XXX2_IRQ_RTCT_ALARM2 57
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#define IT8XXX2_IRQ_TIMER2 58
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/* Group 8 */
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#define IT8XXX2_IRQ_PMC3_IBF 67
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#define IT8XXX2_IRQ_PMC4_IBF 69
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/* Group 9 */
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#define IT8XXX2_IRQ_WU70 72
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#define IT8XXX2_IRQ_WU71 73
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#define IT8XXX2_IRQ_WU72 74
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#define IT8XXX2_IRQ_WU73 75
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#define IT8XXX2_IRQ_WU74 76
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#define IT8XXX2_IRQ_WU75 77
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#define IT8XXX2_IRQ_WU76 78
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#define IT8XXX2_IRQ_WU77 79
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/* Group 10 */
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#define IT8XXX2_IRQ_TIMER8 80
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#define IT8XXX2_IRQ_WU88 85
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#define IT8XXX2_IRQ_WU89 86
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#define IT8XXX2_IRQ_WU90 87
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/* Group 11 */
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#define IT8XXX2_IRQ_WU80 88
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#define IT8XXX2_IRQ_WU81 89
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#define IT8XXX2_IRQ_WU82 90
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#define IT8XXX2_IRQ_WU83 91
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#define IT8XXX2_IRQ_WU84 92
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#define IT8XXX2_IRQ_WU85 93
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#define IT8XXX2_IRQ_WU86 94
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#define IT8XXX2_IRQ_WU87 95
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/* Group 12 */
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#define IT8XXX2_IRQ_WU91 96
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#define IT8XXX2_IRQ_WU92 97
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#define IT8XXX2_IRQ_WU93 98
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#define IT8XXX2_IRQ_WU94 99
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#define IT8XXX2_IRQ_WU95 100
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#define IT8XXX2_IRQ_WU96 101
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#define IT8XXX2_IRQ_WU97 102
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#define IT8XXX2_IRQ_WU98 103
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/* Group 13 */
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#define IT8XXX2_IRQ_WU99 104
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#define IT8XXX2_IRQ_WU100 105
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#define IT8XXX2_IRQ_WU101 106
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#define IT8XXX2_IRQ_WU102 107
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#define IT8XXX2_IRQ_WU103 108
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#define IT8XXX2_IRQ_WU104 109
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#define IT8XXX2_IRQ_WU105 110
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#define IT8XXX2_IRQ_WU106 111
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/* Group 14 */
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#define IT8XXX2_IRQ_WU107 112
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#define IT8XXX2_IRQ_WU108 113
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#define IT8XXX2_IRQ_WU109 114
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#define IT8XXX2_IRQ_WU110 115
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#define IT8XXX2_IRQ_WU111 116
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#define IT8XXX2_IRQ_WU112 117
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#define IT8XXX2_IRQ_WU113 118
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#define IT8XXX2_IRQ_WU114 119
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/* Group 15 */
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#define IT8XXX2_IRQ_WU115 120
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#define IT8XXX2_IRQ_WU116 121
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#define IT8XXX2_IRQ_WU117 122
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#define IT8XXX2_IRQ_WU118 123
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#define IT8XXX2_IRQ_WU119 124
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#define IT8XXX2_IRQ_WU120 125
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#define IT8XXX2_IRQ_WU121 126
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#define IT8XXX2_IRQ_WU122 127
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/* Group 16 */
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#define IT8XXX2_IRQ_WU128 128
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#define IT8XXX2_IRQ_WU129 129
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#define IT8XXX2_IRQ_WU130 130
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#define IT8XXX2_IRQ_WU131 131
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#define IT8XXX2_IRQ_WU132 132
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#define IT8XXX2_IRQ_WU133 133
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#define IT8XXX2_IRQ_WU134 134
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#define IT8XXX2_IRQ_WU135 135
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/* Group 17 */
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#define IT8XXX2_IRQ_WU136 136
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#define IT8XXX2_IRQ_WU137 137
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#define IT8XXX2_IRQ_WU138 138
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#define IT8XXX2_IRQ_WU139 139
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#define IT8XXX2_IRQ_WU140 140
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#define IT8XXX2_IRQ_WU141 141
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#define IT8XXX2_IRQ_WU142 142
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#define IT8XXX2_IRQ_WU143 143
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/* Group 18 */
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#define IT8XXX2_IRQ_WU123 144
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#define IT8XXX2_IRQ_WU124 145
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#define IT8XXX2_IRQ_WU125 146
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#define IT8XXX2_IRQ_WU126 147
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#define IT8XXX2_IRQ_PMC5_IBF 150
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#define IT8XXX2_IRQ_V_CMP 151
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/* Group 19 */
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#define IT8XXX2_IRQ_SMB_E 152
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#define IT8XXX2_IRQ_SMB_F 153
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#define IT8XXX2_IRQ_TIMER3 155
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#define IT8XXX2_IRQ_TIMER4 156
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#define IT8XXX2_IRQ_TIMER5 157
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#define IT8XXX2_IRQ_TIMER6 158
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#define IT8XXX2_IRQ_TIMER7 159
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/* Group 20 */
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#define IT8XXX2_IRQ_ESPI 162
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#define IT8XXX2_IRQ_ESPI_VW 163
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#define IT8XXX2_IRQ_PCH_P80 164
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#define IT8XXX2_IRQ_USBPD0 165
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#define IT8XXX2_IRQ_USBPD1 166
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/* Group 21 */
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#define IT8XXX2_IRQ_USBPD2 174
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/* Group 22 */
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#define IT8XXX2_IRQ_WU40 176
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#define IT8XXX2_IRQ_WU45 177
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#define IT8XXX2_IRQ_WU46 178
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#define IT8XXX2_IRQ_WU144 179
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#define IT8XXX2_IRQ_WU145 180
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#define IT8XXX2_IRQ_WU146 181
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#define IT8XXX2_IRQ_WU147 182
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#define IT8XXX2_IRQ_WU148 183
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/* Group 23 */
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#define IT8XXX2_IRQ_WU149 184
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#define IT8XXX2_IRQ_WU150 185
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/* Group 27 */
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#define IT8XXX2_IRQ_WU184 216
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#define IT8XXX2_IRQ_WU185 217
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#define IT8XXX2_IRQ_WU186 218
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#define IT8XXX2_IRQ_WU188 220
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#define IT8XXX2_IRQ_COUNT (CONFIG_NUM_IRQS + 1)
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#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_ITE_INTC_H_ */
include
zephyr
dt-bindings
interrupt-controller
ite-intc.h
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