8#ifndef ZEPHYR_INCLUDE_ARCH_ARM_MMU_ARM_MMU_H_
9#define ZEPHYR_INCLUDE_ARCH_ARM_MMU_ARM_MMU_H_
32#define MT_STRONGLY_ORDERED BIT(0)
33#define MT_DEVICE BIT(1)
34#define MT_NORMAL BIT(2)
40#define MPERM_UNPRIVILEGED BIT(6)
42#define MATTR_NON_SECURE BIT(7)
43#define MATTR_NON_GLOBAL BIT(8)
44#define MATTR_SHARED BIT(9)
45#define MATTR_CACHE_OUTER_WB_WA BIT(10)
46#define MATTR_CACHE_OUTER_WT_nWA BIT(11)
47#define MATTR_CACHE_OUTER_WB_nWA BIT(12)
48#define MATTR_CACHE_INNER_WB_WA BIT(13)
49#define MATTR_CACHE_INNER_WT_nWA BIT(14)
50#define MATTR_CACHE_INNER_WB_nWA BIT(15)
52#define MATTR_MAY_MAP_L1_SECTION BIT(16)
62#define MMU_REGION_ENTRY(_name, _base_pa, _base_va, _size, _attrs) \
65 .base_pa = _base_pa, \
66 .base_va = _base_va, \
71#define MMU_REGION_FLAT_ENTRY(name, adr, sz, attrs) \
72 MMU_REGION_ENTRY(name, adr, adr, sz, attrs)
90#define MMU_REGION_DT_FLAT_ENTRY(node_id, attrs) \
91 MMU_REGION_FLAT_ENTRY(DT_NODE_FULL_NAME(node_id), \
92 DT_REG_ADDR(node_id), \
93 DT_REG_SIZE(node_id), \
109#define MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY(compat, attr) \
110 DT_FOREACH_STATUS_OKAY_VARGS(compat, \
111 MMU_REGION_DT_FLAT_ENTRY, attr)
144int z_arm_mmu_init(
bool is_primary_core);
const struct arm_mmu_config mmu_config
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINTPTR_TYPE__ uintptr_t
Definition stdint.h:105
const struct arm_mmu_region * mmu_regions
Definition arm_mmu.h:132
uint32_t num_regions
Definition arm_mmu.h:130
uintptr_t base_va
Definition arm_mmu.h:118
size_t size
Definition arm_mmu.h:120
uintptr_t base_pa
Definition arm_mmu.h:116
const char * name
Definition arm_mmu.h:122
uint32_t attrs
Definition arm_mmu.h:124