Zephyr Project API 3.7.0
A Scalable Open Source RTOS
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nrf_clock_control.h
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1/*
2 * Copyright (c) 2016 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NRF_CLOCK_CONTROL_H_
8#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NRF_CLOCK_CONTROL_H_
9
10#include <zephyr/device.h>
11#include <hal/nrf_clock.h>
12#include <zephyr/sys/onoff.h>
14
15#ifdef __cplusplus
16extern "C" {
17#endif
18
26#if NRF_CLOCK_HAS_HFCLK192M
27 CLOCK_CONTROL_NRF_TYPE_HFCLK192M,
28#endif
29#if NRF_CLOCK_HAS_HFCLKAUDIO
30 CLOCK_CONTROL_NRF_TYPE_HFCLKAUDIO,
31#endif
33};
34
35/* Define can be used with clock control API instead of enum directly to
36 * increase code readability.
37 */
38#define CLOCK_CONTROL_NRF_SUBSYS_HF \
39 ((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_HFCLK)
40#define CLOCK_CONTROL_NRF_SUBSYS_LF \
41 ((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_LFCLK)
42#define CLOCK_CONTROL_NRF_SUBSYS_HF192M \
43 ((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_HFCLK192M)
44#define CLOCK_CONTROL_NRF_SUBSYS_HFAUDIO \
45 ((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_HFCLKAUDIO)
46
53
54/* Define 32KHz clock source */
55#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC
56#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_RC
57#endif
58#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL
59#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_XTAL
60#endif
61#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH
62#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_SYNTH
63#endif
64#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_LOW_SWING
65#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_XTAL_LOW_SWING
66#endif
67#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_FULL_SWING
68#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_XTAL_FULL_SWING
69#endif
70
71/* Define 32KHz clock accuracy */
72#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM
73#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 0
74#endif
75#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM
76#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 1
77#endif
78#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_150PPM
79#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 2
80#endif
81#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_100PPM
82#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 3
83#endif
84#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_75PPM
85#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 4
86#endif
87#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_50PPM
88#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 5
89#endif
90#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_30PPM
91#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 6
92#endif
93#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_20PPM
94#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 7
95#endif
96
98void z_nrf_clock_calibration_force_start(void);
99
106int z_nrf_clock_calibration_count(void);
107
114int z_nrf_clock_calibration_skips_count(void);
115
122struct onoff_manager *z_nrf_clock_control_get_onoff(clock_control_subsys_t sys);
123
132void z_nrf_clock_control_lf_on(enum nrf_lfclk_start_mode start_mode);
133
146void z_nrf_clock_bt_ctlr_hf_request(void);
147
152void z_nrf_clock_bt_ctlr_hf_release(void);
153
154#ifdef __cplusplus
155}
156#endif
157
158#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NRF_CLOCK_CONTROL_H_ */
Public Clock Control APIs.
void * clock_control_subsys_t
clock_control_subsys_t is a type to identify a clock controller sub-system.
Definition clock_control.h:58
nrf_lfclk_start_mode
LF clock start modes.
Definition nrf_clock_control.h:48
@ CLOCK_CONTROL_NRF_LF_START_AVAILABLE
Definition nrf_clock_control.h:50
@ CLOCK_CONTROL_NRF_LF_START_STABLE
Definition nrf_clock_control.h:51
@ CLOCK_CONTROL_NRF_LF_START_NOWAIT
Definition nrf_clock_control.h:49
clock_control_nrf_type
Clocks handled by the CLOCK peripheral.
Definition nrf_clock_control.h:23
@ CLOCK_CONTROL_NRF_TYPE_COUNT
Definition nrf_clock_control.h:32
@ CLOCK_CONTROL_NRF_TYPE_HFCLK
Definition nrf_clock_control.h:24
@ CLOCK_CONTROL_NRF_TYPE_LFCLK
Definition nrf_clock_control.h:25
State associated with an on-off manager.
Definition onoff.h:154