Zephyr Project API 4.4.99
A Scalable Open Source RTOS
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numaker_m46x_reset.h
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1/*
2 * Copyright (c) 2023 Nuvoton Technology Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
12
13#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_RESET_NUMAKER_M46X_RESET_H
14#define ZEPHYR_INCLUDE_DT_BINDINGS_RESET_NUMAKER_M46X_RESET_H
15
20
32
34
40
41/* Beginning of M460 BSP sys_reg.h reset module copy */
42
43#define NUMAKER_SYS_IPRST0_PDMA0RST_Pos (2)
44
45#define NUMAKER_SYS_IPRST0_EBIRST_Pos (3)
46
47#define NUMAKER_SYS_IPRST0_EMAC0RST_Pos (5)
48
49#define NUMAKER_SYS_IPRST0_SDH0RST_Pos (6)
50
51#define NUMAKER_SYS_IPRST0_CRCRST_Pos (7)
52
53#define NUMAKER_SYS_IPRST0_CCAPRST_Pos (8)
54
55#define NUMAKER_SYS_IPRST0_HSUSBDRST_Pos (10)
56
57#define NUMAKER_SYS_IPRST0_HBIRST_Pos (11)
58
59#define NUMAKER_SYS_IPRST0_CRPTRST_Pos (12)
60
61#define NUMAKER_SYS_IPRST0_KSRST_Pos (13)
62
63#define NUMAKER_SYS_IPRST0_SPIMRST_Pos (14)
64
65#define NUMAKER_SYS_IPRST0_HSUSBHRST_Pos (16)
66
67#define NUMAKER_SYS_IPRST0_SDH1RST_Pos (17)
68
69#define NUMAKER_SYS_IPRST0_PDMA1RST_Pos (18)
70
71#define NUMAKER_SYS_IPRST0_CANFD0RST_Pos (20)
72
73#define NUMAKER_SYS_IPRST0_CANFD1RST_Pos (21)
74
75#define NUMAKER_SYS_IPRST0_CANFD2RST_Pos (22)
76
77#define NUMAKER_SYS_IPRST0_CANFD3RST_Pos (23)
78
79#define NUMAKER_SYS_IPRST0_BMCRST_Pos (28)
80
81#define NUMAKER_SYS_IPRST1_GPIORST_Pos (1)
82
83#define NUMAKER_SYS_IPRST1_TMR0RST_Pos (2)
84
85#define NUMAKER_SYS_IPRST1_TMR1RST_Pos (3)
86
87#define NUMAKER_SYS_IPRST1_TMR2RST_Pos (4)
88
89#define NUMAKER_SYS_IPRST1_TMR3RST_Pos (5)
90
91#define NUMAKER_SYS_IPRST1_ACMP01RST_Pos (7)
92
93#define NUMAKER_SYS_IPRST1_I2C0RST_Pos (8)
94
95#define NUMAKER_SYS_IPRST1_I2C1RST_Pos (9)
96
97#define NUMAKER_SYS_IPRST1_I2C2RST_Pos (10)
98
99#define NUMAKER_SYS_IPRST1_I2C3RST_Pos (11)
100
101#define NUMAKER_SYS_IPRST1_QSPI0RST_Pos (12)
102
103#define NUMAKER_SYS_IPRST1_SPI0RST_Pos (13)
104
105#define NUMAKER_SYS_IPRST1_SPI1RST_Pos (14)
106
107#define NUMAKER_SYS_IPRST1_SPI2RST_Pos (15)
108
109#define NUMAKER_SYS_IPRST1_UART0RST_Pos (16)
110
111#define NUMAKER_SYS_IPRST1_UART1RST_Pos (17)
112
113#define NUMAKER_SYS_IPRST1_UART2RST_Pos (18)
114
115#define NUMAKER_SYS_IPRST1_UART3RST_Pos (19)
116
117#define NUMAKER_SYS_IPRST1_UART4RST_Pos (20)
118
119#define NUMAKER_SYS_IPRST1_UART5RST_Pos (21)
120
121#define NUMAKER_SYS_IPRST1_UART6RST_Pos (22)
122
123#define NUMAKER_SYS_IPRST1_UART7RST_Pos (23)
124
125#define NUMAKER_SYS_IPRST1_OTGRST_Pos (26)
126
127#define NUMAKER_SYS_IPRST1_USBDRST_Pos (27)
128
129#define NUMAKER_SYS_IPRST1_EADC0RST_Pos (28)
130
131#define NUMAKER_SYS_IPRST1_I2S0RST_Pos (29)
132
133#define NUMAKER_SYS_IPRST1_HSOTGRST_Pos (30)
134
135#define NUMAKER_SYS_IPRST1_TRNGRST_Pos (31)
136
137#define NUMAKER_SYS_IPRST2_SC0RST_Pos (0)
138
139#define NUMAKER_SYS_IPRST2_SC1RST_Pos (1)
140
141#define NUMAKER_SYS_IPRST2_SC2RST_Pos (2)
142
143#define NUMAKER_SYS_IPRST2_I2C4RST_Pos (3)
144
145#define NUMAKER_SYS_IPRST2_QSPI1RST_Pos (4)
146
147#define NUMAKER_SYS_IPRST2_SPI3RST_Pos (6)
148
149#define NUMAKER_SYS_IPRST2_SPI4RST_Pos (7)
150
151#define NUMAKER_SYS_IPRST2_USCI0RST_Pos (8)
152
153#define NUMAKER_SYS_IPRST2_PSIORST_Pos (10)
154
155#define NUMAKER_SYS_IPRST2_DACRST_Pos (12)
156
157#define NUMAKER_SYS_IPRST2_ECAP2RST_Pos (13)
158
159#define NUMAKER_SYS_IPRST2_ECAP3RST_Pos (14)
160
161#define NUMAKER_SYS_IPRST2_EPWM0RST_Pos (16)
162
163#define NUMAKER_SYS_IPRST2_EPWM1RST_Pos (17)
164
165#define NUMAKER_SYS_IPRST2_BPWM0RST_Pos (18)
166
167#define NUMAKER_SYS_IPRST2_BPWM1RST_Pos (19)
168
169#define NUMAKER_SYS_IPRST2_EQEI2RST_Pos (20)
170
171#define NUMAKER_SYS_IPRST2_EQEI3RST_Pos (21)
172
173#define NUMAKER_SYS_IPRST2_EQEI0RST_Pos (22)
174
175#define NUMAKER_SYS_IPRST2_EQEI1RST_Pos (23)
176
177#define NUMAKER_SYS_IPRST2_ECAP0RST_Pos (26)
178
179#define NUMAKER_SYS_IPRST2_ECAP1RST_Pos (27)
180
181#define NUMAKER_SYS_IPRST2_I2S1RST_Pos (29)
182
183#define NUMAKER_SYS_IPRST2_EADC1RST_Pos (31)
184
185#define NUMAKER_SYS_IPRST3_KPIRST_Pos (0)
186
187#define NUMAKER_SYS_IPRST3_EADC2RST_Pos (6)
188
189#define NUMAKER_SYS_IPRST3_ACMP23RST_Pos (7)
190
191#define NUMAKER_SYS_IPRST3_SPI5RST_Pos (8)
192
193#define NUMAKER_SYS_IPRST3_SPI6RST_Pos (9)
194
195#define NUMAKER_SYS_IPRST3_SPI7RST_Pos (10)
196
197#define NUMAKER_SYS_IPRST3_SPI8RST_Pos (11)
198
199#define NUMAKER_SYS_IPRST3_SPI9RST_Pos (12)
200
201#define NUMAKER_SYS_IPRST3_SPI10RST_Pos (13)
202
203#define NUMAKER_SYS_IPRST3_UART8RST_Pos (16)
204
205#define NUMAKER_SYS_IPRST3_UART9RST_Pos (17)
206
207/* End of M460 BSP sys_reg.h reset module copy */
208
209/* Beginning of M460 BSP sys.h reset module copy */
210
211/*---------------------------------------------------------------------
212 * Module Reset Control Resister constant definitions.
213 *---------------------------------------------------------------------
214 */
215#define NUMAKER_PDMA0_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_PDMA0RST_Pos)
216#define NUMAKER_EBI_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_EBIRST_Pos)
217#define NUMAKER_EMAC0_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_EMAC0RST_Pos)
218#define NUMAKER_SDH0_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_SDH0RST_Pos)
219#define NUMAKER_CRC_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_CRCRST_Pos)
220#define NUMAKER_CCAP_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_CCAPRST_Pos)
221#define NUMAKER_HSUSBD_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_HSUSBDRST_Pos)
222#define NUMAKER_HBI_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_HBIRST_Pos)
223#define NUMAKER_CRPT_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_CRPTRST_Pos)
224#define NUMAKER_KS_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_KSRST_Pos)
225#define NUMAKER_SPIM_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_SPIMRST_Pos)
226#define NUMAKER_HSUSBH_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_HSUSBHRST_Pos)
227#define NUMAKER_SDH1_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_SDH1RST_Pos)
228#define NUMAKER_PDMA1_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_PDMA1RST_Pos)
229#define NUMAKER_CANFD0_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_CANFD0RST_Pos)
230#define NUMAKER_CANFD1_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_CANFD1RST_Pos)
231#define NUMAKER_CANFD2_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_CANFD2RST_Pos)
232#define NUMAKER_CANFD3_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_CANFD3RST_Pos)
233
234#define NUMAKER_GPIO_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_GPIORST_Pos)
235#define NUMAKER_TMR0_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_TMR0RST_Pos)
236#define NUMAKER_TMR1_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_TMR1RST_Pos)
237#define NUMAKER_TMR2_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_TMR2RST_Pos)
238#define NUMAKER_TMR3_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_TMR3RST_Pos)
239#define NUMAKER_ACMP01_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_ACMP01RST_Pos)
240#define NUMAKER_I2C0_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_I2C0RST_Pos)
241#define NUMAKER_I2C1_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_I2C1RST_Pos)
242#define NUMAKER_I2C2_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_I2C2RST_Pos)
243#define NUMAKER_I2C3_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_I2C3RST_Pos)
244#define NUMAKER_QSPI0_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_QSPI0RST_Pos)
245#define NUMAKER_SPI0_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_SPI0RST_Pos)
246#define NUMAKER_SPI1_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_SPI1RST_Pos)
247#define NUMAKER_SPI2_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_SPI2RST_Pos)
248#define NUMAKER_UART0_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_UART0RST_Pos)
249#define NUMAKER_UART1_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_UART1RST_Pos)
250#define NUMAKER_UART2_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_UART2RST_Pos)
251#define NUMAKER_UART3_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_UART3RST_Pos)
252#define NUMAKER_UART4_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_UART4RST_Pos)
253#define NUMAKER_UART5_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_UART5RST_Pos)
254#define NUMAKER_UART6_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_UART6RST_Pos)
255#define NUMAKER_UART7_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_UART7RST_Pos)
256#define NUMAKER_OTG_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_OTGRST_Pos)
257#define NUMAKER_USBD_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_USBDRST_Pos)
258#define NUMAKER_EADC0_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_EADC0RST_Pos)
259#define NUMAKER_I2S0_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_I2S0RST_Pos)
260#define NUMAKER_HSOTG_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_HSOTGRST_Pos)
261#define NUMAKER_TRNG_RST ((4UL << 24) | NUMAKER_SYS_IPRST1_TRNGRST_Pos)
262
263#define NUMAKER_SC0_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_SC0RST_Pos)
264#define NUMAKER_SC1_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_SC1RST_Pos)
265#define NUMAKER_SC2_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_SC2RST_Pos)
266#define NUMAKER_I2C4_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_I2C4RST_Pos)
267#define NUMAKER_QSPI1_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_QSPI1RST_Pos)
268#define NUMAKER_SPI3_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_SPI3RST_Pos)
269#define NUMAKER_SPI4_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_SPI4RST_Pos)
270#define NUMAKER_USCI0_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_USCI0RST_Pos)
271#define NUMAKER_PSIO_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_PSIORST_Pos)
272#define NUMAKER_DAC_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_DACRST_Pos)
273#define NUMAKER_EPWM0_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_EPWM0RST_Pos)
274#define NUMAKER_EPWM1_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_EPWM1RST_Pos)
275#define NUMAKER_BPWM0_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_BPWM0RST_Pos)
276#define NUMAKER_BPWM1_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_BPWM1RST_Pos)
277#define NUMAKER_EQEI0_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_EQEI0RST_Pos)
278#define NUMAKER_EQEI1_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_EQEI1RST_Pos)
279#define NUMAKER_EQEI2_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_EQEI2RST_Pos)
280#define NUMAKER_EQEI3_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_EQEI3RST_Pos)
281#define NUMAKER_ECAP0_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_ECAP0RST_Pos)
282#define NUMAKER_ECAP1_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_ECAP1RST_Pos)
283#define NUMAKER_ECAP2_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_ECAP2RST_Pos)
284#define NUMAKER_ECAP3_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_ECAP3RST_Pos)
285#define NUMAKER_I2S1_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_I2S1RST_Pos)
286#define NUMAKER_EADC1_RST ((8UL << 24) | NUMAKER_SYS_IPRST2_EADC1RST_Pos)
287
288#define NUMAKER_KPI_RST ((0x18UL << 24) | NUMAKER_SYS_IPRST3_KPIRST_Pos)
289#define NUMAKER_EADC2_RST ((0x18UL << 24) | NUMAKER_SYS_IPRST3_EADC2RST_Pos)
290#define NUMAKER_ACMP23_RST ((0x18UL << 24) | NUMAKER_SYS_IPRST3_ACMP23RST_Pos)
291#define NUMAKER_SPI5_RST ((0x18UL << 24) | NUMAKER_SYS_IPRST3_SPI5RST_Pos)
292#define NUMAKER_SPI6_RST ((0x18UL << 24) | NUMAKER_SYS_IPRST3_SPI6RST_Pos)
293#define NUMAKER_SPI7_RST ((0x18UL << 24) | NUMAKER_SYS_IPRST3_SPI7RST_Pos)
294#define NUMAKER_SPI8_RST ((0x18UL << 24) | NUMAKER_SYS_IPRST3_SPI8RST_Pos)
295#define NUMAKER_SPI9_RST ((0x18UL << 24) | NUMAKER_SYS_IPRST3_SPI9RST_Pos)
296#define NUMAKER_SPI10_RST ((0x18UL << 24) | NUMAKER_SYS_IPRST3_SPI10RST_Pos)
297#define NUMAKER_UART8_RST ((0x18UL << 24) | NUMAKER_SYS_IPRST3_UART8RST_Pos)
298#define NUMAKER_UART9_RST ((0x18UL << 24) | NUMAKER_SYS_IPRST3_UART9RST_Pos)
299
300/* End of M460 BSP sys.h reset module copy */
301
303
305
307
309
310#endif