Zephyr Project API 3.7.0
A Scalable Open Source RTOS
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peci.h
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1/*
2 * Copyright (c) 2020 Intel Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
12#ifndef ZEPHYR_INCLUDE_DRIVERS_PECI_H_
13#define ZEPHYR_INCLUDE_DRIVERS_PECI_H_
14
24#include <errno.h>
25#include <zephyr/types.h>
26#include <stddef.h>
27#include <zephyr/device.h>
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
41
67
72#define PECI_CC_RSP_SUCCESS (0x40U)
73#define PECI_CC_RSP_TIMEOUT (0x80U)
74#define PECI_CC_OUT_OF_RESOURCES_TIMEOUT (0x81U)
75#define PECI_CC_RESOURCES_LOWPWR_TIMEOUT (0x82U)
76#define PECI_CC_ILLEGAL_REQUEST (0x90U)
83#define PECI_PING_WR_LEN (0U)
84#define PECI_PING_RD_LEN (0U)
85#define PECI_PING_LEN (3U)
92#define PECI_GET_DIB_WR_LEN (1U)
93#define PECI_GET_DIB_RD_LEN (8U)
94#define PECI_GET_DIB_CMD_LEN (4U)
95#define PECI_GET_DIB_DEVINFO (0U)
96#define PECI_GET_DIB_REVNUM (1U)
97#define PECI_GET_DIB_DOMAIN_BIT_MASK (0x4U)
98#define PECI_GET_DIB_MAJOR_REV_MASK 0xF0
99#define PECI_GET_DIB_MINOR_REV_MASK 0x0F
106#define PECI_GET_TEMP_WR_LEN (1U)
107#define PECI_GET_TEMP_RD_LEN (2U)
108#define PECI_GET_TEMP_CMD_LEN (4U)
109#define PECI_GET_TEMP_LSB (0U)
110#define PECI_GET_TEMP_MSB (1U)
111#define PECI_GET_TEMP_ERR_MSB (0x80U)
112#define PECI_GET_TEMP_ERR_LSB_GENERAL (0x0U)
113#define PECI_GET_TEMP_ERR_LSB_RES (0x1U)
114#define PECI_GET_TEMP_ERR_LSB_TEMP_LO (0x2U)
115#define PECI_GET_TEMP_ERR_LSB_TEMP_HI (0x3U)
122#define PECI_RD_PKG_WR_LEN (5U)
123#define PECI_RD_PKG_LEN_BYTE (2U)
124#define PECI_RD_PKG_LEN_WORD (3U)
125#define PECI_RD_PKG_LEN_DWORD (5U)
126#define PECI_RD_PKG_CMD_LEN (8U)
133#define PECI_WR_PKG_RD_LEN (1U)
134#define PECI_WR_PKG_LEN_BYTE (7U)
135#define PECI_WR_PKG_LEN_WORD (8U)
136#define PECI_WR_PKG_LEN_DWORD (10U)
137#define PECI_WR_PKG_CMD_LEN (9U)
144#define PECI_RD_IAMSR_WR_LEN (5U)
145#define PECI_RD_IAMSR_LEN_BYTE (2U)
146#define PECI_RD_IAMSR_LEN_WORD (3U)
147#define PECI_RD_IAMSR_LEN_DWORD (5U)
148#define PECI_RD_IAMSR_LEN_QWORD (9U)
149#define PECI_RD_IAMSR_CMD_LEN (8U)
156#define PECI_WR_IAMSR_RD_LEN (1U)
157#define PECI_WR_IAMSR_LEN_BYTE (7U)
158#define PECI_WR_IAMSR_LEN_WORD (8U)
159#define PECI_WR_IAMSR_LEN_DWORD (10U)
160#define PECI_WR_IAMSR_LEN_QWORD (14U)
161#define PECI_WR_IAMSR_CMD_LEN (9U)
168#define PECI_RD_PCICFG_WR_LEN (6U)
169#define PECI_RD_PCICFG_LEN_BYTE (2U)
170#define PECI_RD_PCICFG_LEN_WORD (3U)
171#define PECI_RD_PCICFG_LEN_DWORD (5U)
172#define PECI_RD_PCICFG_CMD_LEN (9U)
179#define PECI_WR_PCICFG_RD_LEN (1U)
180#define PECI_WR_PCICFG_LEN_BYTE (8U)
181#define PECI_WR_PCICFG_LEN_WORD (9U)
182#define PECI_WR_PCICFG_LEN_DWORD (11U)
183#define PECI_WR_PCICFG_CMD_LEN (10U)
190#define PECI_RD_PCICFGL_WR_LEN (5U)
191#define PECI_RD_PCICFGL_RD_LEN_BYTE (2U)
192#define PECI_RD_PCICFGL_RD_LEN_WORD (3U)
193#define PECI_RD_PCICFGL_RD_LEN_DWORD (5U)
194#define PECI_RD_PCICFGL_CMD_LEN (8U)
201#define PECI_WR_PCICFGL_RD_LEN (1U)
202#define PECI_WR_PCICFGL_WR_LEN_BYTE (7U)
203#define PECI_WR_PCICFGL_WR_LEN_WORD (8U)
204#define PECI_WR_PCICFGL_WR_LEN_DWORD (10U)
205#define PECI_WR_PCICFGL_CMD_LEN (9U)
211struct peci_buf {
223 size_t len;
224};
225
241
249typedef int (*peci_config_t)(const struct device *dev, uint32_t bitrate);
250typedef int (*peci_transfer_t)(const struct device *dev, struct peci_msg *msg);
251typedef int (*peci_disable_t)(const struct device *dev);
252typedef int (*peci_enable_t)(const struct device *dev);
253
254__subsystem struct peci_driver_api {
255 peci_config_t config;
256 peci_disable_t disable;
257 peci_enable_t enable;
258 peci_transfer_t transfer;
259};
260
274__syscall int peci_config(const struct device *dev, uint32_t bitrate);
275
276static inline int z_impl_peci_config(const struct device *dev,
277 uint32_t bitrate)
278{
279 struct peci_driver_api *api;
280
281 api = (struct peci_driver_api *)dev->api;
282 return api->config(dev, bitrate);
283}
284
293__syscall int peci_enable(const struct device *dev);
294
295static inline int z_impl_peci_enable(const struct device *dev)
296{
297 struct peci_driver_api *api;
298
299 api = (struct peci_driver_api *)dev->api;
300 return api->enable(dev);
301}
302
311__syscall int peci_disable(const struct device *dev);
312
313static inline int z_impl_peci_disable(const struct device *dev)
314{
315 struct peci_driver_api *api;
316
317 api = (struct peci_driver_api *)dev->api;
318 return api->disable(dev);
319}
320
331__syscall int peci_transfer(const struct device *dev, struct peci_msg *msg);
332
333static inline int z_impl_peci_transfer(const struct device *dev,
334 struct peci_msg *msg)
335{
336 struct peci_driver_api *api;
337
338 api = (struct peci_driver_api *)dev->api;
339 return api->transfer(dev, msg);
340}
341
342
343#ifdef __cplusplus
344}
345#endif
346
351#include <zephyr/syscalls/peci.h>
352
353#endif /* ZEPHYR_INCLUDE_DRIVERS_PECI_H_ */
System error numbers.
peci_error_code
PECI error codes.
Definition peci.h:36
int peci_config(const struct device *dev, uint32_t bitrate)
Configures the PECI interface.
int peci_enable(const struct device *dev)
Enable PECI interface.
peci_command_code
PECI commands.
Definition peci.h:45
int peci_transfer(const struct device *dev, struct peci_msg *msg)
Performs a PECI transaction.
int peci_disable(const struct device *dev)
Disable PECI interface.
@ PECI_UNDERFLOW_SENSOR_ERROR
Definition peci.h:38
@ PECI_GENERAL_SENSOR_ERROR
Definition peci.h:37
@ PECI_OVERFLOW_SENSOR_ERROR
Definition peci.h:39
@ PECI_CMD_GET_DIB
Definition peci.h:65
@ PECI_CMD_GET_TEMP1
Definition peci.h:48
@ PECI_CMD_RD_PCI_CFG_LOCAL0
Definition peci.h:61
@ PECI_CMD_RD_PKG_CFG1
Definition peci.h:54
@ PECI_CMD_WR_IAMSR0
Definition peci.h:59
@ PECI_CMD_WR_PKG_CFG1
Definition peci.h:56
@ PECI_CMD_RD_PKG_CFG0
Definition peci.h:53
@ PECI_CMD_WR_PCI_CFG1
Definition peci.h:52
@ PECI_CMD_RD_IAMSR1
Definition peci.h:58
@ PECI_CMD_RD_PCI_CFG1
Definition peci.h:50
@ PECI_CMD_WR_PCI_CFG_LOCAL1
Definition peci.h:64
@ PECI_CMD_RD_PCI_CFG0
Definition peci.h:49
@ PECI_CMD_WR_IAMSR1
Definition peci.h:60
@ PECI_CMD_WR_PKG_CFG0
Definition peci.h:55
@ PECI_CMD_WR_PCI_CFG0
Definition peci.h:51
@ PECI_CMD_RD_PCI_CFG_LOCAL1
Definition peci.h:62
@ PECI_CMD_RD_IAMSR0
Definition peci.h:57
@ PECI_CMD_PING
Definition peci.h:46
@ PECI_CMD_WR_PCI_CFG_LOCAL0
Definition peci.h:63
@ PECI_CMD_GET_TEMP0
Definition peci.h:47
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
Runtime device structure (in ROM) per driver instance.
Definition device.h:403
const void * api
Address of the API structure exposed by the device instance.
Definition device.h:409
PECI buffer structure.
Definition peci.h:211
size_t len
Length of the data buffer expected to be received without considering the frame check sequence byte.
Definition peci.h:223
uint8_t * buf
Valid pointer on a data buffer, or NULL otherwise.
Definition peci.h:215
PECI transaction packet format.
Definition peci.h:229
uint8_t flags
PECI msg flags.
Definition peci.h:239
enum peci_command_code cmd_code
Command code.
Definition peci.h:233
struct peci_buf tx_buffer
Pointer to buffer of write data.
Definition peci.h:235
uint8_t addr
Client address.
Definition peci.h:231
struct peci_buf rx_buffer
Pointer to buffer of read data.
Definition peci.h:237
static void msg(uint64_t c64)
Definition main.c:17