r8a78000_reset.h

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/*
 * Copyright (c) 2026 BayLibre, SAS
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_RESET_R8A78000_RESET_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_RESET_R8A78000_RESET_H_


 
/* Reset domain IDs */
#define R8A78000_RESET_VIPN_FCPCS0 0
#define R8A78000_RESET_VIPN_FCPCS1 1
#define R8A78000_RESET_VIPN_VCP5X0 2
#define R8A78000_RESET_VIPN_VCP5X1 3
#define R8A78000_RESET_VIPN_MSYNC 4
#define R8A78000_RESET_VIPS_FCPCS0 5
#define R8A78000_RESET_VIPS_FCPCS1 6
#define R8A78000_RESET_VIPS_VCP5X0 7
#define R8A78000_RESET_VIPS_VCP5X1 8
#define R8A78000_RESET_VIPS_MSYNC 9
#define R8A78000_RESET_MTI 10
#define R8A78000_RESET_ISP0 11
#define R8A78000_RESET_ISP1 12
#define R8A78000_RESET_ISP2 13
#define R8A78000_RESET_ISP3 14
#define R8A78000_RESET_ISPCS0 15
#define R8A78000_RESET_ISPCS1 16
#define R8A78000_RESET_ISPCS2 17
#define R8A78000_RESET_ISPCS3 18
#define R8A78000_RESET_CSITOP0 19
#define R8A78000_RESET_CSITOP1 20
#define R8A78000_RESET_CSITOP2 21
#define R8A78000_RESET_CSITOP3 22
#define R8A78000_RESET_DPTX0 23
#define R8A78000_RESET_DPTX1 24
#define R8A78000_RESET_DPTX2 25
#define R8A78000_RESET_VSPD0 26
#define R8A78000_RESET_VSPD1 27
#define R8A78000_RESET_VSPD2 28
#define R8A78000_RESET_VSPD3 29
#define R8A78000_RESET_VSPD4 30
#define R8A78000_RESET_VSPDB0 31
#define R8A78000_RESET_VSPDB1 32
#define R8A78000_RESET_VSPDB2 33
#define R8A78000_RESET_VSPDB3 34
#define R8A78000_RESET_VSPDB4 35
#define R8A78000_RESET_VSPX0 36
#define R8A78000_RESET_VSPX1 37
#define R8A78000_RESET_VSPX2 38
#define R8A78000_RESET_VSPX3 39
#define R8A78000_RESET_FCPVD0 40
#define R8A78000_RESET_FCPVD1 41
#define R8A78000_RESET_FCPVD2 42
#define R8A78000_RESET_FCPVD3 43
#define R8A78000_RESET_FCPVD4 44
#define R8A78000_RESET_FCPVD5 45
#define R8A78000_RESET_FCPVD6 46
#define R8A78000_RESET_FCPVD7 47
#define R8A78000_RESET_FCPVD8 48
#define R8A78000_RESET_FCPVD9 49
#define R8A78000_RESET_DOC2CH1 50
#define R8A78000_RESET_DOC2CH2 51
#define R8A78000_RESET_FCPVX0 52
#define R8A78000_RESET_FCPVX1 53
#define R8A78000_RESET_FCPVX2 54
#define R8A78000_RESET_FCPVX3 55
#define R8A78000_RESET_VIN000 56
#define R8A78000_RESET_VIN001 57
#define R8A78000_RESET_VIN002 58
#define R8A78000_RESET_VIN003 59
#define R8A78000_RESET_VIN004 60
#define R8A78000_RESET_VIN005 61
#define R8A78000_RESET_VIN006 62
#define R8A78000_RESET_VIN007 63
#define R8A78000_RESET_VIN010 64
#define R8A78000_RESET_VIN011 65
#define R8A78000_RESET_VIN012 66
#define R8A78000_RESET_VIN013 67
#define R8A78000_RESET_VIN014 68
#define R8A78000_RESET_VIN015 69
#define R8A78000_RESET_VIN016 70
#define R8A78000_RESET_VIN017 71
#define R8A78000_RESET_VIN020 72
#define R8A78000_RESET_VIN021 73
#define R8A78000_RESET_VIN022 74
#define R8A78000_RESET_VIN023 75
#define R8A78000_RESET_VIN024 76
#define R8A78000_RESET_VIN025 77
#define R8A78000_RESET_VIN026 78
#define R8A78000_RESET_VIN027 79
#define R8A78000_RESET_VIN030 80
#define R8A78000_RESET_VIN031 81
#define R8A78000_RESET_VIN032 82
#define R8A78000_RESET_VIN033 83
#define R8A78000_RESET_VIN034 84
#define R8A78000_RESET_VIN035 85
#define R8A78000_RESET_VIN036 86
#define R8A78000_RESET_VIN037 87
#define R8A78000_RESET_VIN040 88
#define R8A78000_RESET_VIN041 89
#define R8A78000_RESET_VIN042 90
#define R8A78000_RESET_VIN043 91
#define R8A78000_RESET_VIN044 92
#define R8A78000_RESET_VIN045 93
#define R8A78000_RESET_VIN046 94
#define R8A78000_RESET_VIN047 95
#define R8A78000_RESET_VIN050 96
#define R8A78000_RESET_VIN051 97
#define R8A78000_RESET_VIN052 98
#define R8A78000_RESET_VIN053 99
#define R8A78000_RESET_VIN054 100
#define R8A78000_RESET_VIN055 101
#define R8A78000_RESET_VIN056 102
#define R8A78000_RESET_VIN057 103
#define R8A78000_RESET_VIN060 104
#define R8A78000_RESET_VIN061 105
#define R8A78000_RESET_VIN062 106
#define R8A78000_RESET_VIN063 107
#define R8A78000_RESET_VIN064 108
#define R8A78000_RESET_VIN065 109
#define R8A78000_RESET_VIN066 110
#define R8A78000_RESET_VIN067 111
#define R8A78000_RESET_VIN070 112
#define R8A78000_RESET_VIN071 113
#define R8A78000_RESET_VIN072 114
#define R8A78000_RESET_VIN073 115
#define R8A78000_RESET_VIN074 116
#define R8A78000_RESET_VIN075 117
#define R8A78000_RESET_VIN076 118
#define R8A78000_RESET_VIN077 119
#define R8A78000_RESET_VIN080 120
#define R8A78000_RESET_VIN081 121
#define R8A78000_RESET_VIN082 122
#define R8A78000_RESET_VIN083 123
#define R8A78000_RESET_VIN084 124
#define R8A78000_RESET_VIN085 125
#define R8A78000_RESET_VIN086 126
#define R8A78000_RESET_VIN087 127
#define R8A78000_RESET_VIN090 128
#define R8A78000_RESET_VIN091 129
#define R8A78000_RESET_VIN092 130
#define R8A78000_RESET_VIN093 131
#define R8A78000_RESET_VIN094 132
#define R8A78000_RESET_VIN095 133
#define R8A78000_RESET_VIN096 134
#define R8A78000_RESET_VIN097 135
#define R8A78000_RESET_VIN100 136
#define R8A78000_RESET_VIN101 137
#define R8A78000_RESET_VIN102 138
#define R8A78000_RESET_VIN103 139
#define R8A78000_RESET_VIN104 140
#define R8A78000_RESET_VIN105 141
#define R8A78000_RESET_VIN106 142
#define R8A78000_RESET_VIN107 143
#define R8A78000_RESET_VIN110 144
#define R8A78000_RESET_VIN111 145
#define R8A78000_RESET_VIN112 146
#define R8A78000_RESET_VIN113 147
#define R8A78000_RESET_VIN114 148
#define R8A78000_RESET_VIN115 149
#define R8A78000_RESET_VIN116 150
#define R8A78000_RESET_VIN117 151
#define R8A78000_RESET_DOC2CH0 152
#define R8A78000_RESET_VCON0 153
#define R8A78000_RESET_VCON1 154
#define R8A78000_RESET_VCON2 155
#define R8A78000_RESET_VCON3 156
#define R8A78000_RESET_VCON4 157
#define R8A78000_RESET_VCON5 158
#define R8A78000_RESET_VCON6 159
#define R8A78000_RESET_VCON7 160
#define R8A78000_RESET_VCON8 161
#define R8A78000_RESET_VCON9 162
#define R8A78000_RESET_VSPB0 163
#define R8A78000_RESET_VSPB1 164
#define R8A78000_RESET_VSPB2 165
#define R8A78000_RESET_VSPB3 166
#define R8A78000_RESET_VSPB4 167
#define R8A78000_RESET_VSPI0 168
#define R8A78000_RESET_VSPI1 169
#define R8A78000_RESET_VSPI2 170
#define R8A78000_RESET_VSPI3 171
#define R8A78000_RESET_FCPVB0 172
#define R8A78000_RESET_FCPVB1 173
#define R8A78000_RESET_FCPVB2 174
#define R8A78000_RESET_FCPVB3 175
#define R8A78000_RESET_FCPVB4 176
#define R8A78000_RESET_FCPVI0 177
#define R8A78000_RESET_FCPVI1 178
#define R8A78000_RESET_FCPVI2 179
#define R8A78000_RESET_FCPVI3 180
#define R8A78000_RESET_VIN0 181
#define R8A78000_RESET_VIN1 182
#define R8A78000_RESET_VIN2 183
#define R8A78000_RESET_VIN3 184
#define R8A78000_RESET_VIN4 185
#define R8A78000_RESET_VIN5 186
#define R8A78000_RESET_VIN6 187
#define R8A78000_RESET_VIN7 188
#define R8A78000_RESET_VIN8 189
#define R8A78000_RESET_VIN9 190
#define R8A78000_RESET_VIN10 191
#define R8A78000_RESET_VIN11 192
#define R8A78000_RESET_PERE_GPIODM0 193
#define R8A78000_RESET_PERE_GPIODM1 194
#define R8A78000_RESET_PERE_GPIODM2 195
#define R8A78000_RESET_PERE_GPIODM3 196
#define R8A78000_RESET_RPC 197
#define R8A78000_RESET_UFS0 198
#define R8A78000_RESET_UFS1 199
#define R8A78000_RESET_SDHI0 200
#define R8A78000_RESET_PERW_GPIODM0 201
#define R8A78000_RESET_PERW_GPIODM1 202
#define R8A78000_RESET_PERW_GPIODM2 203
#define R8A78000_RESET_PERW_GPIODM3 204
#define R8A78000_RESET_SCIF0 205
#define R8A78000_RESET_SCIF1 206
#define R8A78000_RESET_SCIF3 207
#define R8A78000_RESET_SCIF4 208
#define R8A78000_RESET_I2C1 209
#define R8A78000_RESET_I2C2 210
#define R8A78000_RESET_I2C3 211
#define R8A78000_RESET_I2C4 212
#define R8A78000_RESET_I2C5 213
#define R8A78000_RESET_I2C6 214
#define R8A78000_RESET_I2C7 215
#define R8A78000_RESET_I2C8 216
#define R8A78000_RESET_I3C0 217
#define R8A78000_RESET_I3C1 218
#define R8A78000_RESET_I3C2 219
#define R8A78000_RESET_MSI4 220
#define R8A78000_RESET_MSI5 221
#define R8A78000_RESET_MSI6 222
#define R8A78000_RESET_MSI7 223
#define R8A78000_RESET_HSCIF0 224
#define R8A78000_RESET_HSCIF1 225
#define R8A78000_RESET_HSCIF2 226
#define R8A78000_RESET_HSCIF3 227
#define R8A78000_RESET_DRI00 228
#define R8A78000_RESET_DRI01 229
#define R8A78000_RESET_DRI10 230
#define R8A78000_RESET_DRI11 231
#define R8A78000_RESET_DRI20 232
#define R8A78000_RESET_DRI21 233
#define R8A78000_RESET_DRI30 234
#define R8A78000_RESET_DRI31 235
#define R8A78000_RESET_DRI40 236
#define R8A78000_RESET_DRI41 237
#define R8A78000_RESET_DRI50 238
#define R8A78000_RESET_DRI51 239
#define R8A78000_RESET_DRI60 240
#define R8A78000_RESET_DRI61 241
#define R8A78000_RESET_DRI70 242
#define R8A78000_RESET_DRI71 243
#define R8A78000_RESET_PWM0 244
#define R8A78000_RESET_TMU1 245
#define R8A78000_RESET_TMU2 246
#define R8A78000_RESET_TMU3 247
#define R8A78000_RESET_TMU4 248
#define R8A78000_RESET_TPU0 249
#define R8A78000_RESET_ADG0 250
#define R8A78000_RESET_ADG1 251
#define R8A78000_RESET_SSI0 252
#define R8A78000_RESET_SSI00 253
#define R8A78000_RESET_SSI01 254
#define R8A78000_RESET_SSI02 255
#define R8A78000_RESET_SSI03 256
#define R8A78000_RESET_SSI04 257
#define R8A78000_RESET_SSI05 258
#define R8A78000_RESET_SSI06 259
#define R8A78000_RESET_SSI07 260
#define R8A78000_RESET_SSI08 261
#define R8A78000_RESET_SSI09 262
#define R8A78000_RESET_SSI1 263
#define R8A78000_RESET_SSI10 264
#define R8A78000_RESET_SSI11 265
#define R8A78000_RESET_SSI12 266
#define R8A78000_RESET_SSI13 267
#define R8A78000_RESET_SSI14 268
#define R8A78000_RESET_SSI15 269
#define R8A78000_RESET_SSI16 270
#define R8A78000_RESET_SSI17 271
#define R8A78000_RESET_SSI18 272
#define R8A78000_RESET_SSI19 273
#define R8A78000_RESET_SCU0 274
#define R8A78000_RESET_SRC00 275
#define R8A78000_RESET_SRC01 276
#define R8A78000_RESET_SRC02 277
#define R8A78000_RESET_SRC03 278
#define R8A78000_RESET_SRC04 279
#define R8A78000_RESET_SRC05 280
#define R8A78000_RESET_SRC06 281
#define R8A78000_RESET_SRC07 282
#define R8A78000_RESET_SRC08 283
#define R8A78000_RESET_SRC09 284
#define R8A78000_RESET_SCU00 285
#define R8A78000_RESET_SCU01 286
#define R8A78000_RESET_DVC00 287
#define R8A78000_RESET_DVC01 288
#define R8A78000_RESET_SCU1 289
#define R8A78000_RESET_SRC10 290
#define R8A78000_RESET_SRC11 291
#define R8A78000_RESET_SRC12 292
#define R8A78000_RESET_SRC13 293
#define R8A78000_RESET_SRC14 294
#define R8A78000_RESET_SRC15 295
#define R8A78000_RESET_SRC16 296
#define R8A78000_RESET_SRC17 297
#define R8A78000_RESET_SRC18 298
#define R8A78000_RESET_SRC19 299
#define R8A78000_RESET_SCU10 300
#define R8A78000_RESET_SCU11 301
#define R8A78000_RESET_DVC10 302
#define R8A78000_RESET_DVC11 303
#define R8A78000_RESET_APD00 304
#define R8A78000_RESET_APD01 305
#define R8A78000_RESET_APD10 306
#define R8A78000_RESET_APD11 307
#define R8A78000_RESET_APD02 308
#define R8A78000_RESET_APD12 309
#define R8A78000_RESET_AULK2P 310
#define R8A78000_RESET_AULK4P 311
#define R8A78000_RESET_XPCS0 312
#define R8A78000_RESET_XPCS1 313
#define R8A78000_RESET_XPCS2 314
#define R8A78000_RESET_XPCS3 315
#define R8A78000_RESET_XPCS4 316
#define R8A78000_RESET_XPCS5 317
#define R8A78000_RESET_XPCS6 318
#define R8A78000_RESET_XPCS7 319
#define R8A78000_RESET_RSW3 320
#define R8A78000_RESET_RSW3TSN 321
#define R8A78000_RESET_RSW3AES 322
#define R8A78000_RESET_RSW3TSNTES0 323
#define R8A78000_RESET_RSW3TSNTES1 324
#define R8A78000_RESET_RSW3TSNTES2 325
#define R8A78000_RESET_RSW3TSNTES3 326
#define R8A78000_RESET_RSW3TSNTES4 327
#define R8A78000_RESET_RSW3TSNTES5 328
#define R8A78000_RESET_RSW3TSNTES6 329
#define R8A78000_RESET_RSW3TSNTES7 330
#define R8A78000_RESET_RSW3MFWD 331
#define R8A78000_RESET_HSCN_GPIODM0 332
#define R8A78000_RESET_HSCN_GPIODM1 333
#define R8A78000_RESET_HSCN_GPIODM2 334
#define R8A78000_RESET_HSCN_GPIODM3 335
#define R8A78000_RESET_US30 336
#define R8A78000_RESET_US31 337
#define R8A78000_RESET_US32 338
#define R8A78000_RESET_US33 339
#define R8A78000_RESET_MPPHY01 340
#define R8A78000_RESET_MPPHY11 341
#define R8A78000_RESET_MPPHY21 342
#define R8A78000_RESET_MPPHY31 343
#define R8A78000_RESET_MPPHY02 344
#define R8A78000_RESET_PCI401 345
#define R8A78000_RESET_PCI411 346
#define R8A78000_RESET_PCI402 347
#define R8A78000_RESET_PCI412 348
#define R8A78000_RESET_CR52TOP0 349
#define R8A78000_RESET_CR52TOP0_BD 350
#define R8A78000_RESET_CR52CORE0 351
#define R8A78000_RESET_CR52CORE0_PO 352
#define R8A78000_RESET_CR52CORE1 353
#define R8A78000_RESET_CR52CORE1_PO 354
#define R8A78000_RESET_CR52SHADOW0 355
#define R8A78000_RESET_CR52SHADOW0_PO 356
#define R8A78000_RESET_CR52SHADOW1 357
#define R8A78000_RESET_CR52SHADOW1_PO 358
#define R8A78000_RESET_CR52TOP1 359
#define R8A78000_RESET_CR52TOP1_DEB 360
#define R8A78000_RESET_CR52CORE2 361
#define R8A78000_RESET_CR52CORE2_PO 362
#define R8A78000_RESET_CR52CORE3 363
#define R8A78000_RESET_CR52CORE3_PO 364
#define R8A78000_RESET_CR52SHADOW2 365
#define R8A78000_RESET_CR52SHADOW2_PO 366
#define R8A78000_RESET_CR52SHADOW3 367
#define R8A78000_RESET_CR52SHADOW3_PO 368
#define R8A78000_RESET_CR52TOP2 369
#define R8A78000_RESET_CR52TOP2_DB 370
#define R8A78000_RESET_CR52CORE4 371
#define R8A78000_RESET_CR52CORE4_PO 372
#define R8A78000_RESET_CR52CORE5 373
#define R8A78000_RESET_CR52CORE5_PO 374
#define R8A78000_RESET_CR52SHADOW4 375
#define R8A78000_RESET_CR52SHADOW4_PO 376
#define R8A78000_RESET_CR52SHADOW5 377
#define R8A78000_RESET_CR52SHADOW5_PO 378
#define R8A78000_RESET_CSD 379
#define R8A78000_RESET_OSTM0 380
#define R8A78000_RESET_OSTM1 381
#define R8A78000_RESET_OSTM2 382
#define R8A78000_RESET_OSTM3 383
#define R8A78000_RESET_OSTM4 384
#define R8A78000_RESET_OSTM5 385
#define R8A78000_RESET_TMU0 386
#define R8A78000_RESET_WDT0 387
#define R8A78000_RESET_WDT1 388
#define R8A78000_RESET_WWDT00 389
#define R8A78000_RESET_WWDT10 390
#define R8A78000_RESET_WWDT20 391
#define R8A78000_RESET_WWDT30 392
#define R8A78000_RESET_WWDT40 393
#define R8A78000_RESET_WWDT50 394
#define R8A78000_RESET_WWDT60 395
#define R8A78000_RESET_WWDT70 396
#define R8A78000_RESET_WWDT80 397
#define R8A78000_RESET_WWDT90 398
#define R8A78000_RESET_WWDT100 399
#define R8A78000_RESET_WWDT110 400
#define R8A78000_RESET_WWDT120 401
#define R8A78000_RESET_WWDT130 402
#define R8A78000_RESET_WWDT01 403
#define R8A78000_RESET_WWDT11 404
#define R8A78000_RESET_WWDT21 405
#define R8A78000_RESET_WWDT31 406
#define R8A78000_RESET_WWDT41 407
#define R8A78000_RESET_WWDT51 408
#define R8A78000_RESET_WWDT61 409
#define R8A78000_RESET_WWDT71 410
#define R8A78000_RESET_WWDT81 411
#define R8A78000_RESET_WWDT91 412
#define R8A78000_RESET_WWDT101 413
#define R8A78000_RESET_WWDT111 414
#define R8A78000_RESET_WWDT121 415
#define R8A78000_RESET_WWDT131 416
#define R8A78000_RESET_WWDT140 417
#define R8A78000_RESET_WWDT141 418
#define R8A78000_RESET_WWDT150 419
#define R8A78000_RESET_WWDT151 420
#define R8A78000_RESET_WWDT160 421
#define R8A78000_RESET_WWDT161 422
#define R8A78000_RESET_WWDT170 423
#define R8A78000_RESET_WWDT171 424
#define R8A78000_RESET_WWDT180 425
#define R8A78000_RESET_WWDT181 426
#define R8A78000_RESET_WWDT190 427
#define R8A78000_RESET_WWDT191 428
#define R8A78000_RESET_SWDT0 429
#define R8A78000_RESET_SWDT1 430
#define R8A78000_RESET_WCRC0 431
#define R8A78000_RESET_WCRC1 432
#define R8A78000_RESET_WCRC2 433
#define R8A78000_RESET_WCRC3 434
#define R8A78000_RESET_WCRC4 435
#define R8A78000_RESET_WCRC5 436
#define R8A78000_RESET_WCRC6 437
#define R8A78000_RESET_WCRC7 438
#define R8A78000_RESET_WCRC8 439
#define R8A78000_RESET_WCRC9 440
#define R8A78000_RESET_WCRC10 441
#define R8A78000_RESET_CRC0 442
#define R8A78000_RESET_CRC1 443
#define R8A78000_RESET_CRC2 444
#define R8A78000_RESET_CRC3 445
#define R8A78000_RESET_CRC4 446
#define R8A78000_RESET_CRC5 447
#define R8A78000_RESET_CRC6 448
#define R8A78000_RESET_CRC7 449
#define R8A78000_RESET_CRC8 450
#define R8A78000_RESET_CRC9 451
#define R8A78000_RESET_CRC10 452
#define R8A78000_RESET_KCRC0 453
#define R8A78000_RESET_KCRC1 454
#define R8A78000_RESET_KCRC2 455
#define R8A78000_RESET_KCRC3 456
#define R8A78000_RESET_KCRC4 457
#define R8A78000_RESET_KCRC5 458
#define R8A78000_RESET_KCRC6 459
#define R8A78000_RESET_KCRC7 460
#define R8A78000_RESET_KCRC8 461
#define R8A78000_RESET_KCRC9 462
#define R8A78000_RESET_KCRC10 463
#define R8A78000_RESET_INTAP0 464
#define R8A78000_RESET_INTTP 465
#define R8A78000_RESET_INTAP1 466
#define R8A78000_RESET_RTDM0 467
#define R8A78000_RESET_RTDM1 468
#define R8A78000_RESET_RTDM2 469
#define R8A78000_RESET_RTDM3 470
#define R8A78000_RESET_FBDM0 471
#define R8A78000_RESET_FBDM1 472
#define R8A78000_RESET_SECROM 473
#define R8A78000_RESET_CRAC0 474
#define R8A78000_RESET_CRAC1 475
#define R8A78000_RESET_CRAC2 476
#define R8A78000_RESET_CRAC3 477
#define R8A78000_RESET_CRAC4 478
#define R8A78000_RESET_CRAC5 479
#define R8A78000_RESET_CRAC6 480
#define R8A78000_RESET_CRAC7 481
#define R8A78000_RESET_CRAC8 482
#define R8A78000_RESET_CRAC9 483
#define R8A78000_RESET_CRAC10 484
#define R8A78000_RESET_CRAC11 485
#define R8A78000_RESET_CRAC12 486
#define R8A78000_RESET_CRAC13 487
#define R8A78000_RESET_CRAC14 488
#define R8A78000_RESET_CRAC15 489
#define R8A78000_RESET_CRAC16 490
#define R8A78000_RESET_CRAC17 491
#define R8A78000_RESET_CRAC18 492
#define R8A78000_RESET_CRAC19 493
#define R8A78000_RESET_APRTMGINT0 494
#define R8A78000_RESET_APRTMGINT1 495
#define R8A78000_RESET_APRTMGINT2 496
#define R8A78000_RESET_APRTMGINT3 497
#define R8A78000_RESET_APRTMGINT4 498
#define R8A78000_RESET_APRTMGINT5 499
#define R8A78000_RESET_APRTMGINT6 500
#define R8A78000_RESET_APRTMGINT7 501
#define R8A78000_RESET_C0RTMG 502
#define R8A78000_RESET_CMN_TOPN_GIC 503
#define R8A78000_RESET_CMN_TOPN_DBG 504
#define R8A78000_RESET_CMN_TOPE 505
#define R8A78000_RESET_CMN_TOPS 506
#define R8A78000_RESET_CMN_TOPW 507
#define R8A78000_RESET_UCIEBG0ICN0 508
#define R8A78000_RESET_UCIEBG0ICN1 509
#define R8A78000_RESET_CSBRG_DSPTOP 510
#define R8A78000_RESET_CSBRG_NPUTOP0 511
#define R8A78000_RESET_CSBRG_NPUTOP1 512
#define R8A78000_RESET_SCMT 513
#define R8A78000_RESET_UCMT 514
#define R8A78000_RESET_CMT0 515
#define R8A78000_RESET_CMT1 516
#define R8A78000_RESET_CMT2 517
#define R8A78000_RESET_CMT3 518
#define R8A78000_RESET_LTM0 519
#define R8A78000_RESET_LTM1 520
#define R8A78000_RESET_LTM2 521
#define R8A78000_RESET_INTAP_CMN2TOP0 522
#define R8A78000_RESET_PCI60BG0 523
#define R8A78000_RESET_PCI60BG1 524
#define R8A78000_RESET_ADVFSC 525
#define R8A78000_RESET_ADVFSC_KEN 526
#define R8A78000_RESET_TSC1 527
#define R8A78000_RESET_UCIE01 528
#define R8A78000_RESET_UCIE02 529
#define R8A78000_RESET_UCIE11 530
#define R8A78000_RESET_UCIE12 531
#define R8A78000_RESET_UCIEBG1DEV0 532
#define R8A78000_RESET_UCIEBG1DEV1 533
#define R8A78000_RESET_UCIEBG1ICN0 534
#define R8A78000_RESET_UCIEBG1ICN1 535
#define R8A78000_RESET_UCIEBG0DEV0 536
#define R8A78000_RESET_UCIEBG0DEV1 537
#define R8A78000_RESET_PCI601 538
#define R8A78000_RESET_PCI611 539
#define R8A78000_RESET_PCI602 540
#define R8A78000_RESET_PCI612 541
#define R8A78000_RESET_IMN_IMR000 542
#define R8A78000_RESET_IMN_IMR001 543
#define R8A78000_RESET_IMN_IMS00 544
#define R8A78000_RESET_IMN_IMS01 545
#define R8A78000_RESET_IMN_IMS02 546
#define R8A78000_RESET_IMN_IMS03 547
#define R8A78000_RESET_IMS_IMR000 548
#define R8A78000_RESET_IMS_IMR001 549
#define R8A78000_RESET_IMS_IMS00 550
#define R8A78000_RESET_IMS_IMS01 551
#define R8A78000_RESET_IMS_IMS02 552
#define R8A78000_RESET_IMS_IMS03 553
#define R8A78000_RESET_RGX_JONES0 554
#define R8A78000_RESET_RGX_MERCER0 555
#define R8A78000_RESET_RGX_MERCER1 556
#define R8A78000_RESET_RGX_MERCER2 557
#define R8A78000_RESET_RGX_MERCER3 558
#define R8A78000_RESET_RGX_TEXAS0 559
#define R8A78000_RESET_RGX_TEXAS1 560
#define R8A78000_RESET_RGX_SWIFT0 561
#define R8A78000_RESET_RGX_SWIFT1 562
#define R8A78000_RESET_RGX_SWIFT2 563
#define R8A78000_RESET_RGX_SWIFT3 564
#define R8A78000_RESET_RGX_JONES1 565
#define R8A78000_RESET_RGX_MERCER4 566
#define R8A78000_RESET_RGX_MERCER5 567
#define R8A78000_RESET_RGX_MERCER6 568
#define R8A78000_RESET_RGX_MERCER7 569
#define R8A78000_RESET_RGX_TEXAS2 570
#define R8A78000_RESET_RGX_TEXAS3 571
#define R8A78000_RESET_RGX_SWIFT4 572
#define R8A78000_RESET_RGX_SWIFT5 573
#define R8A78000_RESET_RGX_SWIFT6 574
#define R8A78000_RESET_RGX_SWIFT7 575
#define R8A78000_RESET_CSDBG_DSP 576
#define R8A78000_RESET_DSPARCSYN_RST 577
#define R8A78000_RESET_DSPARCSYN_AXI 578
#define R8A78000_RESET_DSPARCSYN_REG 579
#define R8A78000_RESET_DSP2_MISC_RST 580
#define R8A78000_RESET_DSP2_MISC_PORES 581
#define R8A78000_RESET_DSP2_MISC_ATRES 582
#define R8A78000_RESET_DSP2_CORE0_RST 583
#define R8A78000_RESET_DSP2_CORE0_CSD 584
#define R8A78000_RESET_DSP2_CORE1_RST 585
#define R8A78000_RESET_DSP2_CORE1_CSD 586
#define R8A78000_RESET_DSP2_CORE2_RST 587
#define R8A78000_RESET_DSP2_CORE2_CSD 588
#define R8A78000_RESET_DSP2_CORE3_RST 589
#define R8A78000_RESET_DSP2_CORE3_CSD 590
#define R8A78000_RESET_DSP_REG0 591
#define R8A78000_RESET_DSP3_MISC_RST 592
#define R8A78000_RESET_DSP3_MISC_PORES 593
#define R8A78000_RESET_DSP3_MISC_ATRES 594
#define R8A78000_RESET_DSP3_CORE0_RST 595
#define R8A78000_RESET_DSP3_CORE0_CSD 596
#define R8A78000_RESET_DSP3_CORE1_RST 597
#define R8A78000_RESET_DSP3_CORE1_CSD 598
#define R8A78000_RESET_DSP3_CORE2_RST 599
#define R8A78000_RESET_DSP3_CORE2_CSD 600
#define R8A78000_RESET_DSP3_CORE3_RST 601
#define R8A78000_RESET_DSP3_CORE3_CSD 602
#define R8A78000_RESET_DSP_REG1 603
#define R8A78000_RESET_DSP4_MISC_RST 604
#define R8A78000_RESET_DSP4_MISC_PORES 605
#define R8A78000_RESET_DSP4_MISC_ATRES 606
#define R8A78000_RESET_DSP4_CORE0_RST 607
#define R8A78000_RESET_DSP4_CORE0_CSD 608
#define R8A78000_RESET_DSP4_CORE1_RST 609
#define R8A78000_RESET_DSP4_CORE1_CSD 610
#define R8A78000_RESET_DSP4_CORE2_RST 611
#define R8A78000_RESET_DSP4_CORE2_CSD 612
#define R8A78000_RESET_DSP4_CORE3_RST 613
#define R8A78000_RESET_DSP4_CORE3_CSD 614
#define R8A78000_RESET_DSP_REG2 615
#define R8A78000_RESET_DSP5_MISC_RST 616
#define R8A78000_RESET_DSP5_MISC_PORES 617
#define R8A78000_RESET_DSP5_MISC_ATRES 618
#define R8A78000_RESET_DSP5_CORE0_RST 619
#define R8A78000_RESET_DSP5_CORE0_CSD 620
#define R8A78000_RESET_DSP5_CORE1_RST 621
#define R8A78000_RESET_DSP5_CORE1_CSD 622
#define R8A78000_RESET_DSP5_CORE2_RST 623
#define R8A78000_RESET_DSP5_CORE2_CSD 624
#define R8A78000_RESET_DSP5_CORE3_RST 625
#define R8A78000_RESET_DSP5_CORE3_CSD 626
#define R8A78000_RESET_DSP_REG3 627
#define R8A78000_RESET_DSP6_MISC_RST 628
#define R8A78000_RESET_DSP6_MISC_PORES 629
#define R8A78000_RESET_DSP6_MISC_ATRES 630
#define R8A78000_RESET_DSP6_CORE0_RST 631
#define R8A78000_RESET_DSP6_CORE0_CSD 632
#define R8A78000_RESET_DSP6_CORE1_RST 633
#define R8A78000_RESET_DSP6_CORE1_CSD 634
#define R8A78000_RESET_DSP6_CORE2_RST 635
#define R8A78000_RESET_DSP6_CORE2_CSD 636
#define R8A78000_RESET_DSP6_CORE3_RST 637
#define R8A78000_RESET_DSP6_CORE3_CSD 638
#define R8A78000_RESET_DSP_REG4 639
#define R8A78000_RESET_FCPRS0 640
#define R8A78000_RESET_FCPRS1 641
#define R8A78000_RESET_FCPRS2 642
#define R8A78000_RESET_FCPRS3 643
#define R8A78000_RESET_FCPRS4 644
#define R8A78000_RESET_FCPRS5 645
#define R8A78000_RESET_FCPRS6 646
#define R8A78000_RESET_FCPRS7 647
#define R8A78000_RESET_FCPRC0 648
#define R8A78000_RESET_FCPRC1 649
#define R8A78000_RESET_FCPRC2 650
#define R8A78000_RESET_FCPRC3 651
#define R8A78000_RESET_FCPRC4 652
#define R8A78000_RESET_FCPRC5 653
#define R8A78000_RESET_FCPRC6 654
#define R8A78000_RESET_FCPRC7 655
#define R8A78000_RESET_NPU0_CSDBG 656
#define R8A78000_RESET_NPU0_ATRES 657
#define R8A78000_RESET_NPU0_RST 658
#define R8A78000_RESET_NPU0_AXI 659
#define R8A78000_RESET_NPU0_NL2 660
#define R8A78000_RESET_NPU0_NL2ARC0 661
#define R8A78000_RESET_NPU0_NL2ARC1 662
#define R8A78000_RESET_NPU0_NL1GRP0 663
#define R8A78000_RESET_NPU0_SL0NL1ARC 664
#define R8A78000_RESET_NPU0_SL1NL1ARC 665
#define R8A78000_RESET_NPU0_SL2NL1ARC 666
#define R8A78000_RESET_NPU0_NL1GRP1 667
#define R8A78000_RESET_NPU0_SL3NL1ARC 668
#define R8A78000_RESET_NPU0_SL4NL1ARC 669
#define R8A78000_RESET_NPU0_SL5NL1ARC 670
#define R8A78000_RESET_NPU0_NL1GRP2 671
#define R8A78000_RESET_NPU0_SL6NL1ARC 672
#define R8A78000_RESET_NPU0_SL7NL1ARC 673
#define R8A78000_RESET_NPU0_SL8NL1ARC 674
#define R8A78000_RESET_NPU0_NL1GRP3 675
#define R8A78000_RESET_NPU0_SL9NL1ARC 676
#define R8A78000_RESET_NPU0_SL10NL1ARC 677
#define R8A78000_RESET_NPU0_SL11NL1ARC 678
#define R8A78000_RESET_NPU0_ARC_REG0 679
#define R8A78000_RESET_NPU0_AON_CORE 680
#define R8A78000_RESET_NPU0_AON_NOC 681
#define R8A78000_RESET_NPU0_AON_CFG 682
#define R8A78000_RESET_NPU0_AON_CSD 683
#define R8A78000_RESET_NPU0_CORE0_GRP0 684
#define R8A78000_RESET_NPU0_CORE1_GRP0 685
#define R8A78000_RESET_NPU0_CORE2_GRP0 686
#define R8A78000_RESET_NPU0_CORE0_GRP1 687
#define R8A78000_RESET_NPU0_CORE1_GRP1 688
#define R8A78000_RESET_NPU0_CORE2_GRP1 689
#define R8A78000_RESET_NPU0_CORE0_GRP2 690
#define R8A78000_RESET_NPU0_CORE1_GRP2 691
#define R8A78000_RESET_NPU0_CORE2_GRP2 692
#define R8A78000_RESET_NPU0_CORE0_GRP3 693
#define R8A78000_RESET_NPU0_CORE1_GRP3 694
#define R8A78000_RESET_NPU0_CORE2_GRP3 695
#define R8A78000_RESET_NPU0_PRES 696
#define R8A78000_RESET_NPU0_REG0 697
#define R8A78000_RESET_NPU0_MISC_RST 698
#define R8A78000_RESET_NPU0_MISC_PRES 699
#define R8A78000_RESET_NPU0_MISC_ATRES 700
#define R8A78000_RESET_NPU0_C0_DSP_RST 701
#define R8A78000_RESET_NPU0_C0_DSP_CSD 702
#define R8A78000_RESET_NPU0_C1_DSP_RST 703
#define R8A78000_RESET_NPU0_C1_DSP_CSD 704
#define R8A78000_RESET_NPU0_C2_DSP_RST 705
#define R8A78000_RESET_NPU0_C2_DSP_CSD 706
#define R8A78000_RESET_NPU0_C3_DSP_RST 707
#define R8A78000_RESET_NPU0_C3_DSP_CSD 708
#define R8A78000_RESET_NPU0_DSP_REG0 709
#define R8A78000_RESET_NPU1_CSDBG 710
#define R8A78000_RESET_NPU1_ATRES 711
#define R8A78000_RESET_NPU1_RST 712
#define R8A78000_RESET_NPU1_AXI 713
#define R8A78000_RESET_NPU1_NL2 714
#define R8A78000_RESET_NPU1_NL2ARC0 715
#define R8A78000_RESET_NPU1_NL2ARC1 716
#define R8A78000_RESET_NPU1_NL1GRP0 717
#define R8A78000_RESET_NPU1_SL0NL1ARC 718
#define R8A78000_RESET_NPU1_SL1NL1ARC 719
#define R8A78000_RESET_NPU1_SL2NL1ARC 720
#define R8A78000_RESET_NPU1_NL1GRP1 721
#define R8A78000_RESET_NPU1_SL3NL1ARC 722
#define R8A78000_RESET_NPU1_SL4NL1ARC 723
#define R8A78000_RESET_NPU1_SL5NL1ARC 724
#define R8A78000_RESET_NPU1_NL1GRP2 725
#define R8A78000_RESET_NPU1_SL6NL1ARC 726
#define R8A78000_RESET_NPU1_SL7NL1ARC 727
#define R8A78000_RESET_NPU1_SL8NL1ARC 728
#define R8A78000_RESET_NPU1_NL1GRP3 729
#define R8A78000_RESET_NPU1_SL9NL1ARC 730
#define R8A78000_RESET_NPU1_SL10NL1ARC 731
#define R8A78000_RESET_NPU1_SL11NL1ARC 732
#define R8A78000_RESET_NPU1_ARC_REG0 733
#define R8A78000_RESET_NPU1_AON_CORE 734
#define R8A78000_RESET_NPU1_AON_NOC 735
#define R8A78000_RESET_NPU1_AON_CFG 736
#define R8A78000_RESET_NPU1_AON_CSD 737
#define R8A78000_RESET_NPU1_CORE0_GRP0 738
#define R8A78000_RESET_NPU1_CORE1_GRP0 739
#define R8A78000_RESET_NPU1_CORE2_GRP0 740
#define R8A78000_RESET_NPU1_CORE0_GRP1 741
#define R8A78000_RESET_NPU1_CORE1_GRP1 742
#define R8A78000_RESET_NPU1_CORE2_GRP1 743
#define R8A78000_RESET_NPU1_CORE0_GRP2 744
#define R8A78000_RESET_NPU1_CORE1_GRP2 745
#define R8A78000_RESET_NPU1_CORE2_GRP2 746
#define R8A78000_RESET_NPU1_CORE0_GRP3 747
#define R8A78000_RESET_NPU1_CORE1_GRP3 748
#define R8A78000_RESET_NPU1_CORE2_GRP3 749
#define R8A78000_RESET_NPU1_PRES 750
#define R8A78000_RESET_NPU1_REG0 751
#define R8A78000_RESET_NPU1_MISC_RST 752
#define R8A78000_RESET_NPU1_MISC_PRES 753
#define R8A78000_RESET_NPU1_MISC_ATRES 754
#define R8A78000_RESET_NPU1_C0_DSP_RST 755
#define R8A78000_RESET_NPU1_C0_DSP_CSD 756
#define R8A78000_RESET_NPU1_C1_DSP_RST 757
#define R8A78000_RESET_NPU1_C1_DSP_CSD 758
#define R8A78000_RESET_NPU1_C2_DSP_RST 759
#define R8A78000_RESET_NPU1_C2_DSP_CSD 760
#define R8A78000_RESET_NPU1_C3_DSP_RST 761
#define R8A78000_RESET_NPU1_C3_DSP_CSD 762
#define R8A78000_RESET_NPU1_DSP_REG0 763
#define R8A78000_RESET_CMN_CORE0_PORES 764
#define R8A78000_RESET_CMN_CORE0_SYRES 765
#define R8A78000_RESET_CMN_CORE1_PORES 766
#define R8A78000_RESET_CMN_CORE1_SYRES 767
#define R8A78000_RESET_CMN_CORE2_PORES 768
#define R8A78000_RESET_CMN_CORE2_SYRES 769
#define R8A78000_RESET_CMN_CORE3_PORES 770
#define R8A78000_RESET_CMN_CORE3_SYRES 771
#define R8A78000_RESET_SCP 772
#define R8A78000_RESET_TAUD0 773
#define R8A78000_RESET_TAUD1 774
#define R8A78000_RESET_TAUJ1 775
#define R8A78000_RESET_MSI0 776
#define R8A78000_RESET_MSI1 777
#define R8A78000_RESET_MSI2 778
#define R8A78000_RESET_MSI3 779
#define R8A78000_RESET_I2C0 780
#define R8A78000_RESET_CANXL0 781
#define R8A78000_RESET_CANXL1 782
#define R8A78000_RESET_LIN00 783
#define R8A78000_RESET_LIN01 784
#define R8A78000_RESET_LIN02 785
#define R8A78000_RESET_LIN03 786
#define R8A78000_RESET_LIN10 787
#define R8A78000_RESET_LIN11 788
#define R8A78000_RESET_LIN12 789
#define R8A78000_RESET_LIN13 790
#define R8A78000_RESET_LIN20 791
#define R8A78000_RESET_LIN21 792
#define R8A78000_RESET_LIN22 793
#define R8A78000_RESET_LIN23 794
#define R8A78000_RESET_LIN30 795
#define R8A78000_RESET_LIN31 796
#define R8A78000_RESET_LIN32 797
#define R8A78000_RESET_LIN33 798
#define R8A78000_RESET_CANFD0 799
#define R8A78000_RESET_CANFD1 800
#define R8A78000_RESET_FRAY00 801
#define R8A78000_RESET_FRAY01 802
#define R8A78000_RESET_TSYN 803
#define R8A78000_RESET_WWDT200 804
#define R8A78000_RESET_WWDT201 805
#define R8A78000_RESET_SCDM0 806
#define R8A78000_RESET_SCDM1 807
#define R8A78000_RESET_INTSCP 808
#define R8A78000_RESET_TAUJ3 809
#define R8A78000_RESET_RTCA 810
#define R8A78000_RESET_GPIODM0 811
#define R8A78000_RESET_GPIODM1 812
#define R8A78000_RESET_GPIODM2 813
#define R8A78000_RESET_GPIODM3 814
#define R8A78000_RESET_U266_PCIE4 815
#define R8A78000_RESET_U266_PCIE6 816

 
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_RESET_R8A78000_RESET_H_ */