Zephyr Project API
4.1.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
ra6m4-elc.h
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2025 Renesas Electronics Corporation
3
*
4
* SPDX-License-Identifier: Apache-2.0
5
*/
6
7
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_MISC_RENESAS_RA_ELC_RA6M4_ELC_H_
8
#define ZEPHYR_INCLUDE_DT_BINDINGS_MISC_RENESAS_RA_ELC_RA6M4_ELC_H_
9
10
/* Sources of event signals to be linked to other peripherals or the CPU */
11
#define RA_ELC_EVENT_NONE 0x0
12
#define RA_ELC_EVENT_ICU_IRQ0 0x001
13
#define RA_ELC_EVENT_ICU_IRQ1 0x002
14
#define RA_ELC_EVENT_ICU_IRQ2 0x003
15
#define RA_ELC_EVENT_ICU_IRQ3 0x004
16
#define RA_ELC_EVENT_ICU_IRQ4 0x005
17
#define RA_ELC_EVENT_ICU_IRQ5 0x006
18
#define RA_ELC_EVENT_ICU_IRQ6 0x007
19
#define RA_ELC_EVENT_ICU_IRQ7 0x008
20
#define RA_ELC_EVENT_ICU_IRQ8 0x009
21
#define RA_ELC_EVENT_ICU_IRQ9 0x00A
22
#define RA_ELC_EVENT_ICU_IRQ10 0x00B
23
#define RA_ELC_EVENT_ICU_IRQ11 0x00C
24
#define RA_ELC_EVENT_ICU_IRQ12 0x00D
25
#define RA_ELC_EVENT_ICU_IRQ13 0x00E
26
#define RA_ELC_EVENT_ICU_IRQ14 0x00F
27
#define RA_ELC_EVENT_ICU_IRQ15 0x010
28
#define RA_ELC_EVENT_DMAC0_INT 0x020
29
#define RA_ELC_EVENT_DMAC1_INT 0x021
30
#define RA_ELC_EVENT_DMAC2_INT 0x022
31
#define RA_ELC_EVENT_DMAC3_INT 0x023
32
#define RA_ELC_EVENT_DMAC4_INT 0x024
33
#define RA_ELC_EVENT_DMAC5_INT 0x025
34
#define RA_ELC_EVENT_DMAC6_INT 0x026
35
#define RA_ELC_EVENT_DMAC7_INT 0x027
36
#define RA_ELC_EVENT_DTC_COMPLETE 0x029
37
#define RA_ELC_EVENT_DTC_END 0x02A
38
#define RA_ELC_EVENT_DMA_TRANSERR 0x02B
39
#define RA_ELC_EVENT_ICU_SNOOZE_CANCEL 0x02D
40
#define RA_ELC_EVENT_FCU_FIFERR 0x030
41
#define RA_ELC_EVENT_FCU_FRDYI 0x031
42
#define RA_ELC_EVENT_LVD_LVD1 0x038
43
#define RA_ELC_EVENT_LVD_LVD2 0x039
44
#define RA_ELC_EVENT_CGC_MOSC_STOP 0x03B
45
#define RA_ELC_EVENT_LPM_SNOOZE_REQUEST 0x03C
46
#define RA_ELC_EVENT_AGT0_INT 0x040
47
#define RA_ELC_EVENT_AGT0_COMPARE_A 0x041
48
#define RA_ELC_EVENT_AGT0_COMPARE_B 0x042
49
#define RA_ELC_EVENT_AGT1_INT 0x043
50
#define RA_ELC_EVENT_AGT1_COMPARE_A 0x044
51
#define RA_ELC_EVENT_AGT1_COMPARE_B 0x045
52
#define RA_ELC_EVENT_AGT2_INT 0x046
53
#define RA_ELC_EVENT_AGT2_COMPARE_A 0x047
54
#define RA_ELC_EVENT_AGT2_COMPARE_B 0x048
55
#define RA_ELC_EVENT_AGT3_INT 0x049
56
#define RA_ELC_EVENT_AGT3_COMPARE_A 0x04A
57
#define RA_ELC_EVENT_AGT3_COMPARE_B 0x04B
58
#define RA_ELC_EVENT_AGT4_INT 0x04C
59
#define RA_ELC_EVENT_AGT4_COMPARE_A 0x04D
60
#define RA_ELC_EVENT_AGT4_COMPARE_B 0x04E
61
#define RA_ELC_EVENT_AGT5_INT 0x04F
62
#define RA_ELC_EVENT_AGT5_COMPARE_A 0x050
63
#define RA_ELC_EVENT_AGT5_COMPARE_B 0x051
64
#define RA_ELC_EVENT_IWDT_UNDERFLOW 0x052
65
#define RA_ELC_EVENT_WDT_UNDERFLOW 0x053
66
#define RA_ELC_EVENT_RTC_ALARM 0x054
67
#define RA_ELC_EVENT_RTC_PERIOD 0x055
68
#define RA_ELC_EVENT_RTC_CARRY 0x056
69
#define RA_ELC_EVENT_USBFS_FIFO_0 0x06B
70
#define RA_ELC_EVENT_USBFS_FIFO_1 0x06C
71
#define RA_ELC_EVENT_USBFS_INT 0x06D
72
#define RA_ELC_EVENT_USBFS_RESUME 0x06E
73
#define RA_ELC_EVENT_IIC0_RXI 0x073
74
#define RA_ELC_EVENT_IIC0_TXI 0x074
75
#define RA_ELC_EVENT_IIC0_TEI 0x075
76
#define RA_ELC_EVENT_IIC0_ERI 0x076
77
#define RA_ELC_EVENT_IIC0_WUI 0x077
78
#define RA_ELC_EVENT_IIC1_RXI 0x078
79
#define RA_ELC_EVENT_IIC1_TXI 0x079
80
#define RA_ELC_EVENT_IIC1_TEI 0x07A
81
#define RA_ELC_EVENT_IIC1_ERI 0x07B
82
#define RA_ELC_EVENT_SDHIMMC0_ACCS 0x082
83
#define RA_ELC_EVENT_SDHIMMC0_SDIO 0x083
84
#define RA_ELC_EVENT_SDHIMMC0_CARD 0x084
85
#define RA_ELC_EVENT_SDHIMMC0_DMA_REQ 0x085
86
#define RA_ELC_EVENT_SSI0_TXI 0x08A
87
#define RA_ELC_EVENT_SSI0_RXI 0x08B
88
#define RA_ELC_EVENT_SSI0_INT 0x08D
89
#define RA_ELC_EVENT_CTSU_WRITE 0x09A
90
#define RA_ELC_EVENT_CTSU_READ 0x09B
91
#define RA_ELC_EVENT_CTSU_END 0x09C
92
#define RA_ELC_EVENT_CAC_FREQUENCY_ERROR 0x09E
93
#define RA_ELC_EVENT_CAC_MEASUREMENT_END 0x09F
94
#define RA_ELC_EVENT_CAC_OVERFLOW 0x0A0
95
#define RA_ELC_EVENT_CAN0_ERROR 0x0A1
96
#define RA_ELC_EVENT_CAN0_FIFO_RX 0x0A2
97
#define RA_ELC_EVENT_CAN0_FIFO_TX 0x0A3
98
#define RA_ELC_EVENT_CAN0_MAILBOX_RX 0x0A4
99
#define RA_ELC_EVENT_CAN0_MAILBOX_TX 0x0A5
100
#define RA_ELC_EVENT_CAN1_ERROR 0x0A6
101
#define RA_ELC_EVENT_CAN1_FIFO_RX 0x0A7
102
#define RA_ELC_EVENT_CAN1_FIFO_TX 0x0A8
103
#define RA_ELC_EVENT_CAN1_MAILBOX_RX 0x0A9
104
#define RA_ELC_EVENT_CAN1_MAILBOX_TX 0x0AA
105
#define RA_ELC_EVENT_IOPORT_EVENT_1 0x0B1
106
#define RA_ELC_EVENT_IOPORT_EVENT_2 0x0B2
107
#define RA_ELC_EVENT_IOPORT_EVENT_3 0x0B3
108
#define RA_ELC_EVENT_IOPORT_EVENT_4 0x0B4
109
#define RA_ELC_EVENT_ELC_SOFTWARE_EVENT_0 0x0B5
110
#define RA_ELC_EVENT_ELC_SOFTWARE_EVENT_1 0x0B6
111
#define RA_ELC_EVENT_POEG0_EVENT 0x0B7
112
#define RA_ELC_EVENT_POEG1_EVENT 0x0B8
113
#define RA_ELC_EVENT_POEG2_EVENT 0x0B9
114
#define RA_ELC_EVENT_POEG3_EVENT 0x0BA
115
#define RA_ELC_EVENT_GPT0_CAPTURE_COMPARE_A 0x0C0
116
#define RA_ELC_EVENT_GPT0_CAPTURE_COMPARE_B 0x0C1
117
#define RA_ELC_EVENT_GPT0_COMPARE_C 0x0C2
118
#define RA_ELC_EVENT_GPT0_COMPARE_D 0x0C3
119
#define RA_ELC_EVENT_GPT0_COMPARE_E 0x0C4
120
#define RA_ELC_EVENT_GPT0_COMPARE_F 0x0C5
121
#define RA_ELC_EVENT_GPT0_COUNTER_OVERFLOW 0x0C6
122
#define RA_ELC_EVENT_GPT0_COUNTER_UNDERFLOW 0x0C7
123
#define RA_ELC_EVENT_GPT0_PC 0x0C8
124
#define RA_ELC_EVENT_GPT1_CAPTURE_COMPARE_A 0x0C9
125
#define RA_ELC_EVENT_GPT1_CAPTURE_COMPARE_B 0x0CA
126
#define RA_ELC_EVENT_GPT1_COMPARE_C 0x0CB
127
#define RA_ELC_EVENT_GPT1_COMPARE_D 0x0CC
128
#define RA_ELC_EVENT_GPT1_COMPARE_E 0x0CD
129
#define RA_ELC_EVENT_GPT1_COMPARE_F 0x0CE
130
#define RA_ELC_EVENT_GPT1_COUNTER_OVERFLOW 0x0CF
131
#define RA_ELC_EVENT_GPT1_COUNTER_UNDERFLOW 0x0D0
132
#define RA_ELC_EVENT_GPT1_PC 0x0D1
133
#define RA_ELC_EVENT_GPT2_CAPTURE_COMPARE_A 0x0D2
134
#define RA_ELC_EVENT_GPT2_CAPTURE_COMPARE_B 0x0D3
135
#define RA_ELC_EVENT_GPT2_COMPARE_C 0x0D4
136
#define RA_ELC_EVENT_GPT2_COMPARE_D 0x0D5
137
#define RA_ELC_EVENT_GPT2_COMPARE_E 0x0D6
138
#define RA_ELC_EVENT_GPT2_COMPARE_F 0x0D7
139
#define RA_ELC_EVENT_GPT2_COUNTER_OVERFLOW 0x0D8
140
#define RA_ELC_EVENT_GPT2_COUNTER_UNDERFLOW 0x0D9
141
#define RA_ELC_EVENT_GPT3_CAPTURE_COMPARE_A 0x0DB
142
#define RA_ELC_EVENT_GPT3_CAPTURE_COMPARE_B 0x0DC
143
#define RA_ELC_EVENT_GPT3_COMPARE_C 0x0DD
144
#define RA_ELC_EVENT_GPT3_COMPARE_D 0x0DE
145
#define RA_ELC_EVENT_GPT3_COMPARE_E 0x0DF
146
#define RA_ELC_EVENT_GPT3_COMPARE_F 0x0E0
147
#define RA_ELC_EVENT_GPT3_COUNTER_OVERFLOW 0x0E1
148
#define RA_ELC_EVENT_GPT3_COUNTER_UNDERFLOW 0x0E2
149
#define RA_ELC_EVENT_GPT4_CAPTURE_COMPARE_A 0x0E4
150
#define RA_ELC_EVENT_GPT4_CAPTURE_COMPARE_B 0x0E5
151
#define RA_ELC_EVENT_GPT4_COMPARE_C 0x0E6
152
#define RA_ELC_EVENT_GPT4_COMPARE_D 0x0E7
153
#define RA_ELC_EVENT_GPT4_COMPARE_E 0x0E8
154
#define RA_ELC_EVENT_GPT4_COMPARE_F 0x0E9
155
#define RA_ELC_EVENT_GPT4_COUNTER_OVERFLOW 0x0EA
156
#define RA_ELC_EVENT_GPT4_COUNTER_UNDERFLOW 0x0EB
157
#define RA_ELC_EVENT_GPT4_PC 0x0EC
158
#define RA_ELC_EVENT_GPT5_CAPTURE_COMPARE_A 0x0ED
159
#define RA_ELC_EVENT_GPT5_CAPTURE_COMPARE_B 0x0EE
160
#define RA_ELC_EVENT_GPT5_COMPARE_C 0x0EF
161
#define RA_ELC_EVENT_GPT5_COMPARE_D 0x0F0
162
#define RA_ELC_EVENT_GPT5_COMPARE_E 0x0F1
163
#define RA_ELC_EVENT_GPT5_COMPARE_F 0x0F2
164
#define RA_ELC_EVENT_GPT5_COUNTER_OVERFLOW 0x0F3
165
#define RA_ELC_EVENT_GPT5_COUNTER_UNDERFLOW 0x0F4
166
#define RA_ELC_EVENT_GPT5_PC 0x0F5
167
#define RA_ELC_EVENT_GPT6_CAPTURE_COMPARE_A 0x0F6
168
#define RA_ELC_EVENT_GPT6_CAPTURE_COMPARE_B 0x0F7
169
#define RA_ELC_EVENT_GPT6_COMPARE_C 0x0F8
170
#define RA_ELC_EVENT_GPT6_COMPARE_D 0x0F9
171
#define RA_ELC_EVENT_GPT6_COMPARE_E 0x0FA
172
#define RA_ELC_EVENT_GPT6_COMPARE_F 0x0FB
173
#define RA_ELC_EVENT_GPT6_COUNTER_OVERFLOW 0x0FC
174
#define RA_ELC_EVENT_GPT6_COUNTER_UNDERFLOW 0x0FD
175
#define RA_ELC_EVENT_GPT6_PC 0x0FE
176
#define RA_ELC_EVENT_GPT7_CAPTURE_COMPARE_A 0x0FF
177
#define RA_ELC_EVENT_GPT7_CAPTURE_COMPARE_B 0x100
178
#define RA_ELC_EVENT_GPT7_COMPARE_C 0x101
179
#define RA_ELC_EVENT_GPT7_COMPARE_D 0x102
180
#define RA_ELC_EVENT_GPT7_COMPARE_E 0x103
181
#define RA_ELC_EVENT_GPT7_COMPARE_F 0x104
182
#define RA_ELC_EVENT_GPT7_COUNTER_OVERFLOW 0x105
183
#define RA_ELC_EVENT_GPT7_COUNTER_UNDERFLOW 0x106
184
#define RA_ELC_EVENT_GPT8_CAPTURE_COMPARE_A 0x108
185
#define RA_ELC_EVENT_GPT8_CAPTURE_COMPARE_B 0x109
186
#define RA_ELC_EVENT_GPT8_COMPARE_C 0x10A
187
#define RA_ELC_EVENT_GPT8_COMPARE_D 0x10B
188
#define RA_ELC_EVENT_GPT8_COMPARE_E 0x10C
189
#define RA_ELC_EVENT_GPT8_COMPARE_F 0x10D
190
#define RA_ELC_EVENT_GPT8_COUNTER_OVERFLOW 0x10E
191
#define RA_ELC_EVENT_GPT8_COUNTER_UNDERFLOW 0x10F
192
#define RA_ELC_EVENT_GPT9_CAPTURE_COMPARE_A 0x111
193
#define RA_ELC_EVENT_GPT9_CAPTURE_COMPARE_B 0x112
194
#define RA_ELC_EVENT_GPT9_COMPARE_C 0x113
195
#define RA_ELC_EVENT_GPT9_COMPARE_D 0x114
196
#define RA_ELC_EVENT_GPT9_COMPARE_E 0x115
197
#define RA_ELC_EVENT_GPT9_COMPARE_F 0x116
198
#define RA_ELC_EVENT_GPT9_COUNTER_OVERFLOW 0x117
199
#define RA_ELC_EVENT_GPT9_COUNTER_UNDERFLOW 0x118
200
#define RA_ELC_EVENT_OPS_UVW_EDGE 0x150
201
#define RA_ELC_EVENT_ADC0_SCAN_END 0x160
202
#define RA_ELC_EVENT_ADC0_SCAN_END_B 0x161
203
#define RA_ELC_EVENT_ADC0_WINDOW_A 0x162
204
#define RA_ELC_EVENT_ADC0_WINDOW_B 0x163
205
#define RA_ELC_EVENT_ADC0_COMPARE_MATCH 0x164
206
#define RA_ELC_EVENT_ADC0_COMPARE_MISMATCH 0x165
207
#define RA_ELC_EVENT_ADC1_SCAN_END 0x166
208
#define RA_ELC_EVENT_ADC1_SCAN_END_B 0x167
209
#define RA_ELC_EVENT_ADC1_WINDOW_A 0x168
210
#define RA_ELC_EVENT_ADC1_WINDOW_B 0x169
211
#define RA_ELC_EVENT_ADC1_COMPARE_MATCH 0x16A
212
#define RA_ELC_EVENT_ADC1_COMPARE_MISMATCH 0x16B
213
#define RA_ELC_EVENT_EDMAC0_EINT 0x16F
214
#define RA_ELC_EVENT_SCI0_RXI 0x180
215
#define RA_ELC_EVENT_SCI0_TXI 0x181
216
#define RA_ELC_EVENT_SCI0_TEI 0x182
217
#define RA_ELC_EVENT_SCI0_ERI 0x183
218
#define RA_ELC_EVENT_SCI0_AM 0x184
219
#define RA_ELC_EVENT_SCI0_RXI_OR_ERI 0x185
220
#define RA_ELC_EVENT_SCI1_RXI 0x186
221
#define RA_ELC_EVENT_SCI1_TXI 0x187
222
#define RA_ELC_EVENT_SCI1_TEI 0x188
223
#define RA_ELC_EVENT_SCI1_ERI 0x189
224
#define RA_ELC_EVENT_SCI2_RXI 0x18C
225
#define RA_ELC_EVENT_SCI2_TXI 0x18D
226
#define RA_ELC_EVENT_SCI2_TEI 0x18E
227
#define RA_ELC_EVENT_SCI2_ERI 0x18F
228
#define RA_ELC_EVENT_SCI3_RXI 0x192
229
#define RA_ELC_EVENT_SCI3_TXI 0x193
230
#define RA_ELC_EVENT_SCI3_TEI 0x194
231
#define RA_ELC_EVENT_SCI3_ERI 0x195
232
#define RA_ELC_EVENT_SCI3_AM 0x196
233
#define RA_ELC_EVENT_SCI4_RXI 0x198
234
#define RA_ELC_EVENT_SCI4_TXI 0x199
235
#define RA_ELC_EVENT_SCI4_TEI 0x19A
236
#define RA_ELC_EVENT_SCI4_ERI 0x19B
237
#define RA_ELC_EVENT_SCI4_AM 0x19C
238
#define RA_ELC_EVENT_SCI5_RXI 0x19E
239
#define RA_ELC_EVENT_SCI5_TXI 0x19F
240
#define RA_ELC_EVENT_SCI5_TEI 0x1A0
241
#define RA_ELC_EVENT_SCI5_ERI 0x1A1
242
#define RA_ELC_EVENT_SCI5_AM 0x1A2
243
#define RA_ELC_EVENT_SCI6_RXI 0x1A4
244
#define RA_ELC_EVENT_SCI6_TXI 0x1A5
245
#define RA_ELC_EVENT_SCI6_TEI 0x1A6
246
#define RA_ELC_EVENT_SCI6_ERI 0x1A7
247
#define RA_ELC_EVENT_SCI6_AM 0x1A8
248
#define RA_ELC_EVENT_SCI7_RXI 0x1AA
249
#define RA_ELC_EVENT_SCI7_TXI 0x1AB
250
#define RA_ELC_EVENT_SCI7_TEI 0x1AC
251
#define RA_ELC_EVENT_SCI7_ERI 0x1AD
252
#define RA_ELC_EVENT_SCI7_AM 0x1AE
253
#define RA_ELC_EVENT_SCI8_RXI 0x1B0
254
#define RA_ELC_EVENT_SCI8_TXI 0x1B1
255
#define RA_ELC_EVENT_SCI8_TEI 0x1B2
256
#define RA_ELC_EVENT_SCI8_ERI 0x1B3
257
#define RA_ELC_EVENT_SCI8_AM 0x1B4
258
#define RA_ELC_EVENT_SCI9_RXI 0x1B6
259
#define RA_ELC_EVENT_SCI9_TXI 0x1B7
260
#define RA_ELC_EVENT_SCI9_TEI 0x1B8
261
#define RA_ELC_EVENT_SCI9_ERI 0x1B9
262
#define RA_ELC_EVENT_SCI9_AM 0x1BA
263
#define RA_ELC_EVENT_SCIX0_SCIX0 0x1BC
264
#define RA_ELC_EVENT_SCI1_SCIX0 0x1BC
265
#define RA_ELC_EVENT_SCIX0_SCIX1 0x1BD
266
#define RA_ELC_EVENT_SCI1_SCIX1 0x1BD
267
#define RA_ELC_EVENT_SCIX0_SCIX2 0x1BE
268
#define RA_ELC_EVENT_SCI1_SCIX2 0x1BE
269
#define RA_ELC_EVENT_SCIX0_SCIX3 0x1BF
270
#define RA_ELC_EVENT_SCI1_SCIX3 0x1BF
271
#define RA_ELC_EVENT_SCIX1_SCIX0 0x1C0
272
#define RA_ELC_EVENT_SCI2_SCIX0 0x1C0
273
#define RA_ELC_EVENT_SCIX1_SCIX1 0x1C1
274
#define RA_ELC_EVENT_SCI2_SCIX1 0x1C1
275
#define RA_ELC_EVENT_SCIX1_SCIX2 0x1C2
276
#define RA_ELC_EVENT_SCI2_SCIX2 0x1C2
277
#define RA_ELC_EVENT_SCIX1_SCIX3 0x1C3
278
#define RA_ELC_EVENT_SCI2_SCIX3 0x1C3
279
#define RA_ELC_EVENT_SPI0_RXI 0x1C4
280
#define RA_ELC_EVENT_SPI0_TXI 0x1C5
281
#define RA_ELC_EVENT_SPI0_IDLE 0x1C6
282
#define RA_ELC_EVENT_SPI0_ERI 0x1C7
283
#define RA_ELC_EVENT_SPI0_TEI 0x1C8
284
#define RA_ELC_EVENT_SPI1_RXI 0x1C9
285
#define RA_ELC_EVENT_SPI1_TXI 0x1CA
286
#define RA_ELC_EVENT_SPI1_IDLE 0x1CB
287
#define RA_ELC_EVENT_SPI1_ERI 0x1CC
288
#define RA_ELC_EVENT_SPI1_TEI 0x1CD
289
#define RA_ELC_EVENT_OSPI_INT 0x1D9
290
#define RA_ELC_EVENT_QSPI_INT 0x1DA
291
#define RA_ELC_EVENT_DOC_INT 0x1DB
292
293
/* Possible peripherals to be linked to event signals */
294
#define RA_ELC_PERIPHERAL_GPT_A 0
295
#define RA_ELC_PERIPHERAL_GPT_B 1
296
#define RA_ELC_PERIPHERAL_GPT_C 2
297
#define RA_ELC_PERIPHERAL_GPT_D 3
298
#define RA_ELC_PERIPHERAL_GPT_E 4
299
#define RA_ELC_PERIPHERAL_GPT_F 5
300
#define RA_ELC_PERIPHERAL_GPT_G 6
301
#define RA_ELC_PERIPHERAL_GPT_H 7
302
#define RA_ELC_PERIPHERAL_ADC0 8
303
#define RA_ELC_PERIPHERAL_ADC0_B 9
304
#define RA_ELC_PERIPHERAL_ADC1 10
305
#define RA_ELC_PERIPHERAL_ADC1_B 11
306
#define RA_ELC_PERIPHERAL_DAC0 12
307
#define RA_ELC_PERIPHERAL_DAC1 13
308
#define RA_ELC_PERIPHERAL_IOPORT1 14
309
#define RA_ELC_PERIPHERAL_IOPORT2 15
310
#define RA_ELC_PERIPHERAL_IOPORT3 16
311
#define RA_ELC_PERIPHERAL_IOPORT4 17
312
#define RA_ELC_PERIPHERAL_CTSU 18
313
314
#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_MISC_RENESAS_RA_ELC_RA6M4_ELC_H_ */
include
zephyr
dt-bindings
misc
renesas
ra-elc
ra6m4-elc.h
Generated on Fri Jun 20 2025 13:59:09 for Zephyr Project API by
1.9.8