Zephyr Project API
4.3.99
A Scalable Open Source RTOS
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rtl8752h-pinctrl.h
Go to the documentation of this file.
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/*
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* Copyright (c) 2026, Realtek Semiconductor Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RTL8752H_PINCTRL_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RTL8752H_PINCTRL_H_
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#include "
bee-pinctrl.h
"
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#define BEE_IDLE_MODE 0
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#define BEE_UART2_TX 1
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#define BEE_UART2_RX 2
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#define BEE_UART2_CTS 3
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#define BEE_UART2_RTS 4
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#define BEE_I2C0_CLK 5
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#define BEE_I2C0_DAT 6
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#define BEE_I2C1_CLK 7
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#define BEE_I2C1_DAT 8
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#define BEE_PWM2_P 9
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#define BEE_PWM2_N 10
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#define BEE_ENPWM0_P 11
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#define BEE_ENPWM0_N 12
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#define BEE_TIM_PWM0 13
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#define BEE_TIM_PWM1 14
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#define BEE_TIM_PWM2 15
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#define BEE_TIM_PWM3 16
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#define BEE_TIM_PWM4 17
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#define BEE_TIM_PWM5 18
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#define BEE_ENPWM0 19
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#define BEE_ENPWM1 20
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#define BEE_QDEC_PHASE_A_X 21
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#define BEE_QDEC_PHASE_B_X 22
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#define BEE_QDEC_PHASE_A_Y 23
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#define BEE_QDEC_PHASE_B_Y 24
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#define BEE_QDEC_PHASE_A_Z 25
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#define BEE_QDEC_PHASE_B_Z 26
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#define BEE_UART0_TX 29
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#define BEE_UART0_RX 30
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#define BEE_UART0_CTS 31
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#define BEE_UART0_RTS 32
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#define BEE_IRDA_TX 33
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#define BEE_IRDA_RX 34
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#define BEE_UART1_TX 35
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#define BEE_UART1_RX 36
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#define BEE_UART1_CTS 37
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#define BEE_UART1_RTS 38
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#define BEE_SPI1_SS_N_0_MASTER 39
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#define BEE_SPI1_SS_N_1_MASTER 40
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#define BEE_SPI1_SS_N_2_MASTER 41
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#define BEE_SPI1_CLK_MASTER 42
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#define BEE_SPI1_MO_MASTER 43
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#define BEE_SPI1_MI_MASTER 44
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#define BEE_SPI0_SS_N_0_SLAVE 45
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#define BEE_SPI0_CLK_SLAVE 46
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#define BEE_SPI0_SO_SLAVE 47
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#define BEE_SPI0_SI_SLAVE 48
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#define BEE_SPI0_SS_N_0_MASTER 49
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#define BEE_SPI0_CLK_MASTER 50
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#define BEE_SPI0_MO_MASTER 51
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#define BEE_SPI0_MI_MASTER 52
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#define BEE_SPI2W_DATA 53
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#define BEE_SPI2W_CLK 54
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#define BEE_SPI2W_CS 55
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#define BEE_SWD_CLK 56
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#define BEE_SWD_DIO 57
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#define BEE_KEY_COL_0 58
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#define BEE_KEY_COL_1 59
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#define BEE_KEY_COL_2 60
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#define BEE_KEY_COL_3 61
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#define BEE_KEY_COL_4 62
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#define BEE_KEY_COL_5 63
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#define BEE_KEY_COL_6 64
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#define BEE_KEY_COL_7 65
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#define BEE_KEY_COL_8 66
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#define BEE_KEY_COL_9 67
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#define BEE_KEY_COL_10 68
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#define BEE_KEY_COL_11 69
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#define BEE_KEY_COL_12 70
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#define BEE_KEY_COL_13 71
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#define BEE_KEY_COL_14 72
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#define BEE_KEY_COL_15 73
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#define BEE_KEY_COL_16 74
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#define BEE_KEY_COL_17 75
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#define BEE_KEY_COL_18 76
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#define BEE_KEY_COL_19 77
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#define BEE_KEY_ROW_0 78
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#define BEE_KEY_ROW_1 79
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#define BEE_KEY_ROW_2 80
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#define BEE_KEY_ROW_3 81
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#define BEE_KEY_ROW_4 82
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#define BEE_KEY_ROW_5 83
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#define BEE_KEY_ROW_6 84
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#define BEE_KEY_ROW_7 85
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#define BEE_KEY_ROW_8 86
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#define BEE_KEY_ROW_9 87
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#define BEE_KEY_ROW_10 88
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#define BEE_KEY_ROW_11 89
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#define BEE_DWGPIO 90
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#define BEE_DMIC1_CLK 96
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#define BEE_DMIC1_DAT 97
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#define BEE_LRC_I_CODEC_SLAVE 98
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#define BEE_BCLK_I_CODEC_SLAVE 99
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#define BEE_SDI_CODEC_SLAVE 100
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#define BEE_SDO_CODEC_SLAVE 101
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#define BEE_BT_COEX_I_0 106
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#define BEE_BT_COEX_I_1 107
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#define BEE_BT_COEX_I_2 108
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#define BEE_BT_COEX_I_3 109
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#define BEE_BT_COEX_O_0 110
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#define BEE_BT_COEX_O_1 111
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#define BEE_BT_COEX_O_2 112
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#define BEE_BT_COEX_O_3 113
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#define BEE_PTA_I2C_CLK_SLAVE 114
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#define BEE_PTA_I2C_DAT_SLAVE 115
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#define BEE_PTA_I2C_INT_OUT 116
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#define BEE_EN_EXPA 117
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#define BEE_EN_EXLNA 118
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#define BEE_LRC_SPORT0 123
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#define BEE_BCLK_SPORT0 124
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#define BEE_ADCDAT_SPORT0 125
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#define BEE_DACDAT_SPORT0 126
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#define BEE_MCLK 127
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#define BEE_PINMUX_MAX (BEE_MCLK + 1)
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#define BEE_SW_MODE (BEE_PINMUX_MAX + 1)
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#define BEE_PWR_OFF (BEE_PINMUX_MAX + 2)
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#define BEE_PIN_DISCONNECTED BEE_PIN_MSK
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#define P0_0 0
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#define P0_1 1
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#define P0_2 2
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/* Note: P0_3 defaults to outputting the Realtek internal log for rtl8752h. */
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#define P0_3 3
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#define P0_4 4
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#define P0_5 5
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#define P0_6 6
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#define P0_7 7
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/* Note: P1_0/P1_1 default to SWD function for rtl8752h. */
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#define P1_0 8
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#define P1_1 9
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#define P1_3 11
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#define P1_4 12
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#define P1_6 14
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#define P1_7 15
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#define P2_0 16
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#define P2_1 17
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#define P2_2 18
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#define P2_3 19
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#define P2_4 20
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#define P2_5 21
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#define P2_6 22
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#define P2_7 23
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#define P3_0 24
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#define P3_1 25
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#define P3_2 26
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#define P3_3 27
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#define P3_4 28
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#define P3_5 29
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#define P3_6 30
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#define P4_0 32
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#define P4_1 33
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#define P4_2 34
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#define P4_3 35
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#define H_0 36
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#define P5_1 37
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#define P5_2 38
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/* Port 0 */
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#define BEE_PSEL_GPIOA_0_P0_0 BEE_PSEL(DWGPIO, P0_0)
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#define BEE_PSEL_GPIOA_1_P0_1 BEE_PSEL(DWGPIO, P0_1)
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#define BEE_PSEL_GPIOA_2_P0_2 BEE_PSEL(DWGPIO, P0_2)
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/* Note: P0_3 defaults to outputting the Realtek internal log for rtl8752h. */
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#define BEE_PSEL_GPIOA_3_P0_3 BEE_PSEL(DWGPIO, P0_3)
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#define BEE_PSEL_GPIOA_4_P0_4 BEE_PSEL(DWGPIO, P0_4)
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#define BEE_PSEL_GPIOA_5_P0_5 BEE_PSEL(DWGPIO, P0_5)
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#define BEE_PSEL_GPIOA_6_P0_6 BEE_PSEL(DWGPIO, P0_6)
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#define BEE_PSEL_GPIOA_7_P0_7 BEE_PSEL(DWGPIO, P0_7)
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/* Port 1 */
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/* Note: P1_0/P1_1 default to SWD function for rtl8752h. */
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#define BEE_PSEL_GPIOA_8_P1_0 BEE_PSEL(DWGPIO, P1_0)
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#define BEE_PSEL_GPIOA_9_P1_1 BEE_PSEL(DWGPIO, P1_1)
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#define BEE_PSEL_GPIOA_11_P1_3 BEE_PSEL(DWGPIO, P1_3)
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#define BEE_PSEL_GPIOA_12_P1_4 BEE_PSEL(DWGPIO, P1_4)
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#define BEE_PSEL_GPIOA_14_P1_6 BEE_PSEL(DWGPIO, P1_6)
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#define BEE_PSEL_GPIOA_15_P1_7 BEE_PSEL(DWGPIO, P1_7)
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/* Port 2 */
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#define BEE_PSEL_GPIOA_16_P2_0 BEE_PSEL(DWGPIO, P2_0)
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#define BEE_PSEL_GPIOA_17_P2_1 BEE_PSEL(DWGPIO, P2_1)
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#define BEE_PSEL_GPIOA_18_P2_2 BEE_PSEL(DWGPIO, P2_2)
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#define BEE_PSEL_GPIOA_19_P2_3 BEE_PSEL(DWGPIO, P2_3)
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#define BEE_PSEL_GPIOA_20_P2_4 BEE_PSEL(DWGPIO, P2_4)
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#define BEE_PSEL_GPIOA_21_P2_5 BEE_PSEL(DWGPIO, P2_5)
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#define BEE_PSEL_GPIOA_22_P2_6 BEE_PSEL(DWGPIO, P2_6)
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#define BEE_PSEL_GPIOA_23_P2_7 BEE_PSEL(DWGPIO, P2_7)
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/* Port 3 */
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#define BEE_PSEL_GPIOA_24_P3_0 BEE_PSEL(DWGPIO, P3_0)
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#define BEE_PSEL_GPIOA_25_P3_1 BEE_PSEL(DWGPIO, P3_1)
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#define BEE_PSEL_GPIOA_26_P3_2 BEE_PSEL(DWGPIO, P3_2)
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#define BEE_PSEL_GPIOA_27_P3_3 BEE_PSEL(DWGPIO, P3_3)
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#define BEE_PSEL_GPIOA_28_P3_4 BEE_PSEL(DWGPIO, P3_4)
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#define BEE_PSEL_GPIOA_29_P3_5 BEE_PSEL(DWGPIO, P3_5)
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#define BEE_PSEL_GPIOA_30_P3_6 BEE_PSEL(DWGPIO, P3_6)
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/* Port 4 */
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#define BEE_PSEL_GPIOA_13_P4_0 BEE_PSEL(DWGPIO, P4_0)
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#define BEE_PSEL_GPIOA_29_P4_1 BEE_PSEL(DWGPIO, P4_1)
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#define BEE_PSEL_GPIOA_30_P4_2 BEE_PSEL(DWGPIO, P4_2)
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#define BEE_PSEL_GPIOA_31_P4_3 BEE_PSEL(DWGPIO, P4_3)
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/* Port 5 */
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#define BEE_PSEL_GPIOA_11_P5_1 BEE_PSEL(DWGPIO, P5_1)
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#define BEE_PSEL_GPIOA_12_P5_2 BEE_PSEL(DWGPIO, P5_2)
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/* Other Ports (H) */
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#define BEE_PSEL_GPIOA_10_H_0 BEE_PSEL(DWGPIO, H_0)
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#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RTL8752H_PINCTRL_H_ */
bee-pinctrl.h
Realtek BEE Pinctrl Devicetree Bindings.
include
zephyr
dt-bindings
pinctrl
rtl8752h-pinctrl.h
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