Zephyr Project API 4.2.99
A Scalable Open Source RTOS
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scb.h
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1/*
2 * Copyright (c) 2025 STMicroelectronics
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
14#ifndef ARM_CORTEX_M_SCB_H_
15#define ARM_CORTEX_M_SCB_H_
16
17#include <stdint.h>
18#include <cmsis_core.h>
19
20/* Define macros for CPU-conditional features */
21#if defined(CONFIG_CPU_CORTEX_M0) || \
22 defined(CONFIG_CPU_CORTEX_M0PLUS) || \
23 defined(CONFIG_CPU_CORTEX_M1) || \
24 defined(CONFIG_CPU_CORTEX_M23)
25#define SHPR_SIZE_W 2
26#else
27#define SHPR_SIZE_W 3
28#define CPACR_PRESENT 1
29#endif
30
40#if defined(CONFIG_CPU_CORTEX_M_HAS_VTOR)
41 uint32_t vtor;
42#endif
48#if defined(CPACR_PRESENT)
50#endif /* CPACR_PRESENT */
51};
52
68void z_arm_save_scb_context(struct scb_context *context);
69
84void z_arm_restore_scb_context(const struct scb_context *context);
85
88#endif /* ARM_CORTEX_M_SCB_H_ */
#define SHPR_SIZE_W
Definition scb.h:27
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
Structure to store essential, mutable SCB register values for backup/restore.
Definition scb.h:39
uint32_t ccr
Configuration Control Register.
Definition scb.h:45
uint32_t shcsr
System Handler Control and State Register.
Definition scb.h:47
uint32_t cpacr
Coprocessor Access Control Register.
Definition scb.h:49
uint32_t scr
System Control Register.
Definition scb.h:44
uint32_t shpr[3]
System Handler Priority Registers.
Definition scb.h:46
uint32_t aircr
Application Interrupt and Reset Control Register.
Definition scb.h:43