Zephyr Project API 4.1.99
A Scalable Open Source RTOS
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siwx91x-pinctrl.h
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1/*
2 * Copyright (c) 2024 Silicon Laboratories Inc.
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6#ifndef INCLUDE_ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_SIWX91X_PINCTRL_H_
7#define INCLUDE_ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_SIWX91X_PINCTRL_H_
8
9#include <zephyr/dt-bindings/pinctrl/silabs-pinctrl-siwx91x.h>
10
11/* clang-format off */
12
13#define AGPIO_ULP0 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 0)
14#define AGPIO_ULP1 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 1)
15#define AGPIO_ULP2 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 2)
16#define AGPIO_ULP4 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 4)
17#define AGPIO_ULP5 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 5)
18#define AGPIO_ULP6 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 6)
19#define AGPIO_ULP7 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 7)
20#define AGPIO_ULP8 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 8)
21#define AGPIO_ULP9 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 9)
22#define AGPIO_ULP10 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 10)
23#define AGPIO_ULP11 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 11)
24
25#define ADC_TOPGPIO_HP25 SIWX91X_GPIO(14, 0xFF, 0, 1, 9, 0)
26#define ADC_TOPGPIO_HP26 SIWX91X_GPIO(14, 0xFF, 0, 1, 10, 0)
27#define ADC_TOPGPIO_HP27 SIWX91X_GPIO(14, 0xFF, 0, 1, 11, 0)
28#define ADC_TOPGPIO_HP28 SIWX91X_GPIO(14, 0xFF, 0, 1, 12, 0)
29#define ADC_TOPGPIO_HP29 SIWX91X_GPIO(14, 0xFF, 0, 1, 13, 0)
30#define ADC_TOPGPIO_HP30 SIWX91X_GPIO(14, 0xFF, 0, 1, 14, 0)
31
32#define AUXULP_TRIG0_HP11 SIWX91X_GPIO(9, 5, 6, 0, 11, 5)
33#define AUXULP_TRIG0_HP30 SIWX91X_GPIO(11, 5, 0, 1, 14, 11)
34#define AUXULP_TRIG0_HP49 SIWX91X_GPIO(9, 5, 13, 3, 1, 11)
35#define AUXULP_TRIG0_ULP5 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 5)
36#define AUXULP_TRIG0_ULP6 SIWX91X_GPIO(0xFF, 10, 0xFF, 4, 0, 6)
37#define AUXULP_TRIG0_ULP11 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 11)
38#define AUXULP_TRIG1_ULP4 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 4)
39#define AUXULP_TRIG1_ULP7 SIWX91X_GPIO(0xFF, 10, 0xFF, 4, 0, 7)
40
41#define CLK_I2SPLL_HP27 SIWX91X_GPIO(12, 0xFF, 0, 1, 11, 0)
42#define CLK_I2SPLL_HP48 SIWX91X_GPIO(10, 0xFF, 12, 3, 0, 0)
43#define CLK_I2SPLL_HP54 SIWX91X_GPIO(10, 0xFF, 18, 3, 6, 0)
44#define CLK_INTFPLL_HP26 SIWX91X_GPIO(12, 0xFF, 0, 1, 10, 0)
45#define CLK_INTFPLL_HP47 SIWX91X_GPIO(10, 0xFF, 11, 2, 15, 0)
46#define CLK_INTFPLL_HP53 SIWX91X_GPIO(10, 0xFF, 17, 3, 5, 0)
47#define CLK_MCUOUT_HP11 SIWX91X_GPIO(12, 0xFF, 6, 0, 11, 0)
48#define CLK_MEMSREF_HP50 SIWX91X_GPIO(10, 0xFF, 14, 3, 2, 0)
49#define CLK_MEMSREF_HP56 SIWX91X_GPIO(10, 0xFF, 20, 3, 8, 0)
50#define CLK_OUT_HP12 SIWX91X_GPIO(8, 0xFF, 7, 0, 12, 0)
51#define CLK_OUT_HP15 SIWX91X_GPIO(8, 0xFF, 8, 0, 15, 0)
52#define CLK_PLLTESTMODE_HP51 SIWX91X_GPIO(10, 0xFF, 15, 3, 3, 0)
53#define CLK_SOCPLL_HP25 SIWX91X_GPIO(12, 0xFF, 0, 1, 9, 0)
54#define CLK_SOCPLL_HP46 SIWX91X_GPIO(10, 0xFF, 10, 2, 14, 0)
55#define CLK_SOCPLL_HP52 SIWX91X_GPIO(10, 0xFF, 16, 3, 4, 0)
56#define CLK_XTALONIN_HP28 SIWX91X_GPIO(12, 0xFF, 0, 1, 12, 0)
57#define CLK_XTALONIN_HP57 SIWX91X_GPIO(10, 0xFF, 21, 3, 9, 0)
58
59#define COMP1_OUT_HP8 SIWX91X_GPIO(9, 5, 3, 0, 8, 2)
60#define COMP1_OUT_HP28 SIWX91X_GPIO(11, 5, 0, 1, 12, 9)
61#define COMP1_OUT_HP47 SIWX91X_GPIO(9, 5, 11, 2, 15, 9)
62#define COMP1_OUT_ULP2 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 2)
63#define COMP1_OUT_ULP6 SIWX91X_GPIO(0xFF, 9, 0xFF, 4, 0, 6)
64#define COMP2_OUT_ULP7 SIWX91X_GPIO(0xFF, 9, 0xFF, 4, 0, 7)
65
66#define GSPI_CLK_HP8 SIWX91X_GPIO(4, 0xFF, 3, 0, 8, 0)
67#define GSPI_CLK_HP25 SIWX91X_GPIO(4, 0xFF, 0, 1, 9, 0)
68#define GSPI_CLK_HP46 SIWX91X_GPIO(4, 0xFF, 10, 2, 14, 0)
69#define GSPI_CLK_HP52 SIWX91X_GPIO(4, 0xFF, 16, 3, 4, 0)
70#define GSPI_CS0_HP9 SIWX91X_GPIO(4, 0xFF, 4, 0, 9, 0)
71#define GSPI_CS0_HP28 SIWX91X_GPIO(4, 0xFF, 0, 1, 12, 0)
72#define GSPI_CS0_HP49 SIWX91X_GPIO(4, 0xFF, 13, 3, 1, 0)
73#define GSPI_CS0_HP53 SIWX91X_GPIO(4, 0xFF, 17, 3, 5, 0)
74#define GSPI_CS1_HP10 SIWX91X_GPIO(4, 0xFF, 5, 0, 10, 0)
75#define GSPI_CS1_HP29 SIWX91X_GPIO(4, 0xFF, 0, 1, 13, 0)
76#define GSPI_CS1_HP50 SIWX91X_GPIO(4, 0xFF, 14, 3, 2, 0)
77#define GSPI_CS1_HP54 SIWX91X_GPIO(4, 0xFF, 18, 3, 6, 0)
78#define GSPI_CS2_HP15 SIWX91X_GPIO(4, 0xFF, 8, 0, 15, 0)
79#define GSPI_CS2_HP30 SIWX91X_GPIO(4, 0xFF, 0, 1, 14, 0)
80#define GSPI_CS2_HP51 SIWX91X_GPIO(4, 0xFF, 15, 3, 3, 0)
81#define GSPI_CS2_HP55 SIWX91X_GPIO(4, 0xFF, 19, 3, 7, 0)
82#define GSPI_MISO_HP11 SIWX91X_GPIO(4, 0xFF, 6, 0, 11, 0)
83#define GSPI_MISO_HP26 SIWX91X_GPIO(4, 0xFF, 0, 1, 10, 0)
84#define GSPI_MISO_HP47 SIWX91X_GPIO(4, 0xFF, 11, 2, 15, 0)
85#define GSPI_MISO_HP56 SIWX91X_GPIO(4, 0xFF, 20, 3, 8, 0)
86#define GSPI_MOSI_HP6 SIWX91X_GPIO(12, 0xFF, 1, 0, 6, 0)
87#define GSPI_MOSI_HP12 SIWX91X_GPIO(4, 0xFF, 7, 0, 12, 0)
88#define GSPI_MOSI_HP27 SIWX91X_GPIO(4, 0xFF, 0, 1, 11, 0)
89#define GSPI_MOSI_HP48 SIWX91X_GPIO(4, 0xFF, 12, 3, 0, 0)
90#define GSPI_MOSI_HP57 SIWX91X_GPIO(4, 0xFF, 21, 3, 9, 0)
91
92#define I2C0_SCL_HP7 SIWX91X_GPIO(4, 0xFF, 2, 0, 7, 0)
93#define I2C0_SCL_HP32 SIWX91X_GPIO(11, 0xFF, 9, 2, 0, 0)
94#define I2C0_SCL_ULP1 SIWX91X_GPIO(4, 6, 23, 4, 1, 1)
95#define I2C0_SCL_ULP2 SIWX91X_GPIO(4, 6, 24, 4, 2, 2)
96#define I2C0_SCL_ULP11 SIWX91X_GPIO(4, 6, 33, 4, 11, 11)
97#define I2C0_SDA_HP6 SIWX91X_GPIO(4, 0xFF, 1, 0, 6, 0)
98#define I2C0_SDA_HP31 SIWX91X_GPIO(11, 0xFF, 9, 1, 15, 0)
99#define I2C0_SDA_ULP0 SIWX91X_GPIO(4, 6, 22, 4, 0, 0)
100#define I2C0_SDA_ULP3 SIWX91X_GPIO(4, 6, 25, 4, 3, 3)
101#define I2C0_SDA_ULP10 SIWX91X_GPIO(4, 6, 32, 4, 10, 10)
102
103#define I2C1_SCL_HP6 SIWX91X_GPIO(5, 0xFF, 1, 0, 6, 0)
104#define I2C1_SCL_HP29 SIWX91X_GPIO(5, 0xFF, 0, 1, 13, 0)
105#define I2C1_SCL_HP33 SIWX91X_GPIO(11, 0xFF, 9, 2, 1, 0)
106#define I2C1_SCL_HP50 SIWX91X_GPIO(5, 0xFF, 14, 3, 2, 0)
107#define I2C1_SCL_HP54 SIWX91X_GPIO(5, 0xFF, 18, 3, 6, 0)
108#define I2C1_SCL_ULP0 SIWX91X_GPIO(5, 6, 22, 4, 0, 0)
109#define I2C1_SCL_ULP2 SIWX91X_GPIO(5, 6, 24, 4, 2, 2)
110#define I2C1_SCL_ULP6 SIWX91X_GPIO(5, 6, 28, 4, 6, 6)
111#define I2C1_SDA_HP7 SIWX91X_GPIO(5, 0xFF, 2, 0, 7, 0)
112#define I2C1_SDA_HP30 SIWX91X_GPIO(5, 0xFF, 0, 1, 14, 0)
113#define I2C1_SDA_HP34 SIWX91X_GPIO(11, 0xFF, 9, 2, 2, 0)
114#define I2C1_SDA_HP51 SIWX91X_GPIO(5, 0xFF, 15, 3, 3, 0)
115#define I2C1_SDA_HP55 SIWX91X_GPIO(5, 0xFF, 19, 3, 7, 0)
116#define I2C1_SDA_ULP1 SIWX91X_GPIO(5, 6, 23, 4, 1, 1)
117#define I2C1_SDA_ULP3 SIWX91X_GPIO(5, 6, 25, 4, 3, 3)
118#define I2C1_SDA_ULP7 SIWX91X_GPIO(5, 6, 29, 4, 7, 7)
119
120#define I2S0_CLK_HP8 SIWX91X_GPIO(7, 0xFF, 3, 0, 8, 0)
121#define I2S0_CLK_HP25 SIWX91X_GPIO(7, 0xFF, 0, 1, 9, 0)
122#define I2S0_CLK_HP46 SIWX91X_GPIO(7, 0xFF, 10, 2, 14, 0)
123#define I2S0_CLK_HP52 SIWX91X_GPIO(7, 0xFF, 16, 3, 4, 0)
124#define I2S0_DIN0_HP10 SIWX91X_GPIO(7, 0xFF, 5, 0, 10, 0)
125#define I2S0_DIN0_HP27 SIWX91X_GPIO(7, 0xFF, 0, 1, 11, 0)
126#define I2S0_DIN0_HP48 SIWX91X_GPIO(7, 0xFF, 12, 3, 0, 0)
127#define I2S0_DIN0_HP56 SIWX91X_GPIO(7, 0xFF, 20, 3, 8, 0)
128#define I2S0_DIN1_HP6 SIWX91X_GPIO(7, 0xFF, 1, 0, 6, 0)
129#define I2S0_DIN1_HP29 SIWX91X_GPIO(7, 0xFF, 0, 1, 13, 0)
130#define I2S0_DIN1_HP50 SIWX91X_GPIO(7, 0xFF, 14, 3, 2, 0)
131#define I2S0_DIN1_HP54 SIWX91X_GPIO(7, 0xFF, 18, 3, 6, 0)
132#define I2S0_DOUT0_HP11 SIWX91X_GPIO(7, 0xFF, 6, 0, 11, 0)
133#define I2S0_DOUT0_HP28 SIWX91X_GPIO(7, 0xFF, 0, 1, 12, 0)
134#define I2S0_DOUT0_HP49 SIWX91X_GPIO(7, 0xFF, 13, 3, 1, 0)
135#define I2S0_DOUT0_HP57 SIWX91X_GPIO(7, 0xFF, 21, 3, 9, 0)
136#define I2S0_DOUT1_HP7 SIWX91X_GPIO(7, 0xFF, 2, 0, 7, 0)
137#define I2S0_DOUT1_HP29 SIWX91X_GPIO(7, 0xFF, 0, 1, 14, 0)
138#define I2S0_DOUT1_HP51 SIWX91X_GPIO(7, 0xFF, 15, 3, 3, 0)
139#define I2S0_DOUT1_HP55 SIWX91X_GPIO(7, 0xFF, 19, 3, 7, 0)
140#define I2S0_WS_HP9 SIWX91X_GPIO(7, 0xFF, 4, 0, 9, 0)
141#define I2S0_WS_HP26 SIWX91X_GPIO(7, 0xFF, 0, 1, 10, 0)
142#define I2S0_WS_HP47 SIWX91X_GPIO(7, 0xFF, 11, 2, 15, 0)
143#define I2S0_WS_HP53 SIWX91X_GPIO(7, 0xFF, 17, 3, 5, 0)
144
145#define IR_INPUT_HP15 SIWX91X_GPIO(9, 1, 8, 0, 15, 7)
146#define IR_INPUT_HP26 SIWX91X_GPIO(11, 1, 0, 1, 10, 7)
147#define IR_INPUT_HP29 SIWX91X_GPIO(11, 4, 0, 1, 13, 10)
148#define IR_INPUT_HP48 SIWX91X_GPIO(9, 4, 12, 3, 0, 10)
149#define IR_INPUT_ULP4 SIWX91X_GPIO(0xFF, 10, 0xFF, 4, 0, 4)
150#define IR_INPUT_ULP7 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 7)
151#define IR_INPUT_ULP10 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 10)
152#define IR_OUTPUT_HP11 SIWX91X_GPIO(9, 1, 6, 0, 11, 5)
153#define IR_OUTPUT_ULP5 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 5)
154
155#define PMU_TEST1_HP6 SIWX91X_GPIO(8, 0xFF, 1, 0, 6, 0)
156#define PMU_TEST1_HP29 SIWX91X_GPIO(8, 0xFF, 0, 1, 13, 0)
157#define PMU_TEST1_HP30 SIWX91X_GPIO(12, 0xFF, 0, 1, 14, 0)
158#define PMU_TEST1_ULP0 SIWX91X_GPIO(13, 6, 22, 4, 0, 0)
159#define PMU_TEST1_ULP2 SIWX91X_GPIO(10, 6, 24, 4, 2, 2)
160#define PMU_TEST1_ULP6 SIWX91X_GPIO(12, 6, 28, 4, 6, 6)
161#define PMU_TEST1_ULP10 SIWX91X_GPIO(10, 6, 32, 4, 10, 10)
162#define PMU_TEST2_HP7 SIWX91X_GPIO(8, 0xFF, 2, 0, 7, 0)
163#define PMU_TEST2_HP30 SIWX91X_GPIO(8, 0xFF, 0, 1, 14, 0)
164#define PMU_TEST2_ULP1 SIWX91X_GPIO(13, 6, 23, 4, 1, 1)
165#define PMU_TEST2_ULP3 SIWX91X_GPIO(10, 6, 25, 4, 3, 3)
166#define PMU_TEST2_ULP7 SIWX91X_GPIO(12, 6, 29, 4, 7, 7)
167#define PMU_TEST2_ULP11 SIWX91X_GPIO(10, 6, 33, 4, 11, 11)
168
169#define PSRAM_CLK_HP46 SIWX91X_GPIO(11, 0xFF, 10, 2, 14, 0)
170#define PSRAM_CLK_HP52 SIWX91X_GPIO(12, 0xFF, 16, 3, 4, 0)
171#define PSRAM_CSN0_HP49 SIWX91X_GPIO(11, 0xFF, 13, 3, 1, 0)
172#define PSRAM_CSN0_HP55 SIWX91X_GPIO(12, 0xFF, 19, 3, 7, 0)
173#define PSRAM_CSN1_HP53 SIWX91X_GPIO(11, 0xFF, 17, 3, 5, 0)
174#define PSRAM_D0_HP47 SIWX91X_GPIO(11, 0xFF, 11, 2, 15, 0)
175#define PSRAM_D0_HP53 SIWX91X_GPIO(12, 0xFF, 17, 3, 5, 0)
176#define PSRAM_D1_HP48 SIWX91X_GPIO(11, 0xFF, 12, 3, 0, 0)
177#define PSRAM_D1_HP54 SIWX91X_GPIO(12, 0xFF, 18, 3, 6, 0)
178#define PSRAM_D2_HP50 SIWX91X_GPIO(11, 0xFF, 14, 3, 2, 0)
179#define PSRAM_D2_HP56 SIWX91X_GPIO(12, 0xFF, 20, 3, 8, 0)
180#define PSRAM_D3_HP51 SIWX91X_GPIO(11, 0xFF, 15, 3, 3, 0)
181#define PSRAM_D3_HP57 SIWX91X_GPIO(12, 0xFF, 21, 3, 9, 0)
182#define PSRAM_D4_HP54 SIWX91X_GPIO(11, 0xFF, 18, 3, 6, 0)
183#define PSRAM_D5_HP55 SIWX91X_GPIO(11, 0xFF, 19, 3, 7, 0)
184#define PSRAM_D6_HP56 SIWX91X_GPIO(11, 0xFF, 20, 3, 8, 0)
185#define PSRAM_D7_HP57 SIWX91X_GPIO(11, 0xFF, 21, 3, 9, 0)
186
187#define PWM_0H_HP7 SIWX91X_GPIO(10, 0xFF, 2, 0, 7, 0)
188#define PWM_0H_ULP1 SIWX91X_GPIO(12, 6, 23, 4, 1, 1)
189#define PWM_0L_HP6 SIWX91X_GPIO(10, 0xFF, 1, 0, 6, 0)
190#define PWM_0L_ULP0 SIWX91X_GPIO(12, 6, 22, 4, 0, 0)
191#define PWM_1H_HP9 SIWX91X_GPIO(10, 0xFF, 4, 0, 9, 0)
192#define PWM_1H_ULP3 SIWX91X_GPIO(8, 6, 25, 4, 3, 3)
193#define PWM_1H_ULP5 SIWX91X_GPIO(12, 6, 27, 4, 5, 5)
194#define PWM_1L_HP8 SIWX91X_GPIO(10, 0xFF, 3, 0, 8, 0)
195#define PWM_1L_ULP2 SIWX91X_GPIO(8, 6, 24, 4, 2, 2)
196#define PWM_1L_ULP4 SIWX91X_GPIO(12, 6, 26, 4, 4, 4)
197#define PWM_2H_HP11 SIWX91X_GPIO(10, 0xFF, 6, 0, 11, 0)
198#define PWM_2H_ULP5 SIWX91X_GPIO(8, 6, 27, 4, 5, 5)
199#define PWM_2L_HP10 SIWX91X_GPIO(10, 0xFF, 5, 0, 10, 0)
200#define PWM_2L_ULP4 SIWX91X_GPIO(8, 6, 26, 4, 4, 4)
201#define PWM_3H_HP15 SIWX91X_GPIO(10, 0xFF, 8, 0, 15, 0)
202#define PWM_3H_ULP7 SIWX91X_GPIO(8, 6, 29, 4, 7, 7)
203#define PWM_3L_HP12 SIWX91X_GPIO(10, 0xFF, 7, 0, 12, 0)
204#define PWM_3L_ULP6 SIWX91X_GPIO(8, 6, 28, 4, 6, 6)
205#define PWM_EXTTRIG0_HP27 SIWX91X_GPIO(10, 0xFF, 0, 1, 11, 0)
206#define PWM_EXTTRIG0_HP51 SIWX91X_GPIO(8, 0xFF, 15, 3, 3, 0)
207#define PWM_EXTTRIG0_ULP6 SIWX91X_GPIO(10, 6, 28, 4, 6, 6)
208#define PWM_EXTTRIG0_ULP11 SIWX91X_GPIO(8, 6, 33, 4, 11, 11)
209#define PWM_EXTTRIG1_HP28 SIWX91X_GPIO(10, 0xFF, 0, 1, 12, 0)
210#define PWM_EXTTRIG1_HP54 SIWX91X_GPIO(8, 0xFF, 18, 3, 6, 0)
211#define PWM_EXTTRIG1_ULP7 SIWX91X_GPIO(10, 6, 29, 4, 7, 7)
212#define PWM_EXTTRIG2_HP29 SIWX91X_GPIO(10, 0xFF, 0, 1, 13, 0)
213#define PWM_EXTTRIG2_HP55 SIWX91X_GPIO(8, 0xFF, 19, 3, 7, 0)
214#define PWM_EXTTRIG2_ULP8 SIWX91X_GPIO(10, 6, 30, 4, 8, 8)
215#define PWM_EXTTRIG3_HP30 SIWX91X_GPIO(10, 0xFF, 0, 1, 14, 0)
216#define PWM_EXTTRIG3_HP50 SIWX91X_GPIO(8, 0xFF, 14, 3, 2, 0)
217#define PWM_EXTTRIG3_ULP9 SIWX91X_GPIO(10, 6, 31, 4, 9, 9)
218#define PWM_FAULTA_HP25 SIWX91X_GPIO(10, 0xFF, 0, 1, 9, 0)
219#define PWM_FAULTA_ULP4 SIWX91X_GPIO(10, 6, 26, 4, 4, 4)
220#define PWM_FAULTA_ULP9 SIWX91X_GPIO(8, 6, 31, 4, 9, 9)
221#define PWM_FAULTB_HP26 SIWX91X_GPIO(10, 0xFF, 0, 1, 10, 0)
222#define PWM_FAULTB_ULP5 SIWX91X_GPIO(10, 6, 27, 4, 5, 5)
223#define PWM_FAULTB_ULP10 SIWX91X_GPIO(8, 6, 32, 4, 10, 10)
224#define PWM_SLEEPEVENT_ULP8 SIWX91X_GPIO(8, 6, 30, 4, 8, 8)
225
226#define QEI_DIR_HP11 SIWX91X_GPIO(5, 0xFF, 6, 0, 11, 0)
227#define QEI_DIR_HP28 SIWX91X_GPIO(5, 0xFF, 0, 1, 12, 0)
228#define QEI_DIR_HP34 SIWX91X_GPIO(13, 0xFF, 9, 2, 2, 0)
229#define QEI_DIR_HP49 SIWX91X_GPIO(3, 0xFF, 13, 3, 1, 0)
230#define QEI_DIR_HP57 SIWX91X_GPIO(5, 0xFF, 21, 3, 9, 0)
231#define QEI_DIR_ULP3 SIWX91X_GPIO(3, 6, 25, 4, 3, 3)
232#define QEI_DIR_ULP7 SIWX91X_GPIO(3, 6, 29, 4, 7, 7)
233#define QEI_DIR_ULP11 SIWX91X_GPIO(3, 6, 33, 4, 11, 11)
234#define QEI_IDX_HP8 SIWX91X_GPIO(5, 0xFF, 3, 0, 8, 0)
235#define QEI_IDX_HP31 SIWX91X_GPIO(13, 0xFF, 9, 1, 15, 0)
236#define QEI_IDX_HP25 SIWX91X_GPIO(5, 0xFF, 0, 1, 9, 0)
237#define QEI_IDX_HP46 SIWX91X_GPIO(3, 0xFF, 10, 2, 14, 0)
238#define QEI_IDX_HP52 SIWX91X_GPIO(5, 0xFF, 16, 3, 4, 0)
239#define QEI_IDX_ULP0 SIWX91X_GPIO(3, 6, 22, 4, 0, 0)
240#define QEI_IDX_ULP4 SIWX91X_GPIO(3, 6, 26, 4, 4, 4)
241#define QEI_IDX_ULP8 SIWX91X_GPIO(3, 6, 30, 4, 8, 8)
242#define QEI_PHA_HP9 SIWX91X_GPIO(5, 0xFF, 4, 0, 9, 0)
243#define QEI_PHA_HP26 SIWX91X_GPIO(5, 0xFF, 0, 1, 10, 0)
244#define QEI_PHA_HP32 SIWX91X_GPIO(13, 0xFF, 9, 2, 0, 0)
245#define QEI_PHA_HP47 SIWX91X_GPIO(3, 0xFF, 11, 2, 15, 0)
246#define QEI_PHA_HP53 SIWX91X_GPIO(5, 0xFF, 17, 3, 5, 0)
247#define QEI_PHA_ULP1 SIWX91X_GPIO(3, 6, 23, 4, 1, 1)
248#define QEI_PHA_ULP5 SIWX91X_GPIO(3, 6, 27, 4, 5, 5)
249#define QEI_PHA_ULP9 SIWX91X_GPIO(3, 6, 31, 4, 9, 9)
250#define QEI_PHB_HP10 SIWX91X_GPIO(5, 0xFF, 5, 0, 10, 0)
251#define QEI_PHB_HP27 SIWX91X_GPIO(5, 0xFF, 0, 1, 11, 0)
252#define QEI_PHB_HP33 SIWX91X_GPIO(13, 0xFF, 9, 2, 1, 0)
253#define QEI_PHB_HP48 SIWX91X_GPIO(3, 0xFF, 12, 3, 0, 0)
254#define QEI_PHB_HP56 SIWX91X_GPIO(5, 0xFF, 20, 3, 8, 0)
255#define QEI_PHB_ULP2 SIWX91X_GPIO(3, 6, 24, 4, 2, 2)
256#define QEI_PHB_ULP6 SIWX91X_GPIO(3, 6, 28, 4, 6, 6)
257#define QEI_PHB_ULP10 SIWX91X_GPIO(3, 6, 32, 4, 10, 10)
258
259#define QSPI_CLK_HP8 SIWX91X_GPIO(11, 0xFF, 3, 0, 8, 0)
260#define QSPI_CLK_HP46 SIWX91X_GPIO(1, 0xFF, 10, 2, 14, 0)
261#define QSPI_CLK_HP52 SIWX91X_GPIO(9, 0xFF, 16, 3, 4, 0)
262#define QSPI_CSN0_HP7 SIWX91X_GPIO(11, 0xFF, 2, 0, 7, 0)
263#define QSPI_CSN0_HP49 SIWX91X_GPIO(1, 0xFF, 13, 3, 1, 0)
264#define QSPI_CSN0_HP55 SIWX91X_GPIO(9, 0xFF, 19, 3, 7, 0)
265#define QSPI_CSN1_HP7 SIWX91X_GPIO(12, 0xFF, 2, 0, 7, 0)
266#define QSPI_CSN1_HP53 SIWX91X_GPIO(1, 0xFF, 17, 3, 5, 0)
267#define QSPI_CSN9_HP49 SIWX91X_GPIO(10, 0xFF, 13, 3, 1, 0)
268#define QSPI_D0_HP6 SIWX91X_GPIO(11, 0xFF, 1, 0, 6, 0)
269#define QSPI_D0_HP47 SIWX91X_GPIO(1, 0xFF, 11, 2, 15, 0)
270#define QSPI_D0_HP53 SIWX91X_GPIO(9, 0xFF, 17, 3, 5, 0)
271#define QSPI_D1_HP9 SIWX91X_GPIO(11, 0xFF, 4, 0, 9, 0)
272#define QSPI_D1_HP48 SIWX91X_GPIO(1, 0xFF, 12, 3, 0, 0)
273#define QSPI_D1_HP54 SIWX91X_GPIO(9, 0xFF, 18, 3, 6, 0)
274#define QSPI_D2_HP10 SIWX91X_GPIO(11, 0xFF, 5, 0, 10, 0)
275#define QSPI_D2_HP50 SIWX91X_GPIO(1, 0xFF, 14, 3, 2, 0)
276#define QSPI_D2_HP56 SIWX91X_GPIO(9, 0xFF, 20, 3, 8, 0)
277#define QSPI_D3_HP11 SIWX91X_GPIO(11, 0xFF, 6, 0, 11, 0)
278#define QSPI_D3_HP51 SIWX91X_GPIO(1, 0xFF, 15, 3, 3, 0)
279#define QSPI_D3_HP57 SIWX91X_GPIO(9, 0xFF, 21, 3, 9, 0)
280#define QSPI_D4_HP54 SIWX91X_GPIO(1, 0xFF, 18, 3, 6, 0)
281#define QSPI_D5_HP55 SIWX91X_GPIO(1, 0xFF, 19, 3, 7, 0)
282#define QSPI_D6_HP56 SIWX91X_GPIO(1, 0xFF, 20, 3, 8, 0)
283#define QSPI_D7_HP57 SIWX91X_GPIO(1, 0xFF, 21, 3, 9, 0)
284
285#define SCT_IN0_HP25 SIWX91X_GPIO(9, 0xFF, 0, 1, 9, 0)
286#define SCT_IN0_ULP0 SIWX91X_GPIO(7, 6, 22, 4, 0, 0)
287#define SCT_IN0_ULP4 SIWX91X_GPIO(9, 6, 26, 4, 4, 4)
288#define SCT_IN1_HP26 SIWX91X_GPIO(9, 0xFF, 0, 1, 10, 0)
289#define SCT_IN1_ULP1 SIWX91X_GPIO(7, 6, 23, 4, 1, 1)
290#define SCT_IN1_ULP5 SIWX91X_GPIO(9, 6, 27, 4, 5, 5)
291#define SCT_IN2_HP27 SIWX91X_GPIO(9, 0xFF, 0, 1, 11, 0)
292#define SCT_IN2_ULP2 SIWX91X_GPIO(7, 6, 24, 4, 2, 2)
293#define SCT_IN2_ULP6 SIWX91X_GPIO(9, 6, 28, 4, 6, 6)
294#define SCT_IN3_HP28 SIWX91X_GPIO(9, 0xFF, 0, 1, 12, 0)
295#define SCT_IN3_ULP3 SIWX91X_GPIO(7, 6, 25, 4, 3, 3)
296#define SCT_IN3_ULP7 SIWX91X_GPIO(9, 6, 29, 4, 7, 7)
297#define SCT_OUT0_HP29 SIWX91X_GPIO(9, 0xFF, 0, 1, 13, 0)
298#define SCT_OUT0_ULP4 SIWX91X_GPIO(7, 6, 26, 4, 4, 4)
299#define SCT_OUT1_HP30 SIWX91X_GPIO(9, 0xFF, 0, 1, 14, 0)
300#define SCT_OUT1_ULP5 SIWX91X_GPIO(7, 6, 27, 4, 5, 5)
301#define SCT_OUT2_HP8 SIWX91X_GPIO(12, 0xFF, 3, 0, 8, 0)
302#define SCT_OUT2_ULP6 SIWX91X_GPIO(7, 6, 28, 4, 6, 6)
303#define SCT_OUT3_HP9 SIWX91X_GPIO(12, 0xFF, 4, 0, 9, 0)
304#define SCT_OUT3_ULP7 SIWX91X_GPIO(7, 6, 29, 4, 7, 7)
305#define SCT_OUT4_ULP4 SIWX91X_GPIO(13, 6, 26, 4, 4, 4)
306#define SCT_OUT4_ULP8 SIWX91X_GPIO(7, 6, 30, 4, 8, 8)
307#define SCT_OUT5_ULP5 SIWX91X_GPIO(13, 6, 27, 4, 5, 5)
308#define SCT_OUT5_ULP9 SIWX91X_GPIO(7, 6, 31, 4, 9, 9)
309#define SCT_OUT6_ULP6 SIWX91X_GPIO(13, 6, 28, 4, 6, 6)
310#define SCT_OUT6_ULP10 SIWX91X_GPIO(7, 6, 32, 4, 10, 10)
311#define SCT_OUT7_ULP7 SIWX91X_GPIO(13, 6, 29, 4, 7, 7)
312#define SCT_OUT7_ULP11 SIWX91X_GPIO(7, 6, 33, 4, 11, 11)
313
314#define SIO_0_HP6 SIWX91X_GPIO(1, 0xFF, 1, 0, 6, 0)
315#define SIO_0_HP25 SIWX91X_GPIO(1, 0xFF, 0, 1, 9, 0)
316#define SIO_0_ULP0 SIWX91X_GPIO(1, 6, 22, 4, 0, 0)
317#define SIO_0_ULP8 SIWX91X_GPIO(1, 6, 30, 4, 8, 8)
318#define SIO_1_HP7 SIWX91X_GPIO(1, 0xFF, 2, 0, 7, 0)
319#define SIO_1_HP26 SIWX91X_GPIO(1, 0xFF, 0, 1, 10, 0)
320#define SIO_1_ULP1 SIWX91X_GPIO(1, 6, 23, 4, 1, 1)
321#define SIO_1_ULP9 SIWX91X_GPIO(1, 6, 31, 4, 9, 9)
322#define SIO_2_HP8 SIWX91X_GPIO(1, 0xFF, 3, 0, 8, 0)
323#define SIO_2_HP27 SIWX91X_GPIO(1, 0xFF, 0, 1, 11, 0)
324#define SIO_2_ULP2 SIWX91X_GPIO(1, 6, 24, 4, 2, 2)
325#define SIO_2_ULP10 SIWX91X_GPIO(1, 6, 32, 4, 10, 10)
326#define SIO_3_HP9 SIWX91X_GPIO(1, 0xFF, 4, 0, 9, 0)
327#define SIO_3_HP28 SIWX91X_GPIO(1, 0xFF, 0, 1, 12, 0)
328#define SIO_3_ULP3 SIWX91X_GPIO(1, 6, 25, 4, 3, 3)
329#define SIO_3_ULP11 SIWX91X_GPIO(1, 6, 33, 4, 11, 11)
330#define SIO_4_HP10 SIWX91X_GPIO(1, 0xFF, 5, 0, 10, 0)
331#define SIO_4_HP29 SIWX91X_GPIO(1, 0xFF, 0, 1, 13, 0)
332#define SIO_4_ULP4 SIWX91X_GPIO(1, 6, 26, 4, 4, 4)
333#define SIO_5_HP11 SIWX91X_GPIO(1, 0xFF, 6, 0, 11, 0)
334#define SIO_5_HP30 SIWX91X_GPIO(1, 0xFF, 0, 1, 14, 0)
335#define SIO_5_ULP5 SIWX91X_GPIO(1, 6, 27, 4, 5, 5)
336#define SIO_6_ULP6 SIWX91X_GPIO(1, 6, 28, 4, 6, 6)
337#define SIO_7_HP15 SIWX91X_GPIO(1, 0xFF, 8, 0, 15, 0)
338#define SIO_7_ULP7 SIWX91X_GPIO(1, 6, 29, 4, 7, 7)
339
340#define SSI_CLK_HP8 SIWX91X_GPIO(3, 0xFF, 3, 0, 8, 0)
341#define SSI_CLK_HP25 SIWX91X_GPIO(3, 0xFF, 0, 1, 9, 0)
342#define SSI_CLK_HP52 SIWX91X_GPIO(3, 0xFF, 16, 3, 4, 0)
343#define SSI_CS0_HP9 SIWX91X_GPIO(3, 0xFF, 4, 0, 9, 0)
344#define SSI_CS0_HP28 SIWX91X_GPIO(3, 0xFF, 0, 1, 12, 0)
345#define SSI_CS0_HP53 SIWX91X_GPIO(3, 0xFF, 17, 3, 5, 0)
346#define SSI_CS1_HP10 SIWX91X_GPIO(3, 0xFF, 5, 0, 10, 0)
347#define SSI_CS2_HP15 SIWX91X_GPIO(3, 0xFF, 8, 0, 15, 0)
348#define SSI_CS2_HP50 SIWX91X_GPIO(3, 0xFF, 14, 3, 2, 0)
349#define SSI_CS3_HP51 SIWX91X_GPIO(3, 0xFF, 15, 3, 3, 0)
350#define SSI_DATA0_HP11 SIWX91X_GPIO(3, 0xFF, 6, 0, 11, 0)
351#define SSI_DATA0_HP26 SIWX91X_GPIO(3, 0xFF, 0, 1, 10, 0)
352#define SSI_DATA0_HP56 SIWX91X_GPIO(3, 0xFF, 20, 3, 8, 0)
353#define SSI_DATA1_HP10 SIWX91X_GPIO(12, 0xFF, 5, 0, 10, 0)
354#define SSI_DATA1_HP12 SIWX91X_GPIO(3, 0xFF, 7, 0, 12, 0)
355#define SSI_DATA1_HP27 SIWX91X_GPIO(3, 0xFF, 0, 1, 11, 0)
356#define SSI_DATA1_HP57 SIWX91X_GPIO(3, 0xFF, 21, 3, 9, 0)
357#define SSI_DATA2_HP6 SIWX91X_GPIO(3, 0xFF, 1, 0, 6, 0)
358#define SSI_DATA2_HP29 SIWX91X_GPIO(3, 0xFF, 0, 1, 13, 0)
359#define SSI_DATA2_HP54 SIWX91X_GPIO(3, 0xFF, 18, 3, 6, 0)
360#define SSI_DATA3_HP7 SIWX91X_GPIO(3, 0xFF, 2, 0, 7, 0)
361#define SSI_DATA3_HP30 SIWX91X_GPIO(3, 0xFF, 0, 1, 14, 0)
362#define SSI_DATA3_HP55 SIWX91X_GPIO(3, 0xFF, 19, 3, 7, 0)
363
364#define SSIS_CLK_HP8 SIWX91X_GPIO(8, 0xFF, 3, 0, 8, 0)
365#define SSIS_CLK_HP26 SIWX91X_GPIO(8, 0xFF, 0, 1, 10, 0)
366#define SSIS_CLK_HP47 SIWX91X_GPIO(8, 0xFF, 11, 2, 15, 0)
367#define SSIS_CLK_HP52 SIWX91X_GPIO(8, 0xFF, 16, 3, 4, 0)
368#define SSIS_CS_HP9 SIWX91X_GPIO(8, 0xFF, 4, 0, 9, 0)
369#define SSIS_CS_HP25 SIWX91X_GPIO(8, 0xFF, 0, 1, 9, 0)
370#define SSIS_CS_HP46 SIWX91X_GPIO(8, 0xFF, 10, 2, 14, 0)
371#define SSIS_CS_HP53 SIWX91X_GPIO(8, 0xFF, 17, 3, 5, 0)
372#define SSIS_MISO_HP11 SIWX91X_GPIO(8, 0xFF, 6, 0, 11, 0)
373#define SSIS_MISO_HP28 SIWX91X_GPIO(8, 0xFF, 0, 1, 12, 0)
374#define SSIS_MISO_HP49 SIWX91X_GPIO(8, 0xFF, 13, 3, 1, 0)
375#define SSIS_MISO_HP57 SIWX91X_GPIO(8, 0xFF, 21, 3, 9, 0)
376#define SSIS_MOSI_HP10 SIWX91X_GPIO(8, 0xFF, 5, 0, 10, 0)
377#define SSIS_MOSI_HP27 SIWX91X_GPIO(8, 0xFF, 0, 1, 11, 0)
378#define SSIS_MOSI_HP48 SIWX91X_GPIO(8, 0xFF, 12, 3, 0, 0)
379#define SSIS_MOSI_HP56 SIWX91X_GPIO(8, 0xFF, 20, 3, 8, 0)
380
381#define TIMER0_HP7 SIWX91X_GPIO(9, 5, 2, 0, 7, 1)
382#define TIMER0_HP27 SIWX91X_GPIO(11, 5, 0, 1, 11, 8)
383#define TIMER0_HP46 SIWX91X_GPIO(9, 5, 10, 2, 14, 8)
384#define TIMER0_ULP4 SIWX91X_GPIO(0xFF, 9, 0xFF, 4, 0, 4)
385#define TIMER0_ULP8 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 8)
386
387#define TIMER1_HP15 SIWX91X_GPIO(9, 5, 8, 0, 15, 7)
388#define TIMER1_HP26 SIWX91X_GPIO(11, 5, 0, 1, 10, 7)
389#define TIMER1_ULP5 SIWX91X_GPIO(0xFF, 9, 0xFF, 4, 0, 5)
390#define TIMER1_ULP7 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 7)
391
392#define TIMER2_ULP1 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 1)
393
394#define TRACE_CLK_HP7 SIWX91X_GPIO(13, 0xFF, 2, 0, 7, 0)
395#define TRACE_CLK_HP47 SIWX91X_GPIO(6, 0xFF, 11, 2, 15, 0)
396#define TRACE_CLK_HP53 SIWX91X_GPIO(6, 0xFF, 17, 3, 5, 0)
397#define TRACE_CLKIN_HP6 SIWX91X_GPIO(13, 0xFF, 1, 0, 6, 0)
398#define TRACE_CLKIN_HP15 SIWX91X_GPIO(6, 0xFF, 8, 0, 15, 0)
399#define TRACE_CLKIN_HP46 SIWX91X_GPIO(6, 0xFF, 10, 2, 14, 0)
400#define TRACE_CLKIN_HP52 SIWX91X_GPIO(6, 0xFF, 16, 3, 4, 0)
401#define TRACE_D0_HP8 SIWX91X_GPIO(13, 0xFF, 3, 0, 8, 0)
402#define TRACE_D0_HP48 SIWX91X_GPIO(6, 0xFF, 12, 3, 0, 0)
403#define TRACE_D0_HP54 SIWX91X_GPIO(6, 0xFF, 18, 3, 6, 0)
404#define TRACE_D1_HP9 SIWX91X_GPIO(13, 0xFF, 4, 0, 9, 0)
405#define TRACE_D1_HP49 SIWX91X_GPIO(6, 0xFF, 13, 3, 1, 0)
406#define TRACE_D1_HP55 SIWX91X_GPIO(6, 0xFF, 19, 3, 7, 0)
407#define TRACE_D2_HP10 SIWX91X_GPIO(13, 0xFF, 5, 0, 10, 0)
408#define TRACE_D2_HP50 SIWX91X_GPIO(6, 0xFF, 14, 3, 2, 0)
409#define TRACE_D2_HP56 SIWX91X_GPIO(6, 0xFF, 20, 3, 8, 0)
410#define TRACE_D3_HP11 SIWX91X_GPIO(13, 0xFF, 6, 0, 11, 0)
411#define TRACE_D3_HP51 SIWX91X_GPIO(6, 0xFF, 15, 3, 3, 0)
412#define TRACE_D3_HP57 SIWX91X_GPIO(6, 0xFF, 21, 3, 9, 0)
413
414#define UART0_CLK_HP8 SIWX91X_GPIO(2, 0xFF, 3, 0, 8, 0)
415#define UART0_CLK_HP25 SIWX91X_GPIO(2, 0xFF, 0, 1, 9, 0)
416#define UART0_CLK_HP52 SIWX91X_GPIO(2, 0xFF, 16, 3, 4, 0)
417#define UART0_CLK_ULP0 SIWX91X_GPIO(2, 6, 22, 4, 0, 0)
418#define UART0_CTS_HP6 SIWX91X_GPIO(2, 0xFF, 1, 0, 6, 0)
419#define UART0_CTS_HP26 SIWX91X_GPIO(2, 0xFF, 0, 1, 10, 0)
420#define UART0_CTS_HP56 SIWX91X_GPIO(2, 0xFF, 20, 3, 8, 0)
421#define UART0_CTS_ULP6 SIWX91X_GPIO(2, 6, 28, 4, 6, 6)
422#define UART0_DCD_HP12 SIWX91X_GPIO(2, 0xFF, 7, 0, 12, 0)
423#define UART0_DCD_HP29 SIWX91X_GPIO(12, 0xFF, 0, 1, 13, 0)
424#define UART0_DSR_HP11 SIWX91X_GPIO(2, 0xFF, 6, 0, 11, 0)
425#define UART0_DSR_HP57 SIWX91X_GPIO(2, 0xFF, 21, 3, 9, 0)
426#define UART0_DTR_HP7 SIWX91X_GPIO(2, 0xFF, 2, 0, 7, 0)
427#define UART0_IRRX_HP25 SIWX91X_GPIO(13, 0xFF, 0, 1, 9, 0)
428#define UART0_IRRX_HP47 SIWX91X_GPIO(2, 0xFF, 11, 2, 15, 0)
429#define UART0_IRRX_ULP0 SIWX91X_GPIO(11, 6, 22, 4, 0, 0)
430#define UART0_IRRX_ULP7 SIWX91X_GPIO(2, 6, 29, 4, 7, 7)
431#define UART0_IRTX_HP26 SIWX91X_GPIO(13, 0xFF, 0, 1, 10, 0)
432#define UART0_IRTX_HP48 SIWX91X_GPIO(2, 0xFF, 12, 3, 0, 0)
433#define UART0_IRTX_ULP1 SIWX91X_GPIO(11, 6, 23, 4, 1, 1)
434#define UART0_IRTX_ULP8 SIWX91X_GPIO(2, 6, 30, 4, 8, 8)
435#define UART0_RI_HP27 SIWX91X_GPIO(2, 0xFF, 0, 1, 11, 0)
436#define UART0_RI_HP46 SIWX91X_GPIO(2, 0xFF, 10, 2, 14, 0)
437#define UART0_RI_ULP4 SIWX91X_GPIO(11, 6, 26, 4, 4, 4)
438#define UART0_RS485DE_HP29 SIWX91X_GPIO(13, 0xFF, 0, 1, 13, 0)
439#define UART0_RS485DE_HP51 SIWX91X_GPIO(2, 0xFF, 15, 3, 3, 0)
440#define UART0_RS485DE_ULP7 SIWX91X_GPIO(11, 6, 29, 4, 7, 7)
441#define UART0_RS485DE_ULP11 SIWX91X_GPIO(2, 6, 33, 4, 11, 11)
442#define UART0_RS485EN_HP27 SIWX91X_GPIO(13, 0xFF, 0, 1, 11, 0)
443#define UART0_RS485EN_HP49 SIWX91X_GPIO(2, 0xFF, 13, 3, 1, 0)
444#define UART0_RS485EN_ULP5 SIWX91X_GPIO(11, 6, 27, 4, 5, 5)
445#define UART0_RS485EN_ULP9 SIWX91X_GPIO(2, 6, 31, 4, 9, 9)
446#define UART0_RS485RE_HP28 SIWX91X_GPIO(13, 0xFF, 0, 1, 12, 0)
447#define UART0_RS485RE_HP50 SIWX91X_GPIO(2, 0xFF, 14, 3, 2, 0)
448#define UART0_RS485RE_ULP6 SIWX91X_GPIO(11, 6, 28, 4, 6, 6)
449#define UART0_RS485RE_ULP10 SIWX91X_GPIO(2, 6, 32, 4, 10, 10)
450#define UART0_RTS_HP9 SIWX91X_GPIO(2, 0xFF, 4, 0, 9, 0)
451#define UART0_RTS_HP28 SIWX91X_GPIO(2, 0xFF, 0, 1, 12, 0)
452#define UART0_RTS_HP53 SIWX91X_GPIO(2, 0xFF, 17, 3, 5, 0)
453#define UART0_RTS_ULP5 SIWX91X_GPIO(2, 6, 27, 4, 5, 5)
454#define UART0_RX_HP10 SIWX91X_GPIO(2, 0xFF, 5, 0, 10, 0)
455#define UART0_RX_HP29 SIWX91X_GPIO(2, 0xFF, 0, 1, 13, 0)
456#define UART0_RX_HP55 SIWX91X_GPIO(2, 0xFF, 19, 3, 7, 0)
457#define UART0_RX_ULP1 SIWX91X_GPIO(2, 6, 23, 4, 1, 1)
458#define UART0_RX_ULP6 SIWX91X_GPIO(4, 6, 28, 4, 6, 6)
459#define UART0_TX_HP30 SIWX91X_GPIO(2, 0xFF, 0, 1, 14, 0)
460#define UART0_TX_HP54 SIWX91X_GPIO(2, 0xFF, 18, 3, 6, 0)
461#define UART0_TX_ULP4 SIWX91X_GPIO(2, 6, 26, 4, 4, 4)
462#define UART0_TX_ULP7 SIWX91X_GPIO(4, 6, 29, 4, 7, 7)
463
464#define UART1_CTS_HP11 SIWX91X_GPIO(6, 0xFF, 6, 0, 11, 0)
465#define UART1_CTS_HP32 SIWX91X_GPIO(12, 0xFF, 9, 2, 0, 0)
466#define UART1_CTS_HP51 SIWX91X_GPIO(9, 0xFF, 15, 3, 3, 0)
467#define UART1_CTS_ULP1 SIWX91X_GPIO(9, 6, 23, 4, 1, 1)
468#define UART1_CTS_ULP7 SIWX91X_GPIO(6, 6, 29, 4, 7, 7)
469#define UART1_CTS_ULP9 SIWX91X_GPIO(9, 6, 31, 4, 9, 9)
470#define UART1_RS485DE_HP9 SIWX91X_GPIO(6, 0xFF, 4, 0, 9, 0)
471#define UART1_RS485DE_ULP2 SIWX91X_GPIO(6, 6, 24, 4, 2, 2)
472#define UART1_RS485DE_ULP11 SIWX91X_GPIO(6, 6, 33, 4, 11, 11)
473#define UART1_RS485EN_HP12 SIWX91X_GPIO(6, 0xFF, 7, 0, 12, 0)
474#define UART1_RS485EN_HP26 SIWX91X_GPIO(6, 0xFF, 0, 1, 10, 0)
475#define UART1_RS485EN_ULP0 SIWX91X_GPIO(6, 6, 22, 4, 0, 0)
476#define UART1_RS485RE_HP8 SIWX91X_GPIO(6, 0xFF, 3, 0, 8, 0)
477#define UART1_RS485RE_ULP1 SIWX91X_GPIO(6, 6, 23, 4, 1, 1)
478#define UART1_RS485RE_ULP10 SIWX91X_GPIO(6, 6, 32, 4, 10, 10)
479#define UART1_RTS_HP10 SIWX91X_GPIO(6, 0xFF, 5, 0, 10, 0)
480#define UART1_RTS_HP27 SIWX91X_GPIO(6, 0xFF, 0, 1, 11, 0)
481#define UART1_RTS_HP28 SIWX91X_GPIO(6, 0xFF, 0, 1, 12, 0)
482#define UART1_RTS_HP31 SIWX91X_GPIO(12, 0xFF, 9, 1, 15, 0)
483#define UART1_RTS_HP50 SIWX91X_GPIO(9, 0xFF, 14, 3, 2, 0)
484#define UART1_RTS_ULP0 SIWX91X_GPIO(9, 6, 22, 4, 0, 0)
485#define UART1_RTS_ULP6 SIWX91X_GPIO(6, 6, 28, 4, 6, 6)
486#define UART1_RTS_ULP8 SIWX91X_GPIO(9, 6, 30, 4, 8, 8)
487#define UART1_RX_HP6 SIWX91X_GPIO(6, 0xFF, 1, 0, 6, 0)
488#define UART1_RX_HP29 SIWX91X_GPIO(6, 0xFF, 0, 1, 13, 0)
489#define UART1_RX_HP33 SIWX91X_GPIO(12, 0xFF, 9, 2, 1, 0)
490#define UART1_RX_ULP2 SIWX91X_GPIO(9, 6, 24, 4, 1, 1)
491#define UART1_RX_ULP4 SIWX91X_GPIO(6, 6, 26, 4, 4, 4)
492#define UART1_RX_ULP8 SIWX91X_GPIO(6, 6, 30, 4, 8, 8)
493#define UART1_RX_ULP10 SIWX91X_GPIO(9, 6, 32, 4, 10, 10)
494#define UART1_TX_HP15 SIWX91X_GPIO(2, 0xFF, 8, 0, 15, 0)
495#define UART1_TX_HP7 SIWX91X_GPIO(6, 0xFF, 2, 0, 7, 0)
496#define UART1_TX_HP30 SIWX91X_GPIO(6, 0xFF, 0, 1, 14, 0)
497#define UART1_TX_HP34 SIWX91X_GPIO(12, 0xFF, 9, 2, 2, 0)
498#define UART1_TX_ULP3 SIWX91X_GPIO(9, 6, 25, 4, 1, 1)
499#define UART1_TX_ULP5 SIWX91X_GPIO(6, 6, 27, 4, 5, 5)
500#define UART1_TX_ULP9 SIWX91X_GPIO(6, 6, 31, 4, 9, 9)
501#define UART1_TX_ULP11 SIWX91X_GPIO(9, 6, 33, 4, 11, 11)
502
503#define ULPI2C_SCL_HP11 SIWX91X_GPIO(9, 4, 6, 0, 11, 5)
504#define ULPI2C_SCL_HP15 SIWX91X_GPIO(9, 4, 8, 0, 15, 7)
505#define ULPI2C_SCL_HP7 SIWX91X_GPIO(9, 4, 2, 0, 7, 1)
506#define ULPI2C_SCL_HP26 SIWX91X_GPIO(11, 4, 0, 1, 10, 7)
507#define ULPI2C_SCL_HP27 SIWX91X_GPIO(11, 4, 0, 1, 11, 8)
508#define ULPI2C_SCL_HP46 SIWX91X_GPIO(9, 4, 10, 2, 14, 8)
509#define ULPI2C_SCL_ULP1 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 1)
510#define ULPI2C_SCL_ULP5 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 5)
511#define ULPI2C_SCL_ULP7 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 7)
512#define ULPI2C_SCL_ULP8 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 8)
513#define ULPI2C_SDA_HP6 SIWX91X_GPIO(9, 4, 1, 0, 6, 0)
514#define ULPI2C_SDA_HP10 SIWX91X_GPIO(9, 4, 5, 0, 10, 4)
515#define ULPI2C_SDA_HP12 SIWX91X_GPIO(9, 4, 7, 0, 12, 6)
516#define ULPI2C_SDA_HP25 SIWX91X_GPIO(11, 4, 0, 1, 9, 6)
517#define ULPI2C_SDA_HP28 SIWX91X_GPIO(11, 4, 0, 1, 12, 9)
518#define ULPI2C_SDA_HP30 SIWX91X_GPIO(11, 4, 0, 1, 14, 11)
519#define ULPI2C_SDA_HP47 SIWX91X_GPIO(9, 4, 11, 2, 15, 9)
520#define ULPI2C_SDA_HP49 SIWX91X_GPIO(9, 4, 13, 3, 1, 11)
521#define ULPI2C_SDA_ULP0 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 0)
522#define ULPI2C_SDA_ULP4 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 4)
523#define ULPI2C_SDA_ULP6 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 6)
524#define ULPI2C_SDA_ULP9 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 9)
525#define ULPI2C_SDA_ULP11 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 11)
526
527#define ULPI2S_CLK_HP15 SIWX91X_GPIO(9, 2, 8, 0, 15, 7)
528#define ULPI2S_CLK_HP26 SIWX91X_GPIO(11, 2, 0, 1, 10, 7)
529#define ULPI2S_CLK_HP27 SIWX91X_GPIO(11, 2, 0, 1, 11, 8)
530#define ULPI2S_CLK_HP46 SIWX91X_GPIO(9, 2, 10, 2, 14, 8)
531#define ULPI2S_CLK_ULP7 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 7)
532#define ULPI2S_CLK_ULP8 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 8)
533#define ULPI2S_DIN_HP12 SIWX91X_GPIO(9, 2, 7, 0, 12, 6)
534#define ULPI2S_DIN_HP6 SIWX91X_GPIO(9, 2, 1, 0, 6, 0)
535#define ULPI2S_DIN_HP25 SIWX91X_GPIO(11, 2, 0, 1, 9, 6)
536#define ULPI2S_DIN_HP28 SIWX91X_GPIO(11, 2, 0, 1, 12, 9)
537#define ULPI2S_DIN_HP47 SIWX91X_GPIO(9, 2, 11, 2, 15, 9)
538#define ULPI2S_DIN_ULP0 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 0)
539#define ULPI2S_DIN_ULP6 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 6)
540#define ULPI2S_DIN_ULP9 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 9)
541#define ULPI2S_DOUT_HP7 SIWX91X_GPIO(9, 2, 2, 0, 7, 1)
542#define ULPI2S_DOUT_HP11 SIWX91X_GPIO(9, 2, 6, 0, 11, 5)
543#define ULPI2S_DOUT_HP30 SIWX91X_GPIO(11, 2, 0, 1, 14, 11)
544#define ULPI2S_DOUT_HP49 SIWX91X_GPIO(9, 2, 13, 3, 1, 11)
545#define ULPI2S_DOUT_ULP1 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 1)
546#define ULPI2S_DOUT_ULP5 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 5)
547#define ULPI2S_DOUT_ULP11 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 11)
548#define ULPI2S_WS_HP8 SIWX91X_GPIO(9, 2, 3, 0, 8, 2)
549#define ULPI2S_WS_HP10 SIWX91X_GPIO(9, 2, 5, 0, 10, 4)
550#define ULPI2S_WS_HP29 SIWX91X_GPIO(11, 2, 0, 1, 13, 10)
551#define ULPI2S_WS_HP48 SIWX91X_GPIO(9, 2, 12, 3, 0, 10)
552#define ULPI2S_WS_ULP2 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 2)
553#define ULPI2S_WS_ULP4 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 4)
554#define ULPI2S_WS_ULP10 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 10)
555
556#define ULPSSI_CLK_HP6 SIWX91X_GPIO(9, 1, 1, 0, 6, 0)
557#define ULPSSI_CLK_HP27 SIWX91X_GPIO(11, 1, 0, 1, 11, 8)
558#define ULPSSI_CLK_HP46 SIWX91X_GPIO(9, 1, 10, 2, 14, 8)
559#define ULPSSI_CLK_ULP0 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 0)
560#define ULPSSI_CLK_ULP4 SIWX91X_GPIO(0xFF, 8, 0xFF, 4, 0, 4)
561#define ULPSSI_CLK_ULP8 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 8)
562#define ULPSSI_CS0_HP29 SIWX91X_GPIO(11, 1, 0, 1, 13, 10)
563#define ULPSSI_CS0_HP48 SIWX91X_GPIO(9, 1, 12, 3, 0, 10)
564#define ULPSSI_CS0_ULP7 SIWX91X_GPIO(0xFF, 8, 0xFF, 4, 0, 7)
565#define ULPSSI_CS0_ULP10 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 10)
566#define ULPSSI_CS1_HP10 SIWX91X_GPIO(9, 1, 5, 0, 10, 4)
567#define ULPSSI_CS1_ULP4 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 4)
568#define ULPSSI_CS2_HP12 SIWX91X_GPIO(9, 1, 7, 0, 12, 6)
569#define ULPSSI_CS2_HP25 SIWX91X_GPIO(11, 1, 0, 1, 9, 6)
570#define ULPSSI_CS2_ULP6 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 6)
571#define ULPSSI_DIN_HP8 SIWX91X_GPIO(9, 1, 3, 0, 8, 2)
572#define ULPSSI_DIN_HP28 SIWX91X_GPIO(11, 1, 0, 1, 12, 9)
573#define ULPSSI_DIN_HP47 SIWX91X_GPIO(9, 1, 11, 2, 15, 9)
574#define ULPSSI_DIN_ULP2 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 2)
575#define ULPSSI_DIN_ULP6 SIWX91X_GPIO(0xFF, 8, 0xFF, 4, 0, 6)
576#define ULPSSI_DIN_ULP9 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 9)
577#define ULPSSI_DOUT_HP7 SIWX91X_GPIO(9, 1, 2, 0, 7, 1)
578#define ULPSSI_DOUT_HP30 SIWX91X_GPIO(11, 1, 0, 1, 14, 11)
579#define ULPSSI_DOUT_HP49 SIWX91X_GPIO(9, 1, 13, 3, 1, 11)
580#define ULPSSI_DOUT_ULP1 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 1)
581#define ULPSSI_DOUT_ULP5 SIWX91X_GPIO(0xFF, 8, 0xFF, 4, 0, 5)
582#define ULPSSI_DOUT_ULP11 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 11)
583
584#define ULPUART_CTS_HP7 SIWX91X_GPIO(9, 3, 2, 0, 7, 1)
585#define ULPUART_CTS_HP11 SIWX91X_GPIO(9, 3, 6, 0, 11, 5)
586#define ULPUART_CTS_HP27 SIWX91X_GPIO(11, 3, 0, 1, 11, 8)
587#define ULPUART_CTS_HP46 SIWX91X_GPIO(9, 3, 10, 2, 14, 8)
588#define ULPUART_CTS_ULP1 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 1)
589#define ULPUART_CTS_ULP5 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 5)
590#define ULPUART_CTS_ULP8 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 8)
591#define ULPUART_RTS_HP6 SIWX91X_GPIO(9, 3, 1, 0, 6, 0)
592#define ULPUART_RTS_HP10 SIWX91X_GPIO(9, 3, 5, 0, 10, 4)
593#define ULPUART_RTS_HP29 SIWX91X_GPIO(11, 3, 0, 1, 13, 10)
594#define ULPUART_RTS_HP48 SIWX91X_GPIO(9, 3, 12, 3, 0, 10)
595#define ULPUART_RTS_ULP0 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 0)
596#define ULPUART_RTS_ULP4 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 4)
597#define ULPUART_RTS_ULP10 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 10)
598#define ULPUART_RX_HP8 SIWX91X_GPIO(9, 3, 3, 0, 8, 2)
599#define ULPUART_RX_HP12 SIWX91X_GPIO(9, 3, 7, 0, 12, 6)
600#define ULPUART_RX_HP25 SIWX91X_GPIO(11, 3, 0, 1, 9, 6)
601#define ULPUART_RX_HP28 SIWX91X_GPIO(11, 3, 0, 1, 12, 9)
602#define ULPUART_RX_HP47 SIWX91X_GPIO(9, 3, 11, 2, 15, 9)
603#define ULPUART_RX_ULP2 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 2)
604#define ULPUART_RX_ULP6 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 6)
605#define ULPUART_RX_ULP9 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 9)
606#define ULPUART_TX_HP15 SIWX91X_GPIO(9, 3, 8, 0, 15, 7)
607#define ULPUART_TX_HP26 SIWX91X_GPIO(11, 3, 0, 1, 10, 7)
608#define ULPUART_TX_HP30 SIWX91X_GPIO(11, 3, 0, 1, 14, 11)
609#define ULPUART_TX_HP49 SIWX91X_GPIO(9, 3, 13, 3, 1, 11)
610#define ULPUART_TX_ULP7 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 7)
611#define ULPUART_TX_ULP11 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 11)
612
613#define UULP_GPIO4_ULP2 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 2)
614#define UULP_TESTMODE0_ULP7 SIWX91X_GPIO(0xFF, 11, 0xFF, 4, 0, 7)
615#define UULP_TESTMODE0_ULP9 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 9)
616
617/* clang-format on */
618
619/* The following definitions are duplicates of signals that are also
620 * available on the same pins using other GPIO modes.
621 * #define IR_OUTPUT_ULP5 SIWX91X_GPIO(0xFF, 10, 0xFF, 4, 0, 5)
622 * #define PMU_TEST2_HP30 SIWX91X_GPIO(13, 0xFF, 0, 1, 14, 0)
623 * #define PWM_1H_ULP1 SIWX91X_GPIO(8, 6, 23, 4, 1, 1)
624 * #define PWM_1L_ULP0 SIWX91X_GPIO(8, 6, 22, 4, 0, 0)
625 */
626
627#endif /* INCLUDE_ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_SIWX91X_PINCTRL_H_ */