Zephyr Project
4.0.0
  • Introduction
  • Developing with Zephyr
  • Kernel
  • OS Services
  • Build and Configuration Systems
  • Connectivity
  • Hardware Support
    • Architecture-related Guides
      • Zephyr support status on ARC processors
      • Arm Cortex-M Developer Guide
      • Zephyr support status on RISC-V processors
      • Semihosting Guide
      • Additional Functionality
      • x86 Developer Guide
      • Xtensa Developer Guide
      • ARM System Control and Management Interface
    • Barriers API
    • Cache Interface
    • Zephyr’s device emulators/simulators
    • External Bus and Bus Connected Peripherals Emulators
    • Peripherals
    • Pin Control
    • Porting
  • Contributing to Zephyr
  • Project and Governance
  • Security
  • Safety
  • Samples and Demos
  • Supported Boards and Shields
  • Shields
  • Releases
Zephyr Project
  • Hardware Support
  • Architecture-related Guides
  • View page source

Architecture-related Guides

  • Zephyr support status on ARC processors
  • Arm Cortex-M Developer Guide
  • Zephyr support status on RISC-V processors
  • Semihosting Guide
  • Additional Functionality
  • x86 Developer Guide
  • Xtensa Developer Guide
  • ARM System Control and Management Interface
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© Copyright 2015-2024 Zephyr Project members and individual contributors. Last updated on Nov 25, 2024.

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