Zephyr Project API
3.1.0
A Scalable Open Source RTOS
|
Go to the source code of this file.
Macros | |
GPIO drive strength flags | |
The drive strength flags are a Zephyr specific extension of the standard GPIO flags specified by the Linux GPIO binding. Only applicable for Nordic Semiconductor nRF SoCs. The drive strength of individual pins can be configured independently for when the pin output is low and high. The The The interface supports two different drive strengths: | |
#define | NRF_GPIO_DS_DFLT_LOW (0x0U << NRF_GPIO_DS_LOW_POS) |
#define | NRF_GPIO_DS_ALT_LOW (0x1U << NRF_GPIO_DS_LOW_POS) |
#define | NRF_GPIO_DS_DFLT_HIGH (0x0U << NRF_GPIO_DS_HIGH_POS) |
#define | NRF_GPIO_DS_ALT_HIGH (0x1U << NRF_GPIO_DS_HIGH_POS) |
#define | NRF_GPIO_DS_DFLT (NRF_GPIO_DS_DFLT_LOW | NRF_GPIO_DS_DFLT_HIGH) |
#define | NRF_GPIO_DS_ALT (NRF_GPIO_DS_ALT_LOW | NRF_GPIO_DS_ALT_HIGH) |
#define NRF_GPIO_DS_ALT (NRF_GPIO_DS_ALT_LOW | NRF_GPIO_DS_ALT_HIGH) |
Combined alternative drive strength.
#define NRF_GPIO_DS_ALT_HIGH (0x1U << NRF_GPIO_DS_HIGH_POS) |
Alternative drive strength when GPIO pin output is high. For hardware that does not support configurable drive strengths use the default drive strength.
#define NRF_GPIO_DS_ALT_LOW (0x1U << NRF_GPIO_DS_LOW_POS) |
Alternative drive strength when GPIO pin output is low. For hardware that does not support configurable drive strength use the default drive strength.
#define NRF_GPIO_DS_DFLT (NRF_GPIO_DS_DFLT_LOW | NRF_GPIO_DS_DFLT_HIGH) |
Combined default drive strength.
#define NRF_GPIO_DS_DFLT_HIGH (0x0U << NRF_GPIO_DS_HIGH_POS) |
Default drive strength when GPIO pin output is high.
#define NRF_GPIO_DS_DFLT_LOW (0x0U << NRF_GPIO_DS_LOW_POS) |
Default drive strength standard when GPIO pin output is low.