Go to the source code of this file.
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| #define  | IPSR(bank,  shift,  func)   (((bank) << 10U) | ((shift) << 4U) | (func)) | 
|   | Utility macro to build IPSR property entry. IPSR: Peripheral Function Select Register Each IPSR bank can hold 8 cellules of 4 bits coded function.  More...
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|   | 
| #define  | PIN_NOGPSR_START   1024U | 
|   | 
| #define  | RCAR_GP_PIN(bank,  pin)   (((bank) * 32U) + (pin)) | 
|   | Utility macro to encode a GPIO capable pin.  More...
  | 
|   | 
| #define  | RCAR_NOGP_PIN(pin)   (PIN_NOGPSR_START + pin) | 
|   | Utility macro to encode a non capable GPIO pin.  More...
  | 
|   | 
◆ IPSR
      
        
          | #define IPSR | 
          ( | 
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          bank,  | 
        
        
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          shift,  | 
        
        
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          func  | 
        
        
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          ) | 
           |    (((bank) << 10U) | ((shift) << 4U) | (func)) | 
        
      
 
Utility macro to build IPSR property entry. IPSR: Peripheral Function Select Register Each IPSR bank can hold 8 cellules of 4 bits coded function. 
- Parameters
 - 
  
    | bank | the IPSR register bank.  | 
    | shift | the bit shift for this alternate function.  | 
    | func | the 4 bits encoded alternate function. | 
  
   
Function code [ 0 : 3 ] Function shift [ 4 : 9 ] IPSR bank [ 10 : 13 ] 
 
 
◆ PIN_NOGPSR_START
      
        
          | #define PIN_NOGPSR_START   1024U | 
        
      
 
 
◆ RCAR_GP_PIN
      
        
          | #define RCAR_GP_PIN | 
          ( | 
            | 
          bank,  | 
        
        
           | 
           | 
            | 
          pin  | 
        
        
           | 
          ) | 
           |    (((bank) * 32U) + (pin)) | 
        
      
 
Utility macro to encode a GPIO capable pin. 
- Parameters
 - 
  
    | bank | the GPIO bank  | 
    | pin | the pin within the GPIO bank (0..31)  | 
  
   
 
 
◆ RCAR_NOGP_PIN
Utility macro to encode a non capable GPIO pin. 
- Parameters
 - 
  
    | pin | the encoded pin number  |