| 
    Zephyr Project API
    3.3.0
    
   A Scalable Open Source RTOS 
   | 
 
Go to the source code of this file.
Typedefs | |
| typedef void(* | mchp_xec_ecia_callback_t) (int girq_id, int src, void *user) | 
Functions | |
| int | mchp_xec_ecia_enable (int girq_id, int src) | 
| Driver for External interrupt controller in Microchip XEC devices.  More... | |
| int | mchp_xec_ecia_info_enable (int ecia_info) | 
| enable EXTI interrupt for specific line specified by parameter encoded with MCHP_XEC_ECIA macro.  More... | |
| int | mchp_xec_ecia_disable (int girq_id, int src) | 
| disable EXTI interrupt for specific line  More... | |
| int | mchp_xec_ecia_info_disable (int ecia_info) | 
| disable EXTI interrupt for specific line specified by parameter encoded with MCHP_XEC_ECIA macro.  More... | |
| int | mchp_xec_ecia_set_callback (int girq_id, int src, mchp_xec_ecia_callback_t cb, void *data) | 
| set GIRQn interrupt source callback  More... | |
| int | mchp_xec_ecia_info_set_callback (int ecia_info, mchp_xec_ecia_callback_t cb, void *data) | 
| set GIRQn interrupt source callback  More... | |
| int | mchp_xec_ecia_set_callback_by_dev (const struct device *dev_girq, int src, mchp_xec_ecia_callback_t cb, void *data) | 
| set GIRQn interrupt source callback  More... | |
| int | mchp_ecia_unset_callback (int girq_id, int src) | 
| unset GIRQn interrupt source callback  More... | |
| int | mchp_ecia_unset_callback_by_dev (const struct device *dev_girq, int src) | 
| unset GIRQn interrupt source callback  More... | |
| void | mchp_xec_ecia_girq_aggr_en (uint8_t girq_id, uint8_t enable) | 
| enable or disable aggregated GIRQ output  More... | |
| void | mchp_xec_ecia_girq_src_clr (uint8_t girq_id, uint8_t src_bit) | 
| clear GIRQ latched source status bit  More... | |
| void | mchp_xec_ecia_girq_src_en (uint8_t girq_id, uint8_t src_bit) | 
| enable a source in a GIRQ  More... | |
| void | mchp_xec_ecia_girq_src_dis (uint8_t girq_id, uint8_t src_bit) | 
| disable a source in a GIRQ  More... | |
| void | mchp_xec_ecia_girq_src_clr_bitmap (uint8_t girq_id, uint32_t bitmap) | 
| clear GIRQ latches sources specified in bitmap  More... | |
| void | mchp_xec_ecia_girq_src_en_bitmap (uint8_t girq_id, uint32_t bitmap) | 
| enable sources in a GIRQ  More... | |
| void | mchp_xec_ecia_girq_src_dis_bitmap (uint8_t girq_id, uint32_t bitmap) | 
| disable sources in a GIRQ  More... | |
| uint32_t | mchp_xec_ecia_girq_result (uint8_t girq_id) | 
| Read GIRQ result register (bit-wise OR of enable and source)  More... | |
| void | mchp_xec_ecia_nvic_clr_pend (uint32_t nvic_num) | 
| Clear external NVIC input pending status.  More... | |
| void | mchp_xec_ecia_info_girq_aggr_en (int ecia_info, uint8_t enable) | 
| enable or disable aggregated GIRQ output  More... | |
| void | mchp_xec_ecia_info_girq_src_clr (int ecia_info) | 
| clear GIRQ latched source status bit  More... | |
| void | mchp_xec_ecia_info_girq_src_en (int ecia_info) | 
| enable a source in a GIRQ  More... | |
| void | mchp_xec_ecia_info_girq_src_dis (int ecia_info) | 
| disable a source in a GIRQ  More... | |
| uint32_t | mchp_xec_ecia_info_girq_result (int ecia_info) | 
| Read GIRQ result register (bit-wise OR of enable and source)  More... | |
| void | mchp_xec_ecia_info_nvic_clr_pend (int ecia_info) | 
| Clear external NVIC input pending status given encoded ECIA info.  More... | |
| typedef void(* mchp_xec_ecia_callback_t) (int girq_id, int src, void *user) | 
| int mchp_ecia_unset_callback | ( | int | girq_id, | 
| int | src | ||
| ) | 
unset GIRQn interrupt source callback
| girq_id | is the GIRQ number (8 - 26) | 
| src | is the interrupt source in the GIRQ (0 - 31) | 
| int mchp_ecia_unset_callback_by_dev | ( | const struct device * | dev_girq, | 
| int | src | ||
| ) | 
unset GIRQn interrupt source callback
| dev_girq | is a handle to the GIRQn device | 
| src | is the interrupt source in the GIRQ (0 - 31) | 
| int mchp_xec_ecia_disable | ( | int | girq_id, | 
| int | src | ||
| ) | 
disable EXTI interrupt for specific line
| girq_id | is the GIRQ number (8 - 26) | 
| src | is the interrupt source in the GIRQ (0 - 31) | 
| int mchp_xec_ecia_enable | ( | int | girq_id, | 
| int | src | ||
| ) | 
Driver for External interrupt controller in Microchip XEC devices.
Based on reference manuals: Reference Manuals for MEC152x and MEC172x ARM(r) 32-bit MCUs
Chapter: EC Interrupt Aggregator (ECIA)
enable GIRQn interrupt for specific source
| girq_id | is the GIRQ number (8 - 26) | 
| src | is the interrupt source in the GIRQ (0 - 31) | 
enable or disable aggregated GIRQ output
| girq_id | is the GIRQ number (8 - 26) | 
| enable | non-zero enables aggregated output else disables | 
Read GIRQ result register (bit-wise OR of enable and source)
| girq_id | is the GIRQ number (8 - 26) | 
clear GIRQ latched source status bit
| girq_id | is the GIRQ number (8 - 26) | 
| src_bit | is the source bit position in the GIRQ registers (0 - 31) | 
clear GIRQ latches sources specified in bitmap
| girq_id | is the GIRQ number (8 - 26) | 
| bitmap | contains the source bits to clear | 
disable a source in a GIRQ
| girq_id | is the GIRQ number (8 - 26) | 
| src_bit | is the source bit position in the GIRQ registers (0 - 31) | 
disable sources in a GIRQ
| girq_id | is the GIRQ number (8 - 26) | 
| bitmap | contains the source bits to disable | 
enable a source in a GIRQ
| girq_id | is the GIRQ number (8 - 26) | 
| src_bit | is the source bit position in the GIRQ registers (0 - 31) | 
enable sources in a GIRQ
| girq_id | is the GIRQ number (8 - 26) | 
| bitmap | contains the source bits to enable | 
| int mchp_xec_ecia_info_disable | ( | int | ecia_info | ) | 
disable EXTI interrupt for specific line specified by parameter encoded with MCHP_XEC_ECIA macro.
| ecia_info | is GIRQ connection encoded with MCHP_XEC_ECIA | 
| int mchp_xec_ecia_info_enable | ( | int | ecia_info | ) | 
enable EXTI interrupt for specific line specified by parameter encoded with MCHP_XEC_ECIA macro.
| ecia_info | is GIRQ connection encoded with MCHP_XEC_ECIA | 
| void mchp_xec_ecia_info_girq_aggr_en | ( | int | ecia_info, | 
| uint8_t | enable | ||
| ) | 
enable or disable aggregated GIRQ output
| ecia_info | is GIRQ connection encoded with MCHP_XEC_ECIA | 
| enable | is flag to indicate enable(1) or disable(0) | 
| uint32_t mchp_xec_ecia_info_girq_result | ( | int | ecia_info | ) | 
Read GIRQ result register (bit-wise OR of enable and source)
| ecia_info | is GIRQ connection encoded with MCHP_XEC_ECIA | 
| void mchp_xec_ecia_info_girq_src_clr | ( | int | ecia_info | ) | 
clear GIRQ latched source status bit
| ecia_info | is GIRQ connection encoded with MCHP_XEC_ECIA | 
| void mchp_xec_ecia_info_girq_src_dis | ( | int | ecia_info | ) | 
disable a source in a GIRQ
| ecia_info | is GIRQ connection encoded with MCHP_XEC_ECIA | 
| void mchp_xec_ecia_info_girq_src_en | ( | int | ecia_info | ) | 
enable a source in a GIRQ
| ecia_info | is GIRQ connection encoded with MCHP_XEC_ECIA | 
| void mchp_xec_ecia_info_nvic_clr_pend | ( | int | ecia_info | ) | 
Clear external NVIC input pending status given encoded ECIA info.
| ecia_info | is GIRQ connection encoded with MCHP_XEC_ECIA | 
| int mchp_xec_ecia_info_set_callback | ( | int | ecia_info, | 
| mchp_xec_ecia_callback_t | cb, | ||
| void * | data | ||
| ) | 
set GIRQn interrupt source callback
| ecia_info | is GIRQ connection encoded with MCHP_XEC_ECIA | 
| cb | user callback | 
| data | user data | 
| void mchp_xec_ecia_nvic_clr_pend | ( | uint32_t | nvic_num | ) | 
Clear external NVIC input pending status.
| nvic_num | is 0 to maximum NVIC inputs for the chip. | 
| int mchp_xec_ecia_set_callback | ( | int | girq_id, | 
| int | src, | ||
| mchp_xec_ecia_callback_t | cb, | ||
| void * | data | ||
| ) | 
set GIRQn interrupt source callback
| girq_id | is the GIRQ number (8 - 26) | 
| src | is the interrupt source in the GIRQ (0 - 31) | 
| cb | user callback | 
| data | user data | 
| int mchp_xec_ecia_set_callback_by_dev | ( | const struct device * | dev_girq, | 
| int | src, | ||
| mchp_xec_ecia_callback_t | cb, | ||
| void * | data | ||
| ) | 
set GIRQn interrupt source callback
| dev_girq | is a handle to the GIRQn device | 
| src | is the interrupt source in the GIRQ (0 - 31) | 
| cb | user callback | 
| data | user data |