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Zephyr Project API 3.5.0
A Scalable Open Source RTOS
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Go to the source code of this file.
Macros | |
| #define | IPSR(bank, shift, func) (((bank) << 10U) | ((shift) << 4U) | (func)) |
| Utility macro to build IPSR property entry. | |
| #define | PIN_NOGPSR_START 1024U |
| #define | RCAR_GP_PIN(bank, pin) (((bank) * 32U) + (pin)) |
| Utility macro to encode a GPIO capable pin. | |
| #define | RCAR_NOGP_PIN(pin) (PIN_NOGPSR_START + pin) |
| Utility macro to encode a non capable GPIO pin. | |
Utility macro to build IPSR property entry.
IPSR: Peripheral Function Select Register Each IPSR bank can hold 8 cellules of 4 bits coded function.
| bank | the IPSR register bank. |
| shift | the bit shift for this alternate function. |
| func | the 4 bits encoded alternate function. |
Function code [ 0 : 3 ] Function shift [ 4 : 9 ] IPSR bank [ 10 : 13 ]
| #define PIN_NOGPSR_START 1024U |
| #define RCAR_GP_PIN | ( | bank, | |
| pin | |||
| ) | (((bank) * 32U) + (pin)) |
Utility macro to encode a GPIO capable pin.
| bank | the GPIO bank |
| pin | the pin within the GPIO bank (0..31) |
| #define RCAR_NOGP_PIN | ( | pin | ) | (PIN_NOGPSR_START + pin) |
Utility macro to encode a non capable GPIO pin.
| pin | the encoded pin number |