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Zephyr Project API 3.7.0
A Scalable Open Source RTOS
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Intel SoC FPGA Agilex customized Arm SiP Services SMC protocol. More...
Go to the source code of this file.
Macros | |
| #define | SMC_STATUS_INVALID 0xFFFFFFFF |
| #define | SMC_STATUS_OKAY 0 |
| #define | SMC_STATUS_BUSY 1 |
| #define | SMC_STATUS_REJECT 2 |
| #define | SMC_STATUS_NO_RESPONSE 3 |
| #define | SMC_STATUS_ERROR 4 |
| #define | SMC_PLAT_PROTO_VER 0x0 |
| #define | SMC_PLAT_PROTO_HEADER_TRANS_ID_OFFSET 0 |
| #define | SMC_PLAT_PROTO_HEADER_TRANS_ID_MASK 0xFF |
| #define | SMC_PLAT_PROTO_HEADER_VER_OFFSET 60 |
| #define | SMC_PLAT_PROTO_HEADER_VER_MASK 0xF |
| #define | SMC_PLAT_PROTO_HEADER ((SMC_PLAT_PROTO_VER & SMC_PLAT_PROTO_HEADER_VER_MASK) << SMC_PLAT_PROTO_HEADER_VER_OFFSET) |
| #define | SMC_PLAT_PROTO_HEADER_SET_TRANS_ID(header, trans_id) |
| #define | SMC_FUNC_ID_GET_SVC_VERSION 0xC2000400 |
| #define | SMC_FUNC_ID_REG_READ 0xC2000401 |
| #define | SMC_FUNC_ID_REG_WRITE 0xC2000402 |
| #define | SMC_FUNC_ID_REG_UPDATE 0xC2000403 |
| #define | SMC_FUNC_ID_SET_HPS_BRIDGES 0xC2000404 |
| #define | SMC_FUNC_ID_RSU_UPDATE_ADDR 0xC2000405 |
| #define | SMC_FUNC_ID_MAILBOX_SEND_COMMAND 0xC2000420 |
| #define | SMC_FUNC_ID_MAILBOX_POLL_RESPONSE 0xC2000421 |
| #define | MAILBOX_CANCEL_COMMAND 0x03 |
Intel SoC FPGA Agilex customized Arm SiP Services SMC protocol.
| #define MAILBOX_CANCEL_COMMAND 0x03 |
| #define SMC_FUNC_ID_GET_SVC_VERSION 0xC2000400 |
| #define SMC_FUNC_ID_MAILBOX_POLL_RESPONSE 0xC2000421 |
| #define SMC_FUNC_ID_MAILBOX_SEND_COMMAND 0xC2000420 |
| #define SMC_FUNC_ID_REG_READ 0xC2000401 |
| #define SMC_FUNC_ID_REG_UPDATE 0xC2000403 |
| #define SMC_FUNC_ID_REG_WRITE 0xC2000402 |
| #define SMC_FUNC_ID_RSU_UPDATE_ADDR 0xC2000405 |
| #define SMC_FUNC_ID_SET_HPS_BRIDGES 0xC2000404 |
| #define SMC_PLAT_PROTO_HEADER ((SMC_PLAT_PROTO_VER & SMC_PLAT_PROTO_HEADER_VER_MASK) << SMC_PLAT_PROTO_HEADER_VER_OFFSET) |
| #define SMC_PLAT_PROTO_HEADER_SET_TRANS_ID | ( | header, | |
| trans_id | |||
| ) |
| #define SMC_PLAT_PROTO_HEADER_TRANS_ID_MASK 0xFF |
| #define SMC_PLAT_PROTO_HEADER_TRANS_ID_OFFSET 0 |
| #define SMC_PLAT_PROTO_HEADER_VER_MASK 0xF |
| #define SMC_PLAT_PROTO_HEADER_VER_OFFSET 60 |
| #define SMC_PLAT_PROTO_VER 0x0 |
| #define SMC_STATUS_BUSY 1 |
| #define SMC_STATUS_ERROR 4 |
| #define SMC_STATUS_INVALID 0xFFFFFFFF |
| #define SMC_STATUS_NO_RESPONSE 3 |
| #define SMC_STATUS_OKAY 0 |
| #define SMC_STATUS_REJECT 2 |