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Bridle API 4.2.0
A Zephyr based application framework
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MFD interface for an SC16IS75x bridge. More...
Macros | |
| #define | SC16IS75X_FIFO_CAPACITY 64 |
| FIFO capacity in byte. | |
| #define | SC16IS75X_IO_NUM_PINS_MAX 8 |
| Maximum programmable I/O pins. | |
| #define | SC16IS75X_UART_CHANNELS_MAX 2 |
| Maximum UART channels. | |
| #define | READ_SC16IS75X_REG(dev, reg, val) mfd_sc16is75x_read_register((dev), 0, SC16IS75X_REG_##reg, (val)); |
| #define | READ_SC16IS75X_CHREG(dev, ch, reg, val) mfd_sc16is75x_read_register((dev), (ch), SC16IS75X_REG_##reg, (val)); |
| #define | WRITE_SC16IS75X_REG(dev, reg, val) mfd_sc16is75x_write_register((dev), 0, SC16IS75X_REG_##reg, (val)); |
| #define | WRITE_SC16IS75X_CHREG(dev, ch, reg, val) mfd_sc16is75x_write_register((dev), (ch), SC16IS75X_REG_##reg, (val)); |
| #define | SETBIT_SC16IS75X_REG(dev, reg, bit, val) |
| #define | SETBIT_SC16IS75X_CHREG(dev, ch, reg, bit, val) |
Functions | |
| int | mfd_sc16is75x_read_register (const struct device *dev, const uint8_t channel, const uint8_t reg, uint8_t *value) |
| Read from an internal register. | |
| int | mfd_sc16is75x_write_register (const struct device *dev, const uint8_t channel, const uint8_t reg, const uint8_t value) |
| Write to an internal register. | |
| int | mfd_sc16is75x_set_register_bit (const struct device *dev, const uint8_t channel, const uint8_t reg, const uint8_t bit, const bool value) |
| Enable or disable a bit in an internal register. | |
| int | mfd_sc16is75x_read_fifo (const struct device *dev, const uint8_t channel, uint8_t *buf, const size_t len) |
| Read data from FIFO. | |
| int | mfd_sc16is75x_write_fifo (const struct device *dev, const uint8_t channel, const uint8_t *buf, const size_t len) |
| Write data to FIFO. | |
MFD interface for an SC16IS75x bridge.
The MFD interface for an SC16IS75x SPI or I2C to UART and GPIO controller bridge.
| #define READ_SC16IS75X_CHREG | ( | dev, | |
| ch, | |||
| reg, | |||
| val | |||
| ) | mfd_sc16is75x_read_register((dev), (ch), SC16IS75X_REG_##reg, (val)); |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
| #define READ_SC16IS75X_REG | ( | dev, | |
| reg, | |||
| val | |||
| ) | mfd_sc16is75x_read_register((dev), 0, SC16IS75X_REG_##reg, (val)); |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
| #define SC16IS75X_FIFO_CAPACITY 64 |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
FIFO capacity in byte.
| #define SC16IS75X_IO_NUM_PINS_MAX 8 |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
Maximum programmable I/O pins.
| #define SC16IS75X_UART_CHANNELS_MAX 2 |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
Maximum UART channels.
| #define SETBIT_SC16IS75X_CHREG | ( | dev, | |
| ch, | |||
| reg, | |||
| bit, | |||
| val | |||
| ) |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
| #define SETBIT_SC16IS75X_REG | ( | dev, | |
| reg, | |||
| bit, | |||
| val | |||
| ) |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
| #define WRITE_SC16IS75X_CHREG | ( | dev, | |
| ch, | |||
| reg, | |||
| val | |||
| ) | mfd_sc16is75x_write_register((dev), (ch), SC16IS75X_REG_##reg, (val)); |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
| #define WRITE_SC16IS75X_REG | ( | dev, | |
| reg, | |||
| val | |||
| ) | mfd_sc16is75x_write_register((dev), 0, SC16IS75X_REG_##reg, (val)); |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
| int mfd_sc16is75x_read_fifo | ( | const struct device * | dev, |
| const uint8_t | channel, | ||
| uint8_t * | buf, | ||
| const size_t | len | ||
| ) |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
Read data from FIFO.
| dev | An SC16IS75x device. | |
| channel | Channel whose FIFO to read. | |
| [out] | buf | Data read from FIFO. |
| len | Number of bytes to read. |
| 0 | On success. |
| int mfd_sc16is75x_read_register | ( | const struct device * | dev, |
| const uint8_t | channel, | ||
| const uint8_t | reg, | ||
| uint8_t * | value | ||
| ) |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
Read from an internal register.
| dev | An SC16IS75x device. | |
| channel | Channel to access. | |
| reg | Register address to read from. | |
| [out] | value | Value of that register. |
| 0 | On succes. |
| int mfd_sc16is75x_set_register_bit | ( | const struct device * | dev, |
| const uint8_t | channel, | ||
| const uint8_t | reg, | ||
| const uint8_t | bit, | ||
| const bool | value | ||
| ) |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
Enable or disable a bit in an internal register.
| dev | An SC16IS75x device. |
| channel | Channel to access. |
| reg | Register address to change the bit. |
| bit | Bit number to change. |
| value | Value to be written (true = set to one, false = set to zero). |
| 0 | On success. |
| int mfd_sc16is75x_write_fifo | ( | const struct device * | dev, |
| const uint8_t | channel, | ||
| const uint8_t * | buf, | ||
| const size_t | len | ||
| ) |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
Write data to FIFO.
| dev | An SC16IS75x device. |
| channel | Channel whose FIFO to read. |
| buf | Data to be written. |
| len | Number of bytes to write. |
| 0 | On success. |
| int mfd_sc16is75x_write_register | ( | const struct device * | dev, |
| const uint8_t | channel, | ||
| const uint8_t | reg, | ||
| const uint8_t | value | ||
| ) |
#include <include/zephyr/drivers/mfd/sc16is75x.h>
Write to an internal register.
| dev | An SC16IS75x device. |
| channel | Channel to access. |
| reg | Register address to write to. |
| value | Value to be written. |
| 0 | On success. |