Bridle API 4.1.99
A Zephyr based application framework
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sc16is75x.h File Reference

MFD Interface for an SC16IS75X bridge. More...

#include <stddef.h>
#include <stdint.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/sys/util_macro.h>

Go to the source code of this file.

Macros

#define FIELD_POS(field)   field##_POS
 
#define FIELD_SIZE(field)   field##_SIZE
 
#define GET_FIELD(reg, field)    _GET_FIELD_(reg, FIELD_POS(field), FIELD_SIZE(field))
 
#define SET_FIELD(reg, field, value)    _SET_FIELD_(reg, FIELD_POS(field), FIELD_SIZE(field), value)
 
#define GET_FIELD_POS(field)    _GET_FIELD_POS_(FIELD_POS(field))
 
#define GET_FIELD_SZ(field)    _GET_FIELD_SZ_(FIELD_SIZE(field))
 
#define SC16IS75X_REG_RHR   0x00
 
#define SC16IS75X_REG_THR   0x00
 
#define SC16IS75X_REG_IER   0x01
 
#define SC16IS75X_BIT_IER_RXHSENA   0
 
#define SC16IS75X_BIT_IER_TXHSENA   1
 
#define SC16IS75X_BIT_IER_RXLSENA   2
 
#define SC16IS75X_BIT_IER_MSENA   3
 
#define SC16IS75X_BIT_IER_SLEEPENA   4
 
#define SC16IS75X_BIT_IER_XOFFENA   5
 
#define SC16IS75X_BIT_IER_RTSENA   6
 
#define SC16IS75X_BIT_IER_CTSENA   7
 
#define SC16IS75X_REG_FCR   0x02
 
#define SC16IS75X_BIT_FCR_FIFOENA   0
 
#define SC16IS75X_BIT_FCR_RXFIFORST   1
 
#define SC16IS75X_BIT_FCR_TXFIFORST   2
 
#define SC16IS75X_BIT_FCR_TXFIFOTRIG   4
 
#define SC16IS75X_TXFIFOTRIG_8SP   0b00
 
#define SC16IS75X_TXFIFOTRIG_16SP   0b01
 
#define SC16IS75X_TXFIFOTRIG_32SP   0b10
 
#define SC16IS75X_TXFIFOTRIG_56SP   0b11
 
#define SC16IS75X_BIT_FCR_RXFIFOTRIG   6
 
#define SC16IS75X_RXFIFOTRIG_8CH   0b00
 
#define SC16IS75X_RXFIFOTRIG_16CH   0b01
 
#define SC16IS75X_RXFIFOTRIG_56CH   0b10
 
#define SC16IS75X_RXFIFOTRIG_60CH   0b11
 
#define SC16IS75X_REG_IIR   0x02
 
#define SC16IS75X_BIT_IIR_PENDING   0
 
#define SC16IS75X_BIT_IIR_TYPE_POS   1
 
#define SC16IS75X_BIT_IIR_TYPE_SIZE   5
 
#define SC16IS75X_INT_RXLSE   0b00011
 
#define SC16IS75X_INT_RXTO   0b00110
 
#define SC16IS75X_INT_RHRI   0b00010
 
#define SC16IS75X_INT_THRI   0b00001
 
#define SC16IS75X_INT_MSI   0b00000
 
#define SC16IS75X_INT_IO   0b11000
 
#define SC16IS75X_INT_XOFF   0b01000
 
#define SC16IS75X_INT_HWFL   0b10000
 
#define SC16IS75X_BIT_IIR_MIRROR_FIFOENA_POS   6
 
#define SC16IS75X_BIT_IIR_MIRROR_FIFOENA_SIZE   2
 
#define SC16IS75X_INT_FIFOENA   0b11
 
#define SC16IS75X_REG_LCR   0x03
 
#define SC16IS75X_BIT_LCR_WORD_LEN_POS   0
 
#define SC16IS75X_BIT_LCR_WORD_LEN_SIZE   2
 
#define SC16IS75X_WORD_LEN_5   0b00
 
#define SC16IS75X_WORD_LEN_6   0b01
 
#define SC16IS75X_WORD_LEN_7   0b10
 
#define SC16IS75X_WORD_LEN_8   0b11
 
#define SC16IS75X_BIT_LCR_STOP_LEN_POS   2
 
#define SC16IS75X_BIT_LCR_STOP_LEN_SIZE   1
 
#define SC16IS75X_STOP_LEN_1   0b0
 
#define SC16IS75X_STOP_LEN_1_5   0b1
 
#define SC16IS75X_STOP_LEN_2   0b1
 
#define SC16IS75X_BIT_LCR_PARITY_POS   3
 
#define SC16IS75X_BIT_LCR_PARITY_SIZE   3
 
#define SC16IS75X_PARITY_NONE   0b000
 
#define SC16IS75X_PARITY_ODD   0b001
 
#define SC16IS75X_PARITY_EVEN   0b011
 
#define SC16IS75X_PARITY_MARK   0b101
 
#define SC16IS75X_PARITY_SPACE   0b111
 
#define SC16IS75X_BIT_LCR_TX_LINE_BREAK   6
 
#define SC16IS75X_BIT_LCR_DLENA   7
 
#define SC16IS75X_BIT_LCR_ACCESS_EFR   0b10111111 /* 0xBF */
 
#define SC16IS75X_REG_MCR   0x04
 
#define SC16IS75X_BIT_MCR_DTR   0
 
#define SC16IS75X_BIT_MCR_RTS   1
 
#define SC16IS75X_BIT_MCR_TCRTLRENA   2
 
#define SC16IS75X_BIT_MCR_LOOPBACK   4
 
#define SC16IS75X_BIT_MCR_XONANY   5
 
#define SC16IS75X_BIT_MCR_IRDAENA   6
 
#define SC16IS75X_BIT_MCR_CLKDIV   7
 
#define SC16IS75X_REG_LSR   0x05
 
#define SC16IS75X_BIT_LSR_RX_DATA   0
 
#define SC16IS75X_BIT_LSR_RX_OVERRUN   1
 
#define SC16IS75X_BIT_LSR_RX_PARITY   2
 
#define SC16IS75X_BIT_LSR_RX_FRAMING   3
 
#define SC16IS75X_BIT_LSR_RX_LINE_BREAK   4
 
#define SC16IS75X_BIT_LSR_THREMPTY   5
 
#define SC16IS75X_BIT_LSR_THRTSREMPTY   6
 
#define SC16IS75X_BIT_LSR_RX_FIFO   7
 
#define SC16IS75X_REG_MSR   0x06
 
#define SC16IS75X_BIT_MSR_CTS_CHANGED   0
 
#define SC16IS75X_BIT_MSR_DSR_CHANGED   1
 
#define SC16IS75X_BIT_MSR_RI_CHANGED   2
 
#define SC16IS75X_BIT_MSR_CD_CHANGED   3
 
#define SC16IS75X_BIT_MSR_CTS   4
 
#define SC16IS75X_BIT_MSR_DSR   5
 
#define SC16IS75X_BIT_MSR_RI   6
 
#define SC16IS75X_BIT_MSR_CD   7
 
#define SC16IS75X_REG_SPR   0x07
 
#define SC16IS75X_REG_TCR   0x06
 
#define SC16IS75X_REG_TLR   0x07
 
#define SC16IS75X_REG_TXLVL   0x08
 
#define SC16IS75X_BIT_TXLVL_SP_POS   0
 
#define SC16IS75X_BIT_TXLVL_SP_SIZE   7
 
#define SC16IS75X_REG_RXLVL   0x09
 
#define SC16IS75X_BIT_RXLVL_CH_POS   0
 
#define SC16IS75X_BIT_RXLVL_CH_SIZE   7
 
#define SC16IS75X_REG_IODIR   0x0A
 
#define SC16IS75X_REG_IOSTATE   0x0B
 
#define SC16IS75X_REG_IOINTENA   0x0C
 
#define SC16IS75X_REG_IOCONTROL   0x0E
 
#define SC16IS75X_BIT_IOCONTROL_IOLATCH   0
 
#define SC16IS75X_BIT_IOCONTROL_MODEM_PINS_A   1
 
#define SC16IS75X_BIT_IOCONTROL_MODEM_PINS_B   2
 
#define SC16IS75X_BIT_IOCONTROL_SRESET   3
 
#define SC16IS75X_REG_EFCR   0x0F
 
#define SC16IS75X_BIT_EFCR_RS485   0
 
#define SC16IS75X_BIT_EFCR_RXDISABLE   1
 
#define SC16IS75X_BIT_EFCR_TXDISABLE   2
 
#define SC16IS75X_BIT_EFCR_RTSCON   4
 
#define SC16IS75X_BIT_EFCR_RTSINVER   5
 
#define SC16IS75X_BIT_EFCR_IRDA   7
 
#define SC16IS75X_REG_DLL   0x00
 
#define SC16IS75X_REG_DLH   0x01
 
#define SC16IS75X_REG_EFR   0x02
 
#define SC16IS75X_BIT_EFR_RX_SWFLOWCTRL_POS   0
 
#define SC16IS75X_BIT_EFR_RX_SWFLOWCTRL_SIZE   2
 
#define SC16IS75X_BIT_EFR_TX_SWFLOWCTRL_POS   2
 
#define SC16IS75X_BIT_EFR_TX_SWFLOWCTRL_SIZE   2
 
#define SC16IS75X_SWFLOWCTRL_NONE   0b00
 
#define SC16IS75X_SWFLOWCTRL_XONOFF1   0b10
 
#define SC16IS75X_SWFLOWCTRL_XONOFF2   0b01
 
#define SC16IS75X_SWFLOWCTRL_XONOFF12   0b11
 
#define SC16IS75X_BIT_EFR_EFENA   4
 
#define SC16IS75X_BIT_EFR_XOFF2ENA   5
 
#define SC16IS75X_BIT_EFR_RTSENA   6
 
#define SC16IS75X_BIT_EFR_CTSENA   7
 
#define SC16IS75X_REG_XON1   0x04
 
#define SC16IS75X_REG_XON2   0x05
 
#define SC16IS75X_REG_XOFF1   0x06
 
#define SC16IS75X_REG_XOFF2   0x07
 
#define SC16IS75X_FIFO_CAPACITY   64
 FIFO capacity in byte.
 
#define SC16IS75X_IO_NUM_PINS_MAX   8
 Maximum programmable I/O pins.
 
#define SC16IS75X_UART_CHANNELS_MAX   2
 Maximum UART channels.
 
#define READ_SC16IS75X_REG(dev, reg, val)    mfd_sc16is75x_read_register((dev), 0, SC16IS75X_REG_##reg, (val));
 
#define READ_SC16IS75X_CHREG(dev, ch, reg, val)    mfd_sc16is75x_read_register((dev), (ch), SC16IS75X_REG_##reg, (val));
 
#define WRITE_SC16IS75X_REG(dev, reg, val)    mfd_sc16is75x_write_register((dev), 0, SC16IS75X_REG_##reg, (val));
 
#define WRITE_SC16IS75X_CHREG(dev, ch, reg, val)    mfd_sc16is75x_write_register((dev), (ch), SC16IS75X_REG_##reg, (val));
 
#define SETBIT_SC16IS75X_REG(dev, reg, bit, val)
 
#define SETBIT_SC16IS75X_CHREG(dev, ch, reg, bit, val)
 

Functions

int mfd_sc16is75x_read_register (const struct device *dev, const uint8_t channel, const uint8_t reg, uint8_t *value)
 Read from an internal register.
 
int mfd_sc16is75x_write_register (const struct device *dev, const uint8_t channel, const uint8_t reg, const uint8_t value)
 Write to an internal register.
 
int mfd_sc16is75x_set_register_bit (const struct device *dev, const uint8_t channel, const uint8_t reg, const uint8_t bit, const bool value)
 Enable or disable a bit in an internal register.
 
int mfd_sc16is75x_read_fifo (const struct device *dev, const uint8_t channel, uint8_t *buf, const size_t len)
 Read data from FIFO.
 
int mfd_sc16is75x_write_fifo (const struct device *dev, const uint8_t channel, const uint8_t *buf, const size_t len)
 Write data to FIFO.
 

Detailed Description

MFD Interface for an SC16IS75X bridge.

Macro Definition Documentation

◆ FIELD_POS

#define FIELD_POS (   field)    field##_POS

◆ FIELD_SIZE

#define FIELD_SIZE (   field)    field##_SIZE

◆ GET_FIELD

#define GET_FIELD (   reg,
  field 
)     _GET_FIELD_(reg, FIELD_POS(field), FIELD_SIZE(field))

◆ GET_FIELD_POS

#define GET_FIELD_POS (   field)     _GET_FIELD_POS_(FIELD_POS(field))

◆ GET_FIELD_SZ

#define GET_FIELD_SZ (   field)     _GET_FIELD_SZ_(FIELD_SIZE(field))

◆ SC16IS75X_BIT_EFCR_IRDA

#define SC16IS75X_BIT_EFCR_IRDA   7

◆ SC16IS75X_BIT_EFCR_RS485

#define SC16IS75X_BIT_EFCR_RS485   0

◆ SC16IS75X_BIT_EFCR_RTSCON

#define SC16IS75X_BIT_EFCR_RTSCON   4

◆ SC16IS75X_BIT_EFCR_RTSINVER

#define SC16IS75X_BIT_EFCR_RTSINVER   5

◆ SC16IS75X_BIT_EFCR_RXDISABLE

#define SC16IS75X_BIT_EFCR_RXDISABLE   1

◆ SC16IS75X_BIT_EFCR_TXDISABLE

#define SC16IS75X_BIT_EFCR_TXDISABLE   2

◆ SC16IS75X_BIT_EFR_CTSENA

#define SC16IS75X_BIT_EFR_CTSENA   7

◆ SC16IS75X_BIT_EFR_EFENA

#define SC16IS75X_BIT_EFR_EFENA   4

◆ SC16IS75X_BIT_EFR_RTSENA

#define SC16IS75X_BIT_EFR_RTSENA   6

◆ SC16IS75X_BIT_EFR_RX_SWFLOWCTRL_POS

#define SC16IS75X_BIT_EFR_RX_SWFLOWCTRL_POS   0

◆ SC16IS75X_BIT_EFR_RX_SWFLOWCTRL_SIZE

#define SC16IS75X_BIT_EFR_RX_SWFLOWCTRL_SIZE   2

◆ SC16IS75X_BIT_EFR_TX_SWFLOWCTRL_POS

#define SC16IS75X_BIT_EFR_TX_SWFLOWCTRL_POS   2

◆ SC16IS75X_BIT_EFR_TX_SWFLOWCTRL_SIZE

#define SC16IS75X_BIT_EFR_TX_SWFLOWCTRL_SIZE   2

◆ SC16IS75X_BIT_EFR_XOFF2ENA

#define SC16IS75X_BIT_EFR_XOFF2ENA   5

◆ SC16IS75X_BIT_FCR_FIFOENA

#define SC16IS75X_BIT_FCR_FIFOENA   0

◆ SC16IS75X_BIT_FCR_RXFIFORST

#define SC16IS75X_BIT_FCR_RXFIFORST   1

◆ SC16IS75X_BIT_FCR_RXFIFOTRIG

#define SC16IS75X_BIT_FCR_RXFIFOTRIG   6

◆ SC16IS75X_BIT_FCR_TXFIFORST

#define SC16IS75X_BIT_FCR_TXFIFORST   2

◆ SC16IS75X_BIT_FCR_TXFIFOTRIG

#define SC16IS75X_BIT_FCR_TXFIFOTRIG   4

◆ SC16IS75X_BIT_IER_CTSENA

#define SC16IS75X_BIT_IER_CTSENA   7

◆ SC16IS75X_BIT_IER_MSENA

#define SC16IS75X_BIT_IER_MSENA   3

◆ SC16IS75X_BIT_IER_RTSENA

#define SC16IS75X_BIT_IER_RTSENA   6

◆ SC16IS75X_BIT_IER_RXHSENA

#define SC16IS75X_BIT_IER_RXHSENA   0

◆ SC16IS75X_BIT_IER_RXLSENA

#define SC16IS75X_BIT_IER_RXLSENA   2

◆ SC16IS75X_BIT_IER_SLEEPENA

#define SC16IS75X_BIT_IER_SLEEPENA   4

◆ SC16IS75X_BIT_IER_TXHSENA

#define SC16IS75X_BIT_IER_TXHSENA   1

◆ SC16IS75X_BIT_IER_XOFFENA

#define SC16IS75X_BIT_IER_XOFFENA   5

◆ SC16IS75X_BIT_IIR_MIRROR_FIFOENA_POS

#define SC16IS75X_BIT_IIR_MIRROR_FIFOENA_POS   6

◆ SC16IS75X_BIT_IIR_MIRROR_FIFOENA_SIZE

#define SC16IS75X_BIT_IIR_MIRROR_FIFOENA_SIZE   2

◆ SC16IS75X_BIT_IIR_PENDING

#define SC16IS75X_BIT_IIR_PENDING   0

◆ SC16IS75X_BIT_IIR_TYPE_POS

#define SC16IS75X_BIT_IIR_TYPE_POS   1

◆ SC16IS75X_BIT_IIR_TYPE_SIZE

#define SC16IS75X_BIT_IIR_TYPE_SIZE   5

◆ SC16IS75X_BIT_IOCONTROL_IOLATCH

#define SC16IS75X_BIT_IOCONTROL_IOLATCH   0

◆ SC16IS75X_BIT_IOCONTROL_MODEM_PINS_A

#define SC16IS75X_BIT_IOCONTROL_MODEM_PINS_A   1

◆ SC16IS75X_BIT_IOCONTROL_MODEM_PINS_B

#define SC16IS75X_BIT_IOCONTROL_MODEM_PINS_B   2

◆ SC16IS75X_BIT_IOCONTROL_SRESET

#define SC16IS75X_BIT_IOCONTROL_SRESET   3

◆ SC16IS75X_BIT_LCR_ACCESS_EFR

#define SC16IS75X_BIT_LCR_ACCESS_EFR   0b10111111 /* 0xBF */

◆ SC16IS75X_BIT_LCR_DLENA

#define SC16IS75X_BIT_LCR_DLENA   7

◆ SC16IS75X_BIT_LCR_PARITY_POS

#define SC16IS75X_BIT_LCR_PARITY_POS   3

◆ SC16IS75X_BIT_LCR_PARITY_SIZE

#define SC16IS75X_BIT_LCR_PARITY_SIZE   3

◆ SC16IS75X_BIT_LCR_STOP_LEN_POS

#define SC16IS75X_BIT_LCR_STOP_LEN_POS   2

◆ SC16IS75X_BIT_LCR_STOP_LEN_SIZE

#define SC16IS75X_BIT_LCR_STOP_LEN_SIZE   1

◆ SC16IS75X_BIT_LCR_TX_LINE_BREAK

#define SC16IS75X_BIT_LCR_TX_LINE_BREAK   6

◆ SC16IS75X_BIT_LCR_WORD_LEN_POS

#define SC16IS75X_BIT_LCR_WORD_LEN_POS   0

◆ SC16IS75X_BIT_LCR_WORD_LEN_SIZE

#define SC16IS75X_BIT_LCR_WORD_LEN_SIZE   2

◆ SC16IS75X_BIT_LSR_RX_DATA

#define SC16IS75X_BIT_LSR_RX_DATA   0

◆ SC16IS75X_BIT_LSR_RX_FIFO

#define SC16IS75X_BIT_LSR_RX_FIFO   7

◆ SC16IS75X_BIT_LSR_RX_FRAMING

#define SC16IS75X_BIT_LSR_RX_FRAMING   3

◆ SC16IS75X_BIT_LSR_RX_LINE_BREAK

#define SC16IS75X_BIT_LSR_RX_LINE_BREAK   4

◆ SC16IS75X_BIT_LSR_RX_OVERRUN

#define SC16IS75X_BIT_LSR_RX_OVERRUN   1

◆ SC16IS75X_BIT_LSR_RX_PARITY

#define SC16IS75X_BIT_LSR_RX_PARITY   2

◆ SC16IS75X_BIT_LSR_THREMPTY

#define SC16IS75X_BIT_LSR_THREMPTY   5

◆ SC16IS75X_BIT_LSR_THRTSREMPTY

#define SC16IS75X_BIT_LSR_THRTSREMPTY   6

◆ SC16IS75X_BIT_MCR_CLKDIV

#define SC16IS75X_BIT_MCR_CLKDIV   7

◆ SC16IS75X_BIT_MCR_DTR

#define SC16IS75X_BIT_MCR_DTR   0

◆ SC16IS75X_BIT_MCR_IRDAENA

#define SC16IS75X_BIT_MCR_IRDAENA   6

◆ SC16IS75X_BIT_MCR_LOOPBACK

#define SC16IS75X_BIT_MCR_LOOPBACK   4

◆ SC16IS75X_BIT_MCR_RTS

#define SC16IS75X_BIT_MCR_RTS   1

◆ SC16IS75X_BIT_MCR_TCRTLRENA

#define SC16IS75X_BIT_MCR_TCRTLRENA   2

◆ SC16IS75X_BIT_MCR_XONANY

#define SC16IS75X_BIT_MCR_XONANY   5

◆ SC16IS75X_BIT_MSR_CD

#define SC16IS75X_BIT_MSR_CD   7

◆ SC16IS75X_BIT_MSR_CD_CHANGED

#define SC16IS75X_BIT_MSR_CD_CHANGED   3

◆ SC16IS75X_BIT_MSR_CTS

#define SC16IS75X_BIT_MSR_CTS   4

◆ SC16IS75X_BIT_MSR_CTS_CHANGED

#define SC16IS75X_BIT_MSR_CTS_CHANGED   0

◆ SC16IS75X_BIT_MSR_DSR

#define SC16IS75X_BIT_MSR_DSR   5

◆ SC16IS75X_BIT_MSR_DSR_CHANGED

#define SC16IS75X_BIT_MSR_DSR_CHANGED   1

◆ SC16IS75X_BIT_MSR_RI

#define SC16IS75X_BIT_MSR_RI   6

◆ SC16IS75X_BIT_MSR_RI_CHANGED

#define SC16IS75X_BIT_MSR_RI_CHANGED   2

◆ SC16IS75X_BIT_RXLVL_CH_POS

#define SC16IS75X_BIT_RXLVL_CH_POS   0

◆ SC16IS75X_BIT_RXLVL_CH_SIZE

#define SC16IS75X_BIT_RXLVL_CH_SIZE   7

◆ SC16IS75X_BIT_TXLVL_SP_POS

#define SC16IS75X_BIT_TXLVL_SP_POS   0

◆ SC16IS75X_BIT_TXLVL_SP_SIZE

#define SC16IS75X_BIT_TXLVL_SP_SIZE   7

◆ SC16IS75X_INT_FIFOENA

#define SC16IS75X_INT_FIFOENA   0b11

◆ SC16IS75X_INT_HWFL

#define SC16IS75X_INT_HWFL   0b10000

◆ SC16IS75X_INT_IO

#define SC16IS75X_INT_IO   0b11000

◆ SC16IS75X_INT_MSI

#define SC16IS75X_INT_MSI   0b00000

◆ SC16IS75X_INT_RHRI

#define SC16IS75X_INT_RHRI   0b00010

◆ SC16IS75X_INT_RXLSE

#define SC16IS75X_INT_RXLSE   0b00011

◆ SC16IS75X_INT_RXTO

#define SC16IS75X_INT_RXTO   0b00110

◆ SC16IS75X_INT_THRI

#define SC16IS75X_INT_THRI   0b00001

◆ SC16IS75X_INT_XOFF

#define SC16IS75X_INT_XOFF   0b01000

◆ SC16IS75X_PARITY_EVEN

#define SC16IS75X_PARITY_EVEN   0b011

◆ SC16IS75X_PARITY_MARK

#define SC16IS75X_PARITY_MARK   0b101

◆ SC16IS75X_PARITY_NONE

#define SC16IS75X_PARITY_NONE   0b000

◆ SC16IS75X_PARITY_ODD

#define SC16IS75X_PARITY_ODD   0b001

◆ SC16IS75X_PARITY_SPACE

#define SC16IS75X_PARITY_SPACE   0b111

◆ SC16IS75X_REG_DLH

#define SC16IS75X_REG_DLH   0x01

◆ SC16IS75X_REG_DLL

#define SC16IS75X_REG_DLL   0x00

◆ SC16IS75X_REG_EFCR

#define SC16IS75X_REG_EFCR   0x0F

◆ SC16IS75X_REG_EFR

#define SC16IS75X_REG_EFR   0x02

◆ SC16IS75X_REG_FCR

#define SC16IS75X_REG_FCR   0x02

◆ SC16IS75X_REG_IER

#define SC16IS75X_REG_IER   0x01

◆ SC16IS75X_REG_IIR

#define SC16IS75X_REG_IIR   0x02

◆ SC16IS75X_REG_IOCONTROL

#define SC16IS75X_REG_IOCONTROL   0x0E

◆ SC16IS75X_REG_IODIR

#define SC16IS75X_REG_IODIR   0x0A

◆ SC16IS75X_REG_IOINTENA

#define SC16IS75X_REG_IOINTENA   0x0C

◆ SC16IS75X_REG_IOSTATE

#define SC16IS75X_REG_IOSTATE   0x0B

◆ SC16IS75X_REG_LCR

#define SC16IS75X_REG_LCR   0x03

◆ SC16IS75X_REG_LSR

#define SC16IS75X_REG_LSR   0x05

◆ SC16IS75X_REG_MCR

#define SC16IS75X_REG_MCR   0x04

◆ SC16IS75X_REG_MSR

#define SC16IS75X_REG_MSR   0x06

◆ SC16IS75X_REG_RHR

#define SC16IS75X_REG_RHR   0x00

◆ SC16IS75X_REG_RXLVL

#define SC16IS75X_REG_RXLVL   0x09

◆ SC16IS75X_REG_SPR

#define SC16IS75X_REG_SPR   0x07

◆ SC16IS75X_REG_TCR

#define SC16IS75X_REG_TCR   0x06

◆ SC16IS75X_REG_THR

#define SC16IS75X_REG_THR   0x00

◆ SC16IS75X_REG_TLR

#define SC16IS75X_REG_TLR   0x07

◆ SC16IS75X_REG_TXLVL

#define SC16IS75X_REG_TXLVL   0x08

◆ SC16IS75X_REG_XOFF1

#define SC16IS75X_REG_XOFF1   0x06

◆ SC16IS75X_REG_XOFF2

#define SC16IS75X_REG_XOFF2   0x07

◆ SC16IS75X_REG_XON1

#define SC16IS75X_REG_XON1   0x04

◆ SC16IS75X_REG_XON2

#define SC16IS75X_REG_XON2   0x05

◆ SC16IS75X_RXFIFOTRIG_16CH

#define SC16IS75X_RXFIFOTRIG_16CH   0b01

◆ SC16IS75X_RXFIFOTRIG_56CH

#define SC16IS75X_RXFIFOTRIG_56CH   0b10

◆ SC16IS75X_RXFIFOTRIG_60CH

#define SC16IS75X_RXFIFOTRIG_60CH   0b11

◆ SC16IS75X_RXFIFOTRIG_8CH

#define SC16IS75X_RXFIFOTRIG_8CH   0b00

◆ SC16IS75X_STOP_LEN_1

#define SC16IS75X_STOP_LEN_1   0b0

◆ SC16IS75X_STOP_LEN_1_5

#define SC16IS75X_STOP_LEN_1_5   0b1

◆ SC16IS75X_STOP_LEN_2

#define SC16IS75X_STOP_LEN_2   0b1

◆ SC16IS75X_SWFLOWCTRL_NONE

#define SC16IS75X_SWFLOWCTRL_NONE   0b00

◆ SC16IS75X_SWFLOWCTRL_XONOFF1

#define SC16IS75X_SWFLOWCTRL_XONOFF1   0b10

◆ SC16IS75X_SWFLOWCTRL_XONOFF12

#define SC16IS75X_SWFLOWCTRL_XONOFF12   0b11

◆ SC16IS75X_SWFLOWCTRL_XONOFF2

#define SC16IS75X_SWFLOWCTRL_XONOFF2   0b01

◆ SC16IS75X_TXFIFOTRIG_16SP

#define SC16IS75X_TXFIFOTRIG_16SP   0b01

◆ SC16IS75X_TXFIFOTRIG_32SP

#define SC16IS75X_TXFIFOTRIG_32SP   0b10

◆ SC16IS75X_TXFIFOTRIG_56SP

#define SC16IS75X_TXFIFOTRIG_56SP   0b11

◆ SC16IS75X_TXFIFOTRIG_8SP

#define SC16IS75X_TXFIFOTRIG_8SP   0b00

◆ SC16IS75X_WORD_LEN_5

#define SC16IS75X_WORD_LEN_5   0b00

◆ SC16IS75X_WORD_LEN_6

#define SC16IS75X_WORD_LEN_6   0b01

◆ SC16IS75X_WORD_LEN_7

#define SC16IS75X_WORD_LEN_7   0b10

◆ SC16IS75X_WORD_LEN_8

#define SC16IS75X_WORD_LEN_8   0b11

◆ SET_FIELD

#define SET_FIELD (   reg,
  field,
  value 
)     _SET_FIELD_(reg, FIELD_POS(field), FIELD_SIZE(field), value)