EVK-IRIS-W106-RW612
Overview
The EVK-IRIS-W10x evaluation kit enables stand-alone use of the IRIS-W10 series module. This guide provides details about the hardware functionality of the EVK-IRIS-W10 board and includes setup instructions for starting development.
All pins and interfaces supported on IRIS-W10 series modules are easily accessible from the evaluation board. Simple USB connections serve as the physical interfaces for power, programming COM ports, debugging, and USB peripheral connectors. Additionally, the board features other interfaces like Ethernet RJ45 and an SDIO header. The EVK-IRIS-W10 board is equipped with a Reset button, Boot button, and two user-configurable buttons. Current sense resistors are incorporated for accurate current measurement within the module.
For flexible use, GPIO signals are accessible through headers and are complemented by four mikroBUS™ standard slots for convenient utilization of Click boards™. Each Click board can be seamlessly plugged into an available mikroBUS™ slot to facilitate effortless hardware expansion with a variety of standardized compact add-on boards. Click boards are designed to accommodate a diverse range of electronic modules, including sensors, transceivers, displays, encoders, motor drivers, connection ports, and more. For further information about the Click boards, visit the MIKROE website.
Hardware
260 MHz ARM Cortex-M33, tri-radio cores for Wi-Fi 6 + BLE 5.3 + 802.15.4
1.2 MB on-chip SRAM
EVK-IRIS-W101 evaluation board with IRIS-W101 module. Dual-band PCB antenna for WLAN with 100 mm coaxial cable and U.FL connector
EVK-IRIS-W106 evaluation board with IRIS-W106 module. Dual-band integrated PCB trace antenna (external antenna not supplied)
Flash Memory Configuration
The IRIS-W1 board uses different flash vendors depending on revision:
@macronix
: Module build up to 2023 week 45@fidelex
: Module build 2023 week 46 (2346) onward
To build for a specific flash version:
west build -b ubx_evk_iris_w1@macronix
west build -b ubx_evk_iris_w1@fidelex
Supported Features
The ubx_evk_iris_w1
board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo
-
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
ubx_evk_iris_w1@fidelex/rw612
target
Type |
Location |
Description |
Compatible |
---|---|---|---|
CPU |
on-chip |
ARM Cortex-M33F CPU1 |
|
ADC |
on-chip |
NXP GAU GPADC2 |
|
ARM architecture |
on-chip |
LPC Flexcomm node2 |
|
on-chip |
RW SOC controller node2 |
||
on-chip |
NXP NBU interruption information1 |
||
Audio |
on-chip |
NXP DMIC1 |
|
Bluetooth |
on-chip |
NXP BLE HCI information1 |
|
Clock control |
on-chip |
LPC SYSCON & CLKCTL IP node2 |
|
Counter |
on-chip |
Driver that uses the NXP LPC RTC High resolution counter1 |
|
on-chip |
|||
on-chip |
NXP Multirate Timer2 |
||
on-chip |
|||
DAC |
on-chip |
NXP GAU DAC1 |
|
DMA |
on-chip |
NXP LPC DMA controller1 |
|
Ethernet |
on-chip |
NXP ENET IP Module1 |
|
on-chip |
NXP ENET MAC/L2 Device1 |
||
on-chip |
NXP ENET PTP (Precision Time Protocol) Clock1 |
||
GPIO & Headers |
on-chip |
LPC GPIO1 |
|
on-chip |
LPC GPIO port device2 |
||
IEEE 802.15.4 HDLC RCP interface |
on-chip |
NXP HDLC RCP interface node1 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8-M NVIC (Nested Vectored Interrupt Controller)1 |
|
on-chip |
NXP Pin interrupt and pattern match engine (PINT)1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MDIO |
on-chip |
NXP ENET MDIO Features1 |
|
MIPI-DBI |
on-chip |
NXP LCDIC Controller1 |
|
MMU / MPU |
on-chip |
ARMv8-M MPU (Memory Protection Unit)1 |
|
MTD |
on-board |
NXP FlexSPI NOR1 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
on-board |
AP Memory APS6404L pSRAM on NXP FlexSPI bus1 |
||
Pin control |
on-chip |
MCI IO MUX Pin Controller1 |
|
Power management |
on-chip |
NXP RW PMU1 |
|
on-chip |
Some NXP SoC’s have pins dedicated to generate a wakeup interrupt2 |
||
on-chip |
Properties for NXP power management through the PDCFG register1 1 |
||
Power domain |
on-chip |
This power domain will Turn On and Off devices when transitioning in and out a specified Power State1 |
|
PWM |
on-chip |
NXP SCTimer PWM1 |
|
Reset controller |
on-chip |
NXP RSTCTL Peripheral reset controller2 |
|
RNG |
on-chip |
Kinetis TRNG (True Random Number Generator)1 |
|
RTC |
on-chip |
NXP LPC RTC1 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
NXP FlexSPI controller1 |
|
on-chip |
NXP LPC SPI controller1 |
||
SRAM |
on-chip |
Generic on-chip SRAM2 |
|
Timer |
on-chip |
ARMv8-M System Tick1 |
|
on-chip |
NXP OS Timer on i.MX-RT5xx/6xx1 |
||
USB |
on-chip |
NXP EHCI USB device mode1 |
|
Watchdog |
on-chip |
LPC Windowed Watchdog Timer1 |
|
Wi-Fi |
on-chip |
NXP Wi-Fi Module1 |
Basic functionality like UART (default on FC3), GPIOs (I²C, SPI), and the on-board RGB LEDs is supported.
Programming and Debugging
The ubx_evk_iris_w1
board supports the runners and associated west commands listed below.
flash | debug | attach | debugserver | rtt | |
---|---|---|---|---|---|
jlink | ✅ (default) | ✅ (default) | ✅ | ✅ | ✅ |
linkserver | ✅ | ✅ | ✅ | ✅ |
Configuring a Debug Probe
A debug probe is used for both flashing and debugging the board. This board is configured by default to use the J-Link firmware.
Configuring a Console
Connect a USB cable from your PC to USB3, and use the serial terminal of your choice (minicom, PuTTY, etc.) with the following settings:
Speed: 115200
Data: 8 bits
Parity: None
Stop bits: 1
Flashing
Here is an example for the hello_world
application.
Open a serial terminal, reset the board (press the RESET button), and you should see the following message in the terminal:
**** Booting Zephyr OS build v4.1.0-2794-g6463c68bc394 ****
Hello World ! ubx_evk_iris_w1/rw612
Wireless Connectivity Support
Fetch Binary Blobs
To support Bluetooth or Wi-Fi, ubx_evk_iris_w1
requires fetching binary blobs. This can be
achieved by running the following command:
west blobs fetch hal_nxp
Bluetooth
BLE functionality requires fetching binary blobs, so make sure to follow the “Fetch Binary Blobs” section first.
The required binary blob
<zephyr workspace>/modules/hal/nxp/zephyr/blobs/rw61x_sb_ble_a2.bin
will be linked
with the application image directly, forming a single monolithic image.
Wi-Fi
Wi-Fi functionality also requires fetching binary blobs, so make sure to follow the “Fetch Binary Blobs” section first.
The required binary blob
<zephyr workspace>/modules/hal/nxp/zephyr/blobs/rw61x_sb_wifi_a2.bin
will be linked
with the application image directly, forming a single monolithic image.