Zephyr Project API 3.7.0
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
irq.h File Reference

ARM AArch32 public interrupt handling. More...

#include <zephyr/sw_isr_table.h>
#include <stdbool.h>

Go to the source code of this file.

Macros

#define IRQ_ZERO_LATENCY   BIT(0)
 Set this interrupt up as a zero-latency IRQ.
 
#define ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p)
 
#define ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p)
 
#define ARCH_ISR_DIRECT_PM()   do { } while (false)
 
#define ARCH_ISR_DIRECT_HEADER()   arch_isr_direct_header()
 
#define ARCH_ISR_DIRECT_FOOTER(swap)   arch_isr_direct_footer(swap)
 
#define ARCH_ISR_DIAG_OFF
 
#define ARCH_ISR_DIAG_ON
 
#define ARCH_ISR_DIRECT_DECLARE(name)
 

Functions

void arch_irq_enable (unsigned int irq)
 
void arch_irq_disable (unsigned int irq)
 
int arch_irq_is_enabled (unsigned int irq)
 
static void arch_isr_direct_header (void)
 
static void arch_isr_direct_footer (int maybe_swap)
 

Detailed Description

ARM AArch32 public interrupt handling.

ARM AArch32-specific kernel interrupt handling interface. Included by arm/arch.h.

Macro Definition Documentation

◆ ARCH_IRQ_CONNECT

#define ARCH_IRQ_CONNECT (   irq_p,
  priority_p,
  isr_p,
  isr_param_p,
  flags_p 
)
Value:
{ \
BUILD_ASSERT(IS_ENABLED(CONFIG_ZERO_LATENCY_IRQS) || !(flags_p & IRQ_ZERO_LATENCY), \
"ZLI interrupt registered but feature is disabled"); \
_CHECK_PRIO(priority_p, flags_p) \
Z_ISR_DECLARE(irq_p, 0, isr_p, isr_param_p); \
z_arm_irq_priority_set(irq_p, priority_p, flags_p); \
}
#define IRQ_ZERO_LATENCY
Set this interrupt up as a zero-latency IRQ.
Definition irq.h:86
#define IS_ENABLED(config_macro)
Check for macro definition in compiler-visible expressions.
Definition util_macro.h:124

◆ ARCH_IRQ_DIRECT_CONNECT

#define ARCH_IRQ_DIRECT_CONNECT (   irq_p,
  priority_p,
  isr_p,
  flags_p 
)
Value:
{ \
BUILD_ASSERT(IS_ENABLED(CONFIG_ZERO_LATENCY_IRQS) || !(flags_p & IRQ_ZERO_LATENCY), \
"ZLI interrupt registered but feature is disabled"); \
_CHECK_PRIO(priority_p, flags_p) \
Z_ISR_DECLARE_DIRECT(irq_p, ISR_FLAG_DIRECT, isr_p); \
z_arm_irq_priority_set(irq_p, priority_p, flags_p); \
}
#define ISR_FLAG_DIRECT
This interrupt gets put directly in the vector table.
Definition sw_isr_table.h:180

◆ ARCH_ISR_DIAG_OFF

#define ARCH_ISR_DIAG_OFF

◆ ARCH_ISR_DIAG_ON

#define ARCH_ISR_DIAG_ON

◆ ARCH_ISR_DIRECT_DECLARE

#define ARCH_ISR_DIRECT_DECLARE (   name)
Value:
static inline int name##_body(void); \
ARCH_ISR_DIAG_OFF \
__attribute__ ((interrupt ("IRQ"))) void name(void) \
{ \
int check_reschedule; \
ISR_DIRECT_HEADER(); \
check_reschedule = name##_body(); \
ISR_DIRECT_FOOTER(check_reschedule); \
} \
ARCH_ISR_DIAG_ON \
static inline int name##_body(void)

◆ ARCH_ISR_DIRECT_FOOTER

#define ARCH_ISR_DIRECT_FOOTER (   swap)    arch_isr_direct_footer(swap)

◆ ARCH_ISR_DIRECT_HEADER

#define ARCH_ISR_DIRECT_HEADER ( )    arch_isr_direct_header()

◆ ARCH_ISR_DIRECT_PM

#define ARCH_ISR_DIRECT_PM ( )    do { } while (false)

◆ IRQ_ZERO_LATENCY

#define IRQ_ZERO_LATENCY   BIT(0)

Set this interrupt up as a zero-latency IRQ.

If CONFIG_ZERO_LATENCY_LEVELS is 1 it has a fixed hardware priority level (discarding what was supplied in the interrupt's priority argument). If CONFIG_ZERO_LATENCY_LEVELS is greater 1 it has the priority level assigned by the argument. The interrupt will run even if irq_lock() is active. Be careful!

Function Documentation

◆ arch_irq_disable()

void arch_irq_disable ( unsigned int  irq)
extern

◆ arch_irq_enable()

void arch_irq_enable ( unsigned int  irq)
extern

◆ arch_irq_is_enabled()

int arch_irq_is_enabled ( unsigned int  irq)
extern

◆ arch_isr_direct_footer()

static void arch_isr_direct_footer ( int  maybe_swap)
inlinestatic

◆ arch_isr_direct_header()

static void arch_isr_direct_header ( void  )
inlinestatic