Zephyr Project API 3.7.0
A Scalable Open Source RTOS
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cache.h
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1/*
2 * Copyright (c) 2023 Carlo Caione <ccaione@baylibre.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
12#ifndef ZEPHYR_INCLUDE_ARCH_CACHE_H_
13#define ZEPHYR_INCLUDE_ARCH_CACHE_H_
14
22#if defined(CONFIG_ARM64)
24#elif defined(CONFIG_XTENSA)
26#endif
27
28#if defined(CONFIG_DCACHE) || defined(__DOXYGEN__)
29
36
37#define cache_data_enable arch_dcache_enable
38
45
46#define cache_data_disable arch_dcache_disable
47
58
59#define cache_data_flush_all arch_dcache_flush_all
60
71
72#define cache_data_invd_all arch_dcache_invd_all
73
84
85#define cache_data_flush_and_invd_all arch_dcache_flush_and_invd_all
86
106int arch_dcache_flush_range(void *addr, size_t size);
107
108#define cache_data_flush_range(addr, size) arch_dcache_flush_range(addr, size)
109
130int arch_dcache_invd_range(void *addr, size_t size);
131
132#define cache_data_invd_range(addr, size) arch_dcache_invd_range(addr, size)
133
155int arch_dcache_flush_and_invd_range(void *addr, size_t size);
156
157#define cache_data_flush_and_invd_range(addr, size) \
158 arch_dcache_flush_and_invd_range(addr, size)
159
160#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT) || defined(__DOXYGEN__)
161
176
177#define cache_data_line_size_get arch_dcache_line_size_get
178
179#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT || __DOXYGEN__ */
180
181#endif /* CONFIG_DCACHE || __DOXYGEN__ */
182
183#if defined(CONFIG_ICACHE) || defined(__DOXYGEN__)
184
191
192#define cache_instr_enable arch_icache_enable
193
200
201#define cache_instr_disable arch_icache_disable
202
213
214#define cache_instr_flush_all arch_icache_flush_all
215
226
227#define cache_instr_invd_all arch_icache_invd_all
228
239
240#define cache_instr_flush_and_invd_all arch_icache_flush_and_invd_all
241
261int arch_icache_flush_range(void *addr, size_t size);
262
263#define cache_instr_flush_range(addr, size) arch_icache_flush_range(addr, size)
264
285int arch_icache_invd_range(void *addr, size_t size);
286
287#define cache_instr_invd_range(addr, size) arch_icache_invd_range(addr, size)
288
309int arch_icache_flush_and_invd_range(void *addr, size_t size);
310
311#define cache_instr_flush_and_invd_range(addr, size) \
312 arch_icache_flush_and_invd_range(addr, size)
313
314#if defined(CONFIG_ICACHE_LINE_SIZE_DETECT) || defined(__DOXYGEN__)
315
331
332#define cache_instr_line_size_get arch_icache_line_size_get
333
334#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT || __DOXYGEN__ */
335
336#endif /* CONFIG_ICACHE || __DOXYGEN__ */
337
338#if CONFIG_CACHE_DOUBLEMAP || __DOXYGEN__
340#define cache_is_ptr_cached(ptr) arch_cache_is_ptr_cached(ptr)
341
343#define cache_is_ptr_uncached(ptr) arch_cache_is_ptr_uncached(ptr)
344
345void __sparse_cache *arch_cache_cached_ptr_get(void *ptr);
346#define cache_cached_ptr(ptr) arch_cache_cached_ptr_get(ptr)
347
348void *arch_cache_uncached_ptr_get(void __sparse_cache *ptr);
349#define cache_uncached_ptr(ptr) arch_cache_uncached_ptr_get(ptr)
350#endif /* CONFIG_CACHE_DOUBLEMAP */
351
356#endif /* ZEPHYR_INCLUDE_ARCH_CACHE_H_ */
void arch_dcache_disable(void)
Disable the d-cache.
void arch_icache_disable(void)
Disable the i-cache.
int arch_dcache_invd_range(void *addr, size_t size)
Invalidate an address range in the d-cache.
int arch_icache_flush_and_invd_all(void)
Flush and Invalidate the i-cache.
int arch_icache_flush_all(void)
Flush the i-cache.
int arch_icache_invd_all(void)
Invalidate the i-cache.
int arch_dcache_flush_range(void *addr, size_t size)
Flush an address range in the d-cache.
size_t arch_dcache_line_size_get(void)
Get the d-cache line size.
size_t arch_icache_line_size_get(void)
Get the i-cache line size.
int arch_icache_flush_range(void *addr, size_t size)
Flush an address range in the i-cache.
int arch_icache_invd_range(void *addr, size_t size)
Invalidate an address range in the i-cache.
int arch_dcache_flush_all(void)
Flush the d-cache.
bool arch_cache_is_ptr_cached(void *ptr)
void * arch_cache_uncached_ptr_get(void __sparse_cache *ptr)
int arch_icache_flush_and_invd_range(void *addr, size_t size)
Flush and Invalidate an address range in the i-cache.
bool arch_cache_is_ptr_uncached(void *ptr)
int arch_dcache_flush_and_invd_all(void)
Flush and Invalidate the d-cache.
int arch_dcache_invd_all(void)
Invalidate the d-cache.
void arch_icache_enable(void)
Enable the i-cache.
void __sparse_cache * arch_cache_cached_ptr_get(void *ptr)
int arch_dcache_flush_and_invd_range(void *addr, size_t size)
Flush and Invalidate an address range in the d-cache.
void arch_dcache_enable(void)
Enable the d-cache.
void * ptr
Definition printk.c:177