Zephyr Project API 4.4.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
arch.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
15
16#ifndef ZEPHYR_INCLUDE_ARCH_ARM_ARCH_H_
17#define ZEPHYR_INCLUDE_ARCH_ARM_ARCH_H_
18
19/* Add include for DTS generated information */
20#include <zephyr/devicetree.h>
21
25#include <zephyr/arch/arm/irq.h>
30#include <zephyr/arch/arm/nmi.h>
33#if defined(CONFIG_GDBSTUB)
35#endif
36
37#ifdef CONFIG_CPU_CORTEX_M
41#elif defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
44#if defined(CONFIG_AARCH32_ARMV8_R) || defined(CONFIG_AARCH32_ARMV8_A) || \
45 defined(CONFIG_CPU_CORTEX_A7)
48#else
50#endif
51#endif
52
53#ifdef __cplusplus
54extern "C" {
55#endif
56
57#ifndef _ASMLANGUAGE
58
59#include <zephyr/fatal_types.h>
60
62 /* Cortex-M MEMFAULT exceptions */
69
70 /* Cortex-M BUSFAULT exceptions */
78
79 /* Cortex-M USAGEFAULT exceptions */
88
89 /* Cortex-M SECURE exceptions */
98
99 /* Cortex-A/R exceptions*/
123};
124
125#endif /* _ASMLANGUAGE */
126
134#ifdef CONFIG_STACK_ALIGN_DOUBLE_WORD
135#define ARCH_STACK_PTR_ALIGN 8
136#else
137#define ARCH_STACK_PTR_ALIGN 4
138#endif
139
149#if defined(CONFIG_USERSPACE)
150#define Z_THREAD_MIN_STACK_ALIGN CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
151#elif defined(CONFIG_ARM_AARCH32_MMU)
152#define Z_THREAD_MIN_STACK_ALIGN CONFIG_ARM_MMU_REGION_MIN_ALIGN_AND_SIZE
153#else
154#define Z_THREAD_MIN_STACK_ALIGN ARCH_STACK_PTR_ALIGN
155#endif
156
204#if defined(CONFIG_MPU_STACK_GUARD)
205/* make sure there's more than enough space for an exception frame */
206#if CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE <= 0x20
207#define MPU_GUARD_ALIGN_AND_SIZE 0x40
208#else
209#define MPU_GUARD_ALIGN_AND_SIZE CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
210#endif
211#else
212#define MPU_GUARD_ALIGN_AND_SIZE 0
213#endif
214
225#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) \
226 && defined(CONFIG_MPU_STACK_GUARD)
227#if CONFIG_MPU_STACK_GUARD_MIN_SIZE_FLOAT <= 0x20
228#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT 0x40
229#else
230#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT CONFIG_MPU_STACK_GUARD_MIN_SIZE_FLOAT
231#endif
232#else
233#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT 0
234#endif
235
243#if defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
244#define Z_MPU_GUARD_ALIGN (MAX(MPU_GUARD_ALIGN_AND_SIZE, \
245 MPU_GUARD_ALIGN_AND_SIZE_FLOAT))
246#else
247#define Z_MPU_GUARD_ALIGN MPU_GUARD_ALIGN_AND_SIZE
248#endif
249
250#if defined(CONFIG_USERSPACE) && \
251 defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
252/* This MPU requires regions to be sized to a power of two, and aligned to
253 * their own size. Since an MPU region must be able to cover the entire
254 * user-accessible stack buffer, we size/align to match. The privilege
255 * mode stack is generated elsewhere in memory.
256 */
257#define ARCH_THREAD_STACK_OBJ_ALIGN(size) Z_POW2_CEIL(size)
258#define ARCH_THREAD_STACK_SIZE_ADJUST(size) Z_POW2_CEIL(size)
259#else
260#define ARCH_THREAD_STACK_OBJ_ALIGN(size) MAX(Z_THREAD_MIN_STACK_ALIGN, \
261 Z_MPU_GUARD_ALIGN)
262#ifdef CONFIG_USERSPACE
263#define ARCH_THREAD_STACK_SIZE_ADJUST(size) \
264 ROUND_UP(size, CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE)
265#endif
266#endif
267
268#ifdef CONFIG_MPU_STACK_GUARD
269/* Kernel-only stacks need an MPU guard region programmed at the beginning of
270 * the stack object, so align the object appropriately.
271 */
272#define ARCH_KERNEL_STACK_RESERVED MPU_GUARD_ALIGN_AND_SIZE
273#define ARCH_KERNEL_STACK_OBJ_ALIGN Z_MPU_GUARD_ALIGN
274#endif
275
276/* On arm, all MPU guards are carve-outs. */
277#define ARCH_THREAD_STACK_RESERVED 0
278
279/* Legacy case: retain containing extern "C" with C++ */
280#ifdef CONFIG_ARM_MPU
281#ifdef CONFIG_CPU_HAS_ARM_MPU
283#endif /* CONFIG_CPU_HAS_ARM_MPU */
284#ifdef CONFIG_CPU_HAS_NXP_SYSMPU
286#endif /* CONFIG_CPU_HAS_NXP_SYSMPU */
287#endif /* CONFIG_ARM_MPU */
288#ifdef CONFIG_ARM_AARCH32_MMU
290#endif /* CONFIG_ARM_AARCH32_MMU */
291
292#ifdef __cplusplus
293}
294#endif
295
296#endif /* ZEPHYR_INCLUDE_ARCH_ARM_ARCH_H_ */
Header file for bit reverse operations.
ARM AArch32 public interrupt handling.
Per-arch thread definition.
k_fatal_error_reason_arch
Definition arch.h:61
@ K_ERR_ARM_BUS_FP_LAZY_STATE_PRESERVATION
Definition arch.h:77
@ K_ERR_ARM_MEM_UNSTACKING
Definition arch.h:65
@ K_ERR_ARM_BACKGROUND_FAULT
Definition arch.h:102
@ K_ERR_ARM_SYNC_PARITY_ERROR_TRANSLATION_TABLE_2ND_LEVEL
Definition arch.h:122
@ K_ERR_ARM_TRANSLATION_FAULT_2ND_LEVEL
Definition arch.h:111
@ K_ERR_ARM_UNSUPPORTED_EXCLUSIVE_ACCESS_FAULT
Definition arch.h:112
@ K_ERR_ARM_SYNC_EXTERNAL_ABORT
Definition arch.h:105
@ K_ERR_ARM_SECURE_LAZY_STATE_PRESERVATION
Definition arch.h:96
@ K_ERR_ARM_SECURE_GENERIC
Definition arch.h:90
@ K_ERR_ARM_MEM_STACKING
Definition arch.h:64
@ K_ERR_ARM_SYNC_PARITY_ERROR
Definition arch.h:107
@ K_ERR_ARM_DOMAIN_FAULT_2ND_LEVEL
Definition arch.h:117
@ K_ERR_ARM_SECURE_ENTRY_POINT
Definition arch.h:91
@ K_ERR_ARM_USAGE_ILLEGAL_EXC_RETURN
Definition arch.h:85
@ K_ERR_ARM_TLB_CONFLICT_ABORT
Definition arch.h:120
@ K_ERR_ARM_USAGE_NO_COPROCESSOR
Definition arch.h:84
@ K_ERR_ARM_SYNC_PARITY_ERROR_TRANSLATION_TABLE_1ST_LEVEL
Definition arch.h:121
@ K_ERR_ARM_SECURE_INTEGRITY_SIGNATURE
Definition arch.h:92
@ K_ERR_ARM_ASYNC_EXTERNAL_ABORT
Definition arch.h:106
@ K_ERR_ARM_ACCESS_FLAG_FAULT_1ST_LEVEL
Definition arch.h:113
@ K_ERR_ARM_MEM_FP_LAZY_STATE_PRESERVATION
Definition arch.h:68
@ K_ERR_ARM_ALIGNMENT_FAULT
Definition arch.h:101
@ K_ERR_ARM_TRANSLATION_FAULT
Definition arch.h:110
@ K_ERR_ARM_USAGE_UNALIGNED_ACCESS
Definition arch.h:82
@ K_ERR_ARM_CACHE_MAINTENANCE_INSTRUCTION_FAULT
Definition arch.h:115
@ K_ERR_ARM_USAGE_ILLEGAL_EPSR
Definition arch.h:86
@ K_ERR_ARM_MEM_INSTRUCTION_ACCESS
Definition arch.h:67
@ K_ERR_ARM_SECURE_EXCEPTION_RETURN
Definition arch.h:93
@ K_ERR_ARM_SYNC_EXTERNAL_ABORT_TRANSLATION_TABLE_1ST_LEVEL
Definition arch.h:118
@ K_ERR_ARM_BUS_UNSTACKING
Definition arch.h:73
@ K_ERR_ARM_MEM_GENERIC
Definition arch.h:63
@ K_ERR_ARM_BUS_STACKING
Definition arch.h:72
@ K_ERR_ARM_PERMISSION_FAULT_2ND_LEVEL
Definition arch.h:104
@ K_ERR_ARM_USAGE_DIV_0
Definition arch.h:81
@ K_ERR_ARM_BUS_GENERIC
Definition arch.h:71
@ K_ERR_ARM_BUS_IMPRECISE_DATA_BUS
Definition arch.h:75
@ K_ERR_ARM_BUS_INSTRUCTION_BUS
Definition arch.h:76
@ K_ERR_ARM_UNDEFINED_INSTRUCTION
Definition arch.h:100
@ K_ERR_ARM_USAGE_UNDEFINED_INSTRUCTION
Definition arch.h:87
@ K_ERR_ARM_ASYNC_PARITY_ERROR
Definition arch.h:108
@ K_ERR_ARM_DEBUG_EVENT
Definition arch.h:109
@ K_ERR_ARM_SECURE_ATTRIBUTION_UNIT
Definition arch.h:94
@ K_ERR_ARM_DOMAIN_FAULT_1ST_LEVEL
Definition arch.h:116
@ K_ERR_ARM_SYNC_EXTERNAL_ABORT_TRANSLATION_TABLE_2ND_LEVEL
Definition arch.h:119
@ K_ERR_ARM_SECURE_TRANSITION
Definition arch.h:95
@ K_ERR_ARM_SECURE_LAZY_STATE_ERROR
Definition arch.h:97
@ K_ERR_ARM_USAGE_STACK_OVERFLOW
Definition arch.h:83
@ K_ERR_ARM_ACCESS_FLAG_FAULT_2ND_LEVEL
Definition arch.h:114
@ K_ERR_ARM_BUS_PRECISE_DATA_BUS
Definition arch.h:74
@ K_ERR_ARM_MEM_DATA_ACCESS
Definition arch.h:66
@ K_ERR_ARM_PERMISSION_FAULT
Definition arch.h:103
@ K_ERR_ARM_USAGE_GENERIC
Definition arch.h:80
ARM AArch32 public exception handling.
ARM AArch32 public kernel miscellaneous.
Devicetree main header.
Fatal base type definitions.
@ K_ERR_ARCH_START
Arch specific fatal errors.
Definition fatal_types.h:41
ARM AArch32 public error handling.
ARM CORTEX-M memory map.
ARM AArch32 NMI routines.