Zephyr Project API 4.4.99
A Scalable Open Source RTOS
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arch.h
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1/*
2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
15
16#ifndef ZEPHYR_INCLUDE_ARCH_ARM_ARCH_H_
17#define ZEPHYR_INCLUDE_ARCH_ARM_ARCH_H_
18
19/* Add include for DTS generated information */
20#include <zephyr/devicetree.h>
21
24#include <zephyr/arch/arm/irq.h>
29#include <zephyr/arch/arm/nmi.h>
32#if defined(CONFIG_GDBSTUB)
34#endif
35
36#ifdef CONFIG_CPU_CORTEX_M
40#elif defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
43#if defined(CONFIG_AARCH32_ARMV8_R) || defined(CONFIG_AARCH32_ARMV8_A) || \
44 defined(CONFIG_CPU_CORTEX_A7)
47#else
49#endif
50#endif
51
52#ifdef __cplusplus
53extern "C" {
54#endif
55
56#ifndef _ASMLANGUAGE
57
58#include <zephyr/fatal_types.h>
59
61 /* Cortex-M MEMFAULT exceptions */
68
69 /* Cortex-M BUSFAULT exceptions */
77
78 /* Cortex-M USAGEFAULT exceptions */
87
88 /* Cortex-M SECURE exceptions */
97
98 /* Cortex-A/R exceptions*/
122};
123
124#endif /* _ASMLANGUAGE */
125
133#ifdef CONFIG_STACK_ALIGN_DOUBLE_WORD
134#define ARCH_STACK_PTR_ALIGN 8
135#else
136#define ARCH_STACK_PTR_ALIGN 4
137#endif
138
148#if defined(CONFIG_USERSPACE)
149#define Z_THREAD_MIN_STACK_ALIGN CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
150#elif defined(CONFIG_ARM_AARCH32_MMU)
151#define Z_THREAD_MIN_STACK_ALIGN CONFIG_ARM_MMU_REGION_MIN_ALIGN_AND_SIZE
152#else
153#define Z_THREAD_MIN_STACK_ALIGN ARCH_STACK_PTR_ALIGN
154#endif
155
203#if defined(CONFIG_MPU_STACK_GUARD)
204/* make sure there's more than enough space for an exception frame */
205#if CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE <= 0x20
206#define MPU_GUARD_ALIGN_AND_SIZE 0x40
207#else
208#define MPU_GUARD_ALIGN_AND_SIZE CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
209#endif
210#else
211#define MPU_GUARD_ALIGN_AND_SIZE 0
212#endif
213
224#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) \
225 && defined(CONFIG_MPU_STACK_GUARD)
226#if CONFIG_MPU_STACK_GUARD_MIN_SIZE_FLOAT <= 0x20
227#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT 0x40
228#else
229#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT CONFIG_MPU_STACK_GUARD_MIN_SIZE_FLOAT
230#endif
231#else
232#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT 0
233#endif
234
242#if defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
243#define Z_MPU_GUARD_ALIGN (MAX(MPU_GUARD_ALIGN_AND_SIZE, \
244 MPU_GUARD_ALIGN_AND_SIZE_FLOAT))
245#else
246#define Z_MPU_GUARD_ALIGN MPU_GUARD_ALIGN_AND_SIZE
247#endif
248
249#if defined(CONFIG_USERSPACE) && \
250 defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
251/* This MPU requires regions to be sized to a power of two, and aligned to
252 * their own size. Since an MPU region must be able to cover the entire
253 * user-accessible stack buffer, we size/align to match. The privilege
254 * mode stack is generated elsewhere in memory.
255 */
256#define ARCH_THREAD_STACK_OBJ_ALIGN(size) Z_POW2_CEIL(size)
257#define ARCH_THREAD_STACK_SIZE_ADJUST(size) Z_POW2_CEIL(size)
258#else
259#define ARCH_THREAD_STACK_OBJ_ALIGN(size) MAX(Z_THREAD_MIN_STACK_ALIGN, \
260 Z_MPU_GUARD_ALIGN)
261#ifdef CONFIG_USERSPACE
262#define ARCH_THREAD_STACK_SIZE_ADJUST(size) \
263 ROUND_UP(size, CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE)
264#endif
265#endif
266
267#ifdef CONFIG_MPU_STACK_GUARD
268/* Kernel-only stacks need an MPU guard region programmed at the beginning of
269 * the stack object, so align the object appropriately.
270 */
271#define ARCH_KERNEL_STACK_RESERVED MPU_GUARD_ALIGN_AND_SIZE
272#define ARCH_KERNEL_STACK_OBJ_ALIGN Z_MPU_GUARD_ALIGN
273#endif
274
275/* On arm, all MPU guards are carve-outs. */
276#define ARCH_THREAD_STACK_RESERVED 0
277
278/* Legacy case: retain containing extern "C" with C++ */
279#ifdef CONFIG_ARM_MPU
280#ifdef CONFIG_CPU_HAS_ARM_MPU
282#endif /* CONFIG_CPU_HAS_ARM_MPU */
283#ifdef CONFIG_CPU_HAS_NXP_SYSMPU
285#endif /* CONFIG_CPU_HAS_NXP_SYSMPU */
286#endif /* CONFIG_ARM_MPU */
287#ifdef CONFIG_ARM_AARCH32_MMU
289#endif /* CONFIG_ARM_AARCH32_MMU */
290
291#ifdef __cplusplus
292}
293#endif
294
295#endif /* ZEPHYR_INCLUDE_ARCH_ARM_ARCH_H_ */
ARM AArch32 public interrupt handling.
Per-arch thread definition.
k_fatal_error_reason_arch
Definition arch.h:60
@ K_ERR_ARM_BUS_FP_LAZY_STATE_PRESERVATION
Definition arch.h:76
@ K_ERR_ARM_MEM_UNSTACKING
Definition arch.h:64
@ K_ERR_ARM_BACKGROUND_FAULT
Definition arch.h:101
@ K_ERR_ARM_SYNC_PARITY_ERROR_TRANSLATION_TABLE_2ND_LEVEL
Definition arch.h:121
@ K_ERR_ARM_TRANSLATION_FAULT_2ND_LEVEL
Definition arch.h:110
@ K_ERR_ARM_UNSUPPORTED_EXCLUSIVE_ACCESS_FAULT
Definition arch.h:111
@ K_ERR_ARM_SYNC_EXTERNAL_ABORT
Definition arch.h:104
@ K_ERR_ARM_SECURE_LAZY_STATE_PRESERVATION
Definition arch.h:95
@ K_ERR_ARM_SECURE_GENERIC
Definition arch.h:89
@ K_ERR_ARM_MEM_STACKING
Definition arch.h:63
@ K_ERR_ARM_SYNC_PARITY_ERROR
Definition arch.h:106
@ K_ERR_ARM_DOMAIN_FAULT_2ND_LEVEL
Definition arch.h:116
@ K_ERR_ARM_SECURE_ENTRY_POINT
Definition arch.h:90
@ K_ERR_ARM_USAGE_ILLEGAL_EXC_RETURN
Definition arch.h:84
@ K_ERR_ARM_TLB_CONFLICT_ABORT
Definition arch.h:119
@ K_ERR_ARM_USAGE_NO_COPROCESSOR
Definition arch.h:83
@ K_ERR_ARM_SYNC_PARITY_ERROR_TRANSLATION_TABLE_1ST_LEVEL
Definition arch.h:120
@ K_ERR_ARM_SECURE_INTEGRITY_SIGNATURE
Definition arch.h:91
@ K_ERR_ARM_ASYNC_EXTERNAL_ABORT
Definition arch.h:105
@ K_ERR_ARM_ACCESS_FLAG_FAULT_1ST_LEVEL
Definition arch.h:112
@ K_ERR_ARM_MEM_FP_LAZY_STATE_PRESERVATION
Definition arch.h:67
@ K_ERR_ARM_ALIGNMENT_FAULT
Definition arch.h:100
@ K_ERR_ARM_TRANSLATION_FAULT
Definition arch.h:109
@ K_ERR_ARM_USAGE_UNALIGNED_ACCESS
Definition arch.h:81
@ K_ERR_ARM_CACHE_MAINTENANCE_INSTRUCTION_FAULT
Definition arch.h:114
@ K_ERR_ARM_USAGE_ILLEGAL_EPSR
Definition arch.h:85
@ K_ERR_ARM_MEM_INSTRUCTION_ACCESS
Definition arch.h:66
@ K_ERR_ARM_SECURE_EXCEPTION_RETURN
Definition arch.h:92
@ K_ERR_ARM_SYNC_EXTERNAL_ABORT_TRANSLATION_TABLE_1ST_LEVEL
Definition arch.h:117
@ K_ERR_ARM_BUS_UNSTACKING
Definition arch.h:72
@ K_ERR_ARM_MEM_GENERIC
Definition arch.h:62
@ K_ERR_ARM_BUS_STACKING
Definition arch.h:71
@ K_ERR_ARM_PERMISSION_FAULT_2ND_LEVEL
Definition arch.h:103
@ K_ERR_ARM_USAGE_DIV_0
Definition arch.h:80
@ K_ERR_ARM_BUS_GENERIC
Definition arch.h:70
@ K_ERR_ARM_BUS_IMPRECISE_DATA_BUS
Definition arch.h:74
@ K_ERR_ARM_BUS_INSTRUCTION_BUS
Definition arch.h:75
@ K_ERR_ARM_UNDEFINED_INSTRUCTION
Definition arch.h:99
@ K_ERR_ARM_USAGE_UNDEFINED_INSTRUCTION
Definition arch.h:86
@ K_ERR_ARM_ASYNC_PARITY_ERROR
Definition arch.h:107
@ K_ERR_ARM_DEBUG_EVENT
Definition arch.h:108
@ K_ERR_ARM_SECURE_ATTRIBUTION_UNIT
Definition arch.h:93
@ K_ERR_ARM_DOMAIN_FAULT_1ST_LEVEL
Definition arch.h:115
@ K_ERR_ARM_SYNC_EXTERNAL_ABORT_TRANSLATION_TABLE_2ND_LEVEL
Definition arch.h:118
@ K_ERR_ARM_SECURE_TRANSITION
Definition arch.h:94
@ K_ERR_ARM_SECURE_LAZY_STATE_ERROR
Definition arch.h:96
@ K_ERR_ARM_USAGE_STACK_OVERFLOW
Definition arch.h:82
@ K_ERR_ARM_ACCESS_FLAG_FAULT_2ND_LEVEL
Definition arch.h:113
@ K_ERR_ARM_BUS_PRECISE_DATA_BUS
Definition arch.h:73
@ K_ERR_ARM_MEM_DATA_ACCESS
Definition arch.h:65
@ K_ERR_ARM_PERMISSION_FAULT
Definition arch.h:102
@ K_ERR_ARM_USAGE_GENERIC
Definition arch.h:79
ARM AArch32 public exception handling.
ARM AArch32 public kernel miscellaneous.
Devicetree main header.
Fatal base type definitions.
@ K_ERR_ARCH_START
Arch specific fatal errors.
Definition fatal_types.h:41
ARM AArch32 public error handling.
ARM CORTEX-M memory map.
ARM AArch32 NMI routines.