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Zephyr Project API 4.3.99
A Scalable Open Source RTOS
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#include "bflb_clock_common.h"Go to the source code of this file.
Macros | |
| #define | BL70X_CLKID_CLK_ROOT BFLB_CLKID_CLK_ROOT |
| Root Clock. | |
| #define | BL70X_CLKID_CLK_RC32M BFLB_CLKID_CLK_RC32M |
| 32MHz RC Oscillator Clock | |
| #define | BL70X_CLKID_CLK_CRYSTAL BFLB_CLKID_CLK_CRYSTAL |
| Crystal as clock. | |
| #define | BL70X_CLKID_CLK_BCLK BFLB_CLKID_CLK_BCLK |
| Bus Clock. | |
| #define | BL70X_CLKID_CLK_F32K BFLB_CLKID_CLK_F32K |
| F32K Clock. | |
| #define | BL70X_CLKID_CLK_XTAL32K BFLB_CLKID_CLK_XTAL32K |
| XTAL32K Clock. | |
| #define | BL70X_CLKID_CLK_RC32K BFLB_CLKID_CLK_RC32K |
| RC32K Clock. | |
| #define | BL70X_CLKID_CLK_DLL BFLB_CLKID_CLK_PRIVATE |
| DLL clock, the standard root frequency of the DLL is 288MHz. | |
| #define | BL70X_DLL_57MHz 0 |
| ID 0, DLL 57MHz output. | |
| #define | BL70X_DLL_96MHz 1 |
| ID 1, DLL 96MHz output. | |
| #define | BL70X_DLL_144MHz 2 |
| ID 2, DLL 144MHz output. | |
| #define | BL70X_DLL_120MHz 3 |
| ID 3, DLL 120MHz output, Invalid. | |
| #define BL70X_CLKID_CLK_BCLK BFLB_CLKID_CLK_BCLK |
Bus Clock.
| #define BL70X_CLKID_CLK_CRYSTAL BFLB_CLKID_CLK_CRYSTAL |
Crystal as clock.
| #define BL70X_CLKID_CLK_DLL BFLB_CLKID_CLK_PRIVATE |
DLL clock, the standard root frequency of the DLL is 288MHz.
| #define BL70X_CLKID_CLK_F32K BFLB_CLKID_CLK_F32K |
F32K Clock.
| #define BL70X_CLKID_CLK_RC32K BFLB_CLKID_CLK_RC32K |
RC32K Clock.
| #define BL70X_CLKID_CLK_RC32M BFLB_CLKID_CLK_RC32M |
32MHz RC Oscillator Clock
| #define BL70X_CLKID_CLK_ROOT BFLB_CLKID_CLK_ROOT |
Root Clock.
| #define BL70X_CLKID_CLK_XTAL32K BFLB_CLKID_CLK_XTAL32K |
XTAL32K Clock.
| #define BL70X_DLL_120MHz 3 |
ID 3, DLL 120MHz output, Invalid.
| #define BL70X_DLL_144MHz 2 |
ID 2, DLL 144MHz output.
| #define BL70X_DLL_57MHz 0 |
ID 0, DLL 57MHz output.
| #define BL70X_DLL_96MHz 1 |
ID 1, DLL 96MHz output.