8#ifndef ZEPHYR_INCLUDE_CACHE_H_
9#define ZEPHYR_INCLUDE_CACHE_H_
24#if defined(CONFIG_EXTERNAL_CACHE)
27#elif defined(CONFIG_ARCH_CACHE)
30#elif defined(CONFIG_SOC_CACHE)
51#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
64#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
77#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
90#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
105#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
121#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
137#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
153#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
169#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
185#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
211static ALWAYS_INLINE int z_impl_sys_cache_data_flush_range(
void *addr,
size_t size)
213#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
242#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
272static ALWAYS_INLINE int z_impl_sys_cache_data_invd_range(
void *addr,
size_t size)
274#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
304#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
334static ALWAYS_INLINE int z_impl_sys_cache_data_flush_and_invd_range(
void *addr,
size_t size)
336#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
366#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
392#ifdef CONFIG_DCACHE_LINE_SIZE_DETECT
395 __ASSERT(dcache_line_size > 0);
396 __ASSERT(dcache_line_size == CONFIG_DCACHE_LINE_SIZE);
397 return dcache_line_size;
398#elif defined(CONFIG_DCACHE)
399 return CONFIG_DCACHE_LINE_SIZE;
422#ifdef CONFIG_ICACHE_LINE_SIZE_DETECT
425 __ASSERT(icache_line_size > 0);
426 __ASSERT(icache_line_size == CONFIG_ICACHE_LINE_SIZE);
427 return icache_line_size;
428#elif defined(CONFIG_ICACHE)
429 return CONFIG_ICACHE_LINE_SIZE;
450#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS)
474#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS)
503#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS)
506 return (__sparse_force
void __sparse_cache *)ptr;
528#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS)
531 return (__sparse_force
void *)ptr;
536#ifdef CONFIG_LIBMETAL
537static ALWAYS_INLINE void sys_cache_flush(
void *addr,
size_t size)
543#if defined(CONFIG_CACHE_CAN_SAY_MEM_COHERENCE) || defined(__DOXYGEN__)
567#include <zephyr/syscalls/cache.h>
Public APIs for architectural cache controller drivers.
Main header file for external cache controller driver API.
#define cache_uncached_ptr(ptr)
Definition cache.h:351
#define cache_instr_invd_all
Definition cache.h:229
#define cache_cached_ptr(ptr)
Definition cache.h:348
#define cache_instr_disable
Definition cache.h:203
#define cache_is_ptr_uncached(ptr)
Definition cache.h:345
#define cache_instr_flush_all
Definition cache.h:216
#define cache_data_flush_and_invd_range(addr, size)
Definition cache.h:159
#define cache_instr_invd_range(addr, size)
Definition cache.h:289
#define cache_instr_flush_and_invd_all
Definition cache.h:242
#define cache_instr_enable
Definition cache.h:194
#define cache_instr_flush_range(addr, size)
Definition cache.h:265
#define cache_data_invd_range(addr, size)
Definition cache.h:134
#define cache_instr_flush_and_invd_range(addr, size)
Definition cache.h:313
#define cache_data_invd_all
Definition cache.h:74
#define cache_is_mem_coherent(ptr)
Definition cache.h:358
#define cache_is_ptr_cached(ptr)
Definition cache.h:342
#define cache_data_flush_range(addr, size)
Definition cache.h:110
#define cache_data_flush_and_invd_all
Definition cache.h:87
#define cache_data_flush_all
Definition cache.h:61
#define cache_data_enable
Definition cache.h:39
#define cache_instr_line_size_get
Definition cache.h:334
#define cache_data_disable
Definition cache.h:48
#define cache_data_line_size_get
Definition cache.h:179
static ALWAYS_INLINE bool sys_cache_is_ptr_cached(void *ptr)
Test if a pointer is in cached region.
Definition cache.h:448
static ALWAYS_INLINE void * sys_cache_uncached_ptr_get(void *ptr)
Return uncached pointer to a RAM address.
Definition cache.h:526
static ALWAYS_INLINE bool sys_cache_is_mem_coherent(void *ptr)
Detect memory coherence type.
Definition cache.h:561
static ALWAYS_INLINE int sys_cache_data_flush_all(void)
Flush the d-cache.
Definition cache.h:103
static ALWAYS_INLINE int sys_cache_instr_flush_and_invd_all(void)
Flush and Invalidate the i-cache.
Definition cache.h:183
static ALWAYS_INLINE size_t sys_cache_instr_line_size_get(void)
Get the i-cache line size.
Definition cache.h:420
static ALWAYS_INLINE void sys_cache_instr_disable(void)
Disable the i-cache.
Definition cache.h:88
int sys_cache_data_flush_and_invd_range(void *addr, size_t size)
Flush and Invalidate an address range in the d-cache.
int sys_cache_data_invd_range(void *addr, size_t size)
Invalidate an address range in the d-cache.
static ALWAYS_INLINE int sys_cache_instr_flush_range(void *addr, size_t size)
Flush an address range in the i-cache.
Definition cache.h:240
static ALWAYS_INLINE int sys_cache_instr_flush_all(void)
Flush the i-cache.
Definition cache.h:119
static ALWAYS_INLINE size_t sys_cache_data_line_size_get(void)
Get the d-cache line size.
Definition cache.h:390
int sys_cache_data_flush_range(void *addr, size_t size)
Flush an address range in the d-cache.
static ALWAYS_INLINE int sys_cache_instr_flush_and_invd_range(void *addr, size_t size)
Flush and Invalidate an address range in the i-cache.
Definition cache.h:364
static ALWAYS_INLINE void * sys_cache_cached_ptr_get(void *ptr)
Return cached pointer to a RAM address.
Definition cache.h:501
static ALWAYS_INLINE void sys_cache_data_disable(void)
Disable the d-cache.
Definition cache.h:62
static ALWAYS_INLINE int sys_cache_instr_invd_range(void *addr, size_t size)
Invalidate an address range in the i-cache.
Definition cache.h:302
static ALWAYS_INLINE void sys_cache_data_enable(void)
Enable the d-cache.
Definition cache.h:49
static ALWAYS_INLINE void sys_cache_instr_enable(void)
Enable the i-cache.
Definition cache.h:75
static ALWAYS_INLINE int sys_cache_data_invd_all(void)
Invalidate the d-cache.
Definition cache.h:135
static ALWAYS_INLINE bool sys_cache_is_ptr_uncached(void *ptr)
Test if a pointer is in un-cached region.
Definition cache.h:472
static ALWAYS_INLINE int sys_cache_data_flush_and_invd_all(void)
Flush and Invalidate the d-cache.
Definition cache.h:167
static ALWAYS_INLINE int sys_cache_instr_invd_all(void)
Invalidate the i-cache.
Definition cache.h:151
#define ENOTSUP
Unsupported value.
Definition errno.h:115