Macros
#define	IOC_PORTCFG_BASE 0U

#define	IOC_PORTCFG_PFUNC1 1U

#define	IOC_PORTCFG_PFUNC2 2U

#define	IOC_PORTCFG_PFUNC3 3U

#define	IOC_PORTCFG_PFUNC4 4U

#define	IOC_PORTCFG_PFUNC5 5U

#define	IOC_PORTCFG_ANA 6U

#define	IOC_PORTCFG_DTB 7U

#define	DIO0_GPIO0 IOC_PORTCFG_BASE

#define	DIO0_SPI0_CSN IOC_PORTCFG_PFUNC1

#define	DIO0_I2C0_SDA IOC_PORTCFG_PFUNC2

#define	DIO0_T3_C2 IOC_PORTCFG_PFUNC3

#define	DIO0_ADC5 IOC_PORTCFG_ANA

#define	DIO1_GPIO1 IOC_PORTCFG_BASE

#define	DIO1_T3_C1 IOC_PORTCFG_PFUNC1

#define	DIO1_LRFD7 IOC_PORTCFG_PFUNC2

#define	DIO1_T1_F IOC_PORTCFG_PFUNC3

#define	DIO1_UART0_RTS IOC_PORTCFG_PFUNC4

#define	DIO1_ADC4 IOC_PORTCFG_ANA

#define	DIO1_DTB2 IOC_PORTCFG_DTB

#define	DIO2_GPIO2 IOC_PORTCFG_BASE

#define	DIO2_T0_PE IOC_PORTCFG_PFUNC1

#define	DIO2_T2_C1N IOC_PORTCFG_PFUNC2

#define	DIO2_UART0_CTS IOC_PORTCFG_PFUNC3

#define	DIO2_ADC3 IOC_PORTCFG_ANA

#define	DIO3_GPIO3 IOC_PORTCFG_BASE

#define	DIO3_LFCI IOC_PORTCFG_PFUNC1

#define	DIO3_T0_C1N IOC_PORTCFG_PFUNC2

#define	DIO3_LRFD0 IOC_PORTCFG_PFUNC3

#define	DIO3_T3_C1 IOC_PORTCFG_PFUNC4

#define	DIO3_T1_C2 IOC_PORTCFG_PFUNC5

#define	DIO3_LFXT_P IOC_PORTCFG_ANA

#define	DIO3_DTB7 IOC_PORTCFG_DTB

#define	DIO4_GPIO4 IOC_PORTCFG_BASE

#define	DIO4_T0_C2N IOC_PORTCFG_PFUNC1

#define	DIO4_UART0_TXD IOC_PORTCFG_PFUNC2

#define	DIO4_LRFD1 IOC_PORTCFG_PFUNC3

#define	DIO4_SPI0_MOSI IOC_PORTCFG_PFUNC4

#define	DIO4_T0_C2 IOC_PORTCFG_PFUNC5

#define	DIO4_LFXT_N IOC_PORTCFG_ANA

#define	DIO4_DTB8 IOC_PORTCFG_DTB

#define	DIO5_GPIO5 IOC_PORTCFG_BASE

#define	DIO5_T2_C2 IOC_PORTCFG_PFUNC1

#define	DIO5_LRFD6 IOC_PORTCFG_PFUNC3

#define	DIO5_ADC2 IOC_PORTCFG_ANA

#define	DIO6_GPIO6 IOC_PORTCFG_BASE

#define	DIO6_SPI0_CSN IOC_PORTCFG_PFUNC1

#define	DIO6_I2C0_SCL IOC_PORTCFG_PFUNC2

#define	DIO6_T1_C2 IOC_PORTCFG_PFUNC3

#define	DIO6_LRFD2 IOC_PORTCFG_PFUNC4

#define	DIO6_UART0_TXD IOC_PORTCFG_PFUNC5

#define	DIO6_ADC1_AREFP IOC_PORTCFG_ANA

#define	DIO6_DTB6 IOC_PORTCFG_DTB

#define	DIO7_GPIO7 IOC_PORTCFG_BASE

#define	DIO7_T3_C1 IOC_PORTCFG_PFUNC1

#define	DIO7_LRFD4 IOC_PORTCFG_PFUNC3

#define	DIO7_ADC0_AREFM IOC_PORTCFG_ANA

#define	DIO8_GPIO8 IOC_PORTCFG_BASE

#define	DIO8_SPI0_SCLK IOC_PORTCFG_PFUNC1

#define	DIO8_UART0_RTS IOC_PORTCFG_PFUNC2

#define	DIO8_T1_C0N IOC_PORTCFG_PFUNC3

#define	DIO8_I2C0_SDA IOC_PORTCFG_PFUNC4

#define	DIO8_T0_C0N IOC_PORTCFG_PFUNC5

#define	DIO8_DTB3 IOC_PORTCFG_DTB

#define	DIO9_GPIO9 IOC_PORTCFG_BASE

#define	DIO9_T3_C0 IOC_PORTCFG_PFUNC1

#define	DIO9_LRFD3 IOC_PORTCFG_PFUNC3

#define	DIO10_GPIO10 IOC_PORTCFG_BASE

#define	DIO10_LPC0 IOC_PORTCFG_PFUNC1

#define	DIO10_T2_PE IOC_PORTCFG_PFUNC2

#define	DIO10_T3_C0N IOC_PORTCFG_PFUNC3

#define	DIO11_GPIO11 IOC_PORTCFG_BASE

#define	DIO11_SPI0_CSN IOC_PORTCFG_PFUNC1

#define	DIO11_T1_C2N IOC_PORTCFG_PFUNC2

#define	DIO11_T0_C0 IOC_PORTCFG_PFUNC3

#define	DIO11_LRFD0 IOC_PORTCFG_PFUNC4

#define	DIO11_SPI0_MISO IOC_PORTCFG_PFUNC5

#define	DIO11_DTB9 IOC_PORTCFG_DTB

#define	DIO12_GPIO12 IOC_PORTCFG_BASE

#define	DIO12_SPI0_MISO IOC_PORTCFG_PFUNC1

#define	DIO12_SPI0_MOSI IOC_PORTCFG_PFUNC2

#define	DIO12_UART0_RXD IOC_PORTCFG_PFUNC3

#define	DIO12_T1_C1 IOC_PORTCFG_PFUNC4

#define	DIO12_I2C0_SDA IOC_PORTCFG_PFUNC5

#define	DIO12_DTB13 IOC_PORTCFG_DTB

#define	DIO13_GPIO13 IOC_PORTCFG_BASE

#define	DIO13_SPI0_MISO IOC_PORTCFG_PFUNC1

#define	DIO13_SPI0_MOSI IOC_PORTCFG_PFUNC2

#define	DIO13_UART0_TXD IOC_PORTCFG_PFUNC3

#define	DIO13_T0_C0N IOC_PORTCFG_PFUNC4

#define	DIO13_T1_F IOC_PORTCFG_PFUNC5

#define	DIO13_DTB4 IOC_PORTCFG_DTB

#define	DIO14_GPIO14 IOC_PORTCFG_BASE

#define	DIO14_T3_C2 IOC_PORTCFG_PFUNC1

#define	DIO14_T1_C2N IOC_PORTCFG_PFUNC2

#define	DIO14_LRFD5 IOC_PORTCFG_PFUNC3

#define	DIO14_T1_F IOC_PORTCFG_PFUNC4

#define	DIO15_GPIO15 IOC_PORTCFG_BASE

#define	DIO15_UART0_RXD IOC_PORTCFG_PFUNC1

#define	DIO15_T2_C0N IOC_PORTCFG_PFUNC2

#define	DIO15_CKMIN IOC_PORTCFG_PFUNC3

#define	DIO16_GPIO16 IOC_PORTCFG_BASE

#define	DIO16_SPI0_MOSI IOC_PORTCFG_PFUNC1

#define	DIO16_UART0_RXD IOC_PORTCFG_PFUNC2

#define	DIO16_I2C0_SDA IOC_PORTCFG_PFUNC3

#define	DIO16_T1_C2 IOC_PORTCFG_PFUNC4

#define	DIO16_T1_C0N IOC_PORTCFG_PFUNC5

#define	DIO16_DTB10 IOC_PORTCFG_DTB

#define	DIO17_GPIO17 IOC_PORTCFG_BASE

#define	DIO17_SPI0_SCLK IOC_PORTCFG_PFUNC1

#define	DIO17_UART0_TXD IOC_PORTCFG_PFUNC2

#define	DIO17_I2C0_SCL IOC_PORTCFG_PFUNC3

#define	DIO17_T1_C1N IOC_PORTCFG_PFUNC4

#define	DIO17_T0_C2 IOC_PORTCFG_PFUNC5

#define	DIO17_DTB11 IOC_PORTCFG_DTB

#define	DIO18_GPIO18 IOC_PORTCFG_BASE

#define	DIO18_T3_C0 IOC_PORTCFG_PFUNC1

#define	DIO18_LPC0 IOC_PORTCFG_PFUNC2

#define	DIO18_UART0_TXD IOC_PORTCFG_PFUNC3

#define	DIO18_SPI0_SCLK IOC_PORTCFG_PFUNC4

#define	DIO18_DTB12 IOC_PORTCFG_DTB

#define	DIO19_GPIO19 IOC_PORTCFG_BASE

#define	DIO19_T3_C1 IOC_PORTCFG_PFUNC1

#define	DIO19_T2_PE IOC_PORTCFG_PFUNC2

#define	DIO19_SPI0_MOSI IOC_PORTCFG_PFUNC4

#define	DIO19_DTB0 IOC_PORTCFG_DTB

#define	DIO20_GPIO20 IOC_PORTCFG_BASE

#define	DIO20_LPC0 IOC_PORTCFG_PFUNC1

#define	DIO20_UART0_TXD IOC_PORTCFG_PFUNC2

#define	DIO20_UART0_RXD IOC_PORTCFG_PFUNC3

#define	DIO20_T1_C0 IOC_PORTCFG_PFUNC4

#define	DIO20_SPI0_MISO IOC_PORTCFG_PFUNC5

#define	DIO20_ADC11 IOC_PORTCFG_ANA

#define	DIO20_DTB14 IOC_PORTCFG_DTB

#define	DIO21_GPIO21 IOC_PORTCFG_BASE

#define	DIO21_UART0_CTS IOC_PORTCFG_PFUNC1

#define	DIO21_T1_C1N IOC_PORTCFG_PFUNC2

#define	DIO21_T0_C1 IOC_PORTCFG_PFUNC3

#define	DIO21_SPI0_MISO IOC_PORTCFG_PFUNC4

#define	DIO21_LRFD1 IOC_PORTCFG_PFUNC5

#define	DIO21_ADC10_LPCP IOC_PORTCFG_ANA

#define	DIO21_DTB15 IOC_PORTCFG_DTB

#define	DIO22_GPIO22 IOC_PORTCFG_BASE

#define	DIO22_T2_C0 IOC_PORTCFG_PFUNC1

#define	DIO22_UART0_RXD IOC_PORTCFG_PFUNC2

#define	DIO22_T3_C1N IOC_PORTCFG_PFUNC3

#define	DIO22_ADC9 IOC_PORTCFG_ANA

#define	DIO22_DTB1 IOC_PORTCFG_DTB

#define	DIO23_GPIO23 IOC_PORTCFG_BASE

#define	DIO23_T2_C1 IOC_PORTCFG_PFUNC1

#define	DIO23_T3_C2N IOC_PORTCFG_PFUNC3

#define	DIO23_ADC8_LPCP_LPCM IOC_PORTCFG_ANA

#define	DIO24_GPIO24 IOC_PORTCFG_BASE

#define	DIO24_SPI0_SCLK IOC_PORTCFG_PFUNC1

#define	DIO24_T1_C0 IOC_PORTCFG_PFUNC2

#define	DIO24_T3_C0 IOC_PORTCFG_PFUNC3

#define	DIO24_T0_PE IOC_PORTCFG_PFUNC4

#define	DIO24_I2C0_SCL IOC_PORTCFG_PFUNC5

#define	DIO24_ADC7_LPCP_LPCM IOC_PORTCFG_ANA

#define	DIO24_DTB5 IOC_PORTCFG_DTB

#define	DIO25_GPIO25 IOC_PORTCFG_BASE

#define	DIO25_SPI0_MISO IOC_PORTCFG_PFUNC1

#define	DIO25_I2C0_SCL IOC_PORTCFG_PFUNC2

#define	DIO25_T2_C2N IOC_PORTCFG_PFUNC3

#define	DIO25_ADC6 IOC_PORTCFG_ANA

Macro Definition Documentation

◆ DIO0_ADC5

#define DIO0_ADC5 IOC_PORTCFG_ANA

◆ DIO0_GPIO0

#define DIO0_GPIO0 IOC_PORTCFG_BASE

◆ DIO0_I2C0_SDA

#define DIO0_I2C0_SDA IOC_PORTCFG_PFUNC2

◆ DIO0_SPI0_CSN

#define DIO0_SPI0_CSN IOC_PORTCFG_PFUNC1

◆ DIO0_T3_C2

#define DIO0_T3_C2 IOC_PORTCFG_PFUNC3

◆ DIO10_GPIO10

#define DIO10_GPIO10 IOC_PORTCFG_BASE

◆ DIO10_LPC0

#define DIO10_LPC0 IOC_PORTCFG_PFUNC1

◆ DIO10_T2_PE

#define DIO10_T2_PE IOC_PORTCFG_PFUNC2

◆ DIO10_T3_C0N

#define DIO10_T3_C0N IOC_PORTCFG_PFUNC3

◆ DIO11_DTB9

#define DIO11_DTB9 IOC_PORTCFG_DTB

◆ DIO11_GPIO11

#define DIO11_GPIO11 IOC_PORTCFG_BASE

◆ DIO11_LRFD0

#define DIO11_LRFD0 IOC_PORTCFG_PFUNC4

◆ DIO11_SPI0_CSN

#define DIO11_SPI0_CSN IOC_PORTCFG_PFUNC1

◆ DIO11_SPI0_MISO

#define DIO11_SPI0_MISO IOC_PORTCFG_PFUNC5

◆ DIO11_T0_C0

#define DIO11_T0_C0 IOC_PORTCFG_PFUNC3

◆ DIO11_T1_C2N

#define DIO11_T1_C2N IOC_PORTCFG_PFUNC2

◆ DIO12_DTB13

#define DIO12_DTB13 IOC_PORTCFG_DTB

◆ DIO12_GPIO12

#define DIO12_GPIO12 IOC_PORTCFG_BASE

◆ DIO12_I2C0_SDA

#define DIO12_I2C0_SDA IOC_PORTCFG_PFUNC5

◆ DIO12_SPI0_MISO

#define DIO12_SPI0_MISO IOC_PORTCFG_PFUNC1

◆ DIO12_SPI0_MOSI

#define DIO12_SPI0_MOSI IOC_PORTCFG_PFUNC2

◆ DIO12_T1_C1

#define DIO12_T1_C1 IOC_PORTCFG_PFUNC4

◆ DIO12_UART0_RXD

#define DIO12_UART0_RXD IOC_PORTCFG_PFUNC3

◆ DIO13_DTB4

#define DIO13_DTB4 IOC_PORTCFG_DTB

◆ DIO13_GPIO13

#define DIO13_GPIO13 IOC_PORTCFG_BASE

◆ DIO13_SPI0_MISO

#define DIO13_SPI0_MISO IOC_PORTCFG_PFUNC1

◆ DIO13_SPI0_MOSI

#define DIO13_SPI0_MOSI IOC_PORTCFG_PFUNC2

◆ DIO13_T0_C0N

#define DIO13_T0_C0N IOC_PORTCFG_PFUNC4

◆ DIO13_T1_F

#define DIO13_T1_F IOC_PORTCFG_PFUNC5

◆ DIO13_UART0_TXD

#define DIO13_UART0_TXD IOC_PORTCFG_PFUNC3

◆ DIO14_GPIO14

#define DIO14_GPIO14 IOC_PORTCFG_BASE

◆ DIO14_LRFD5

#define DIO14_LRFD5 IOC_PORTCFG_PFUNC3

◆ DIO14_T1_C2N

#define DIO14_T1_C2N IOC_PORTCFG_PFUNC2

◆ DIO14_T1_F

#define DIO14_T1_F IOC_PORTCFG_PFUNC4

◆ DIO14_T3_C2

#define DIO14_T3_C2 IOC_PORTCFG_PFUNC1

◆ DIO15_CKMIN

#define DIO15_CKMIN IOC_PORTCFG_PFUNC3

◆ DIO15_GPIO15

#define DIO15_GPIO15 IOC_PORTCFG_BASE

◆ DIO15_T2_C0N

#define DIO15_T2_C0N IOC_PORTCFG_PFUNC2

◆ DIO15_UART0_RXD

#define DIO15_UART0_RXD IOC_PORTCFG_PFUNC1

◆ DIO16_DTB10

#define DIO16_DTB10 IOC_PORTCFG_DTB

◆ DIO16_GPIO16

#define DIO16_GPIO16 IOC_PORTCFG_BASE

◆ DIO16_I2C0_SDA

#define DIO16_I2C0_SDA IOC_PORTCFG_PFUNC3

◆ DIO16_SPI0_MOSI

#define DIO16_SPI0_MOSI IOC_PORTCFG_PFUNC1

◆ DIO16_T1_C0N

#define DIO16_T1_C0N IOC_PORTCFG_PFUNC5

◆ DIO16_T1_C2

#define DIO16_T1_C2 IOC_PORTCFG_PFUNC4

◆ DIO16_UART0_RXD

#define DIO16_UART0_RXD IOC_PORTCFG_PFUNC2

◆ DIO17_DTB11

#define DIO17_DTB11 IOC_PORTCFG_DTB

◆ DIO17_GPIO17

#define DIO17_GPIO17 IOC_PORTCFG_BASE

◆ DIO17_I2C0_SCL

#define DIO17_I2C0_SCL IOC_PORTCFG_PFUNC3

◆ DIO17_SPI0_SCLK

#define DIO17_SPI0_SCLK IOC_PORTCFG_PFUNC1

◆ DIO17_T0_C2

#define DIO17_T0_C2 IOC_PORTCFG_PFUNC5

◆ DIO17_T1_C1N

#define DIO17_T1_C1N IOC_PORTCFG_PFUNC4

◆ DIO17_UART0_TXD

#define DIO17_UART0_TXD IOC_PORTCFG_PFUNC2

◆ DIO18_DTB12

#define DIO18_DTB12 IOC_PORTCFG_DTB

◆ DIO18_GPIO18

#define DIO18_GPIO18 IOC_PORTCFG_BASE

◆ DIO18_LPC0

#define DIO18_LPC0 IOC_PORTCFG_PFUNC2

◆ DIO18_SPI0_SCLK

#define DIO18_SPI0_SCLK IOC_PORTCFG_PFUNC4

◆ DIO18_T3_C0

#define DIO18_T3_C0 IOC_PORTCFG_PFUNC1

◆ DIO18_UART0_TXD

#define DIO18_UART0_TXD IOC_PORTCFG_PFUNC3

◆ DIO19_DTB0

#define DIO19_DTB0 IOC_PORTCFG_DTB

◆ DIO19_GPIO19

#define DIO19_GPIO19 IOC_PORTCFG_BASE

◆ DIO19_SPI0_MOSI

#define DIO19_SPI0_MOSI IOC_PORTCFG_PFUNC4

◆ DIO19_T2_PE

#define DIO19_T2_PE IOC_PORTCFG_PFUNC2

◆ DIO19_T3_C1

#define DIO19_T3_C1 IOC_PORTCFG_PFUNC1

◆ DIO1_ADC4

#define DIO1_ADC4 IOC_PORTCFG_ANA

◆ DIO1_DTB2

#define DIO1_DTB2 IOC_PORTCFG_DTB

◆ DIO1_GPIO1

#define DIO1_GPIO1 IOC_PORTCFG_BASE

◆ DIO1_LRFD7

#define DIO1_LRFD7 IOC_PORTCFG_PFUNC2

◆ DIO1_T1_F

#define DIO1_T1_F IOC_PORTCFG_PFUNC3

◆ DIO1_T3_C1

#define DIO1_T3_C1 IOC_PORTCFG_PFUNC1

◆ DIO1_UART0_RTS

#define DIO1_UART0_RTS IOC_PORTCFG_PFUNC4

◆ DIO20_ADC11

#define DIO20_ADC11 IOC_PORTCFG_ANA

◆ DIO20_DTB14

#define DIO20_DTB14 IOC_PORTCFG_DTB

◆ DIO20_GPIO20

#define DIO20_GPIO20 IOC_PORTCFG_BASE

◆ DIO20_LPC0

#define DIO20_LPC0 IOC_PORTCFG_PFUNC1

◆ DIO20_SPI0_MISO

#define DIO20_SPI0_MISO IOC_PORTCFG_PFUNC5

◆ DIO20_T1_C0

#define DIO20_T1_C0 IOC_PORTCFG_PFUNC4

◆ DIO20_UART0_RXD

#define DIO20_UART0_RXD IOC_PORTCFG_PFUNC3

◆ DIO20_UART0_TXD

#define DIO20_UART0_TXD IOC_PORTCFG_PFUNC2

◆ DIO21_ADC10_LPCP

#define DIO21_ADC10_LPCP IOC_PORTCFG_ANA

◆ DIO21_DTB15

#define DIO21_DTB15 IOC_PORTCFG_DTB

◆ DIO21_GPIO21

#define DIO21_GPIO21 IOC_PORTCFG_BASE

◆ DIO21_LRFD1

#define DIO21_LRFD1 IOC_PORTCFG_PFUNC5

◆ DIO21_SPI0_MISO

#define DIO21_SPI0_MISO IOC_PORTCFG_PFUNC4

◆ DIO21_T0_C1

#define DIO21_T0_C1 IOC_PORTCFG_PFUNC3

◆ DIO21_T1_C1N

#define DIO21_T1_C1N IOC_PORTCFG_PFUNC2

◆ DIO21_UART0_CTS

#define DIO21_UART0_CTS IOC_PORTCFG_PFUNC1

◆ DIO22_ADC9

#define DIO22_ADC9 IOC_PORTCFG_ANA

◆ DIO22_DTB1

#define DIO22_DTB1 IOC_PORTCFG_DTB

◆ DIO22_GPIO22

#define DIO22_GPIO22 IOC_PORTCFG_BASE

◆ DIO22_T2_C0

#define DIO22_T2_C0 IOC_PORTCFG_PFUNC1

◆ DIO22_T3_C1N

#define DIO22_T3_C1N IOC_PORTCFG_PFUNC3

◆ DIO22_UART0_RXD

#define DIO22_UART0_RXD IOC_PORTCFG_PFUNC2

◆ DIO23_ADC8_LPCP_LPCM

#define DIO23_ADC8_LPCP_LPCM IOC_PORTCFG_ANA

◆ DIO23_GPIO23

#define DIO23_GPIO23 IOC_PORTCFG_BASE

◆ DIO23_T2_C1

#define DIO23_T2_C1 IOC_PORTCFG_PFUNC1

◆ DIO23_T3_C2N

#define DIO23_T3_C2N IOC_PORTCFG_PFUNC3

◆ DIO24_ADC7_LPCP_LPCM

#define DIO24_ADC7_LPCP_LPCM IOC_PORTCFG_ANA

◆ DIO24_DTB5

#define DIO24_DTB5 IOC_PORTCFG_DTB

◆ DIO24_GPIO24

#define DIO24_GPIO24 IOC_PORTCFG_BASE

◆ DIO24_I2C0_SCL

#define DIO24_I2C0_SCL IOC_PORTCFG_PFUNC5

◆ DIO24_SPI0_SCLK

#define DIO24_SPI0_SCLK IOC_PORTCFG_PFUNC1

◆ DIO24_T0_PE

#define DIO24_T0_PE IOC_PORTCFG_PFUNC4

◆ DIO24_T1_C0

#define DIO24_T1_C0 IOC_PORTCFG_PFUNC2

◆ DIO24_T3_C0

#define DIO24_T3_C0 IOC_PORTCFG_PFUNC3

◆ DIO25_ADC6

#define DIO25_ADC6 IOC_PORTCFG_ANA

◆ DIO25_GPIO25

#define DIO25_GPIO25 IOC_PORTCFG_BASE

◆ DIO25_I2C0_SCL

#define DIO25_I2C0_SCL IOC_PORTCFG_PFUNC2

◆ DIO25_SPI0_MISO

#define DIO25_SPI0_MISO IOC_PORTCFG_PFUNC1

◆ DIO25_T2_C2N

#define DIO25_T2_C2N IOC_PORTCFG_PFUNC3

◆ DIO2_ADC3

#define DIO2_ADC3 IOC_PORTCFG_ANA

◆ DIO2_GPIO2

#define DIO2_GPIO2 IOC_PORTCFG_BASE

◆ DIO2_T0_PE

#define DIO2_T0_PE IOC_PORTCFG_PFUNC1

◆ DIO2_T2_C1N

#define DIO2_T2_C1N IOC_PORTCFG_PFUNC2

◆ DIO2_UART0_CTS

#define DIO2_UART0_CTS IOC_PORTCFG_PFUNC3

◆ DIO3_DTB7

#define DIO3_DTB7 IOC_PORTCFG_DTB

◆ DIO3_GPIO3

#define DIO3_GPIO3 IOC_PORTCFG_BASE

◆ DIO3_LFCI

#define DIO3_LFCI IOC_PORTCFG_PFUNC1

◆ DIO3_LFXT_P

#define DIO3_LFXT_P IOC_PORTCFG_ANA

◆ DIO3_LRFD0

#define DIO3_LRFD0 IOC_PORTCFG_PFUNC3

◆ DIO3_T0_C1N

#define DIO3_T0_C1N IOC_PORTCFG_PFUNC2

◆ DIO3_T1_C2

#define DIO3_T1_C2 IOC_PORTCFG_PFUNC5

◆ DIO3_T3_C1

#define DIO3_T3_C1 IOC_PORTCFG_PFUNC4

◆ DIO4_DTB8

#define DIO4_DTB8 IOC_PORTCFG_DTB

◆ DIO4_GPIO4

#define DIO4_GPIO4 IOC_PORTCFG_BASE

◆ DIO4_LFXT_N

#define DIO4_LFXT_N IOC_PORTCFG_ANA

◆ DIO4_LRFD1

#define DIO4_LRFD1 IOC_PORTCFG_PFUNC3

◆ DIO4_SPI0_MOSI

#define DIO4_SPI0_MOSI IOC_PORTCFG_PFUNC4

◆ DIO4_T0_C2

#define DIO4_T0_C2 IOC_PORTCFG_PFUNC5

◆ DIO4_T0_C2N

#define DIO4_T0_C2N IOC_PORTCFG_PFUNC1

◆ DIO4_UART0_TXD

#define DIO4_UART0_TXD IOC_PORTCFG_PFUNC2

◆ DIO5_ADC2

#define DIO5_ADC2 IOC_PORTCFG_ANA

◆ DIO5_GPIO5

#define DIO5_GPIO5 IOC_PORTCFG_BASE

◆ DIO5_LRFD6

#define DIO5_LRFD6 IOC_PORTCFG_PFUNC3

◆ DIO5_T2_C2

#define DIO5_T2_C2 IOC_PORTCFG_PFUNC1

◆ DIO6_ADC1_AREFP

#define DIO6_ADC1_AREFP IOC_PORTCFG_ANA

◆ DIO6_DTB6

#define DIO6_DTB6 IOC_PORTCFG_DTB

◆ DIO6_GPIO6

#define DIO6_GPIO6 IOC_PORTCFG_BASE

◆ DIO6_I2C0_SCL

#define DIO6_I2C0_SCL IOC_PORTCFG_PFUNC2

◆ DIO6_LRFD2

#define DIO6_LRFD2 IOC_PORTCFG_PFUNC4

◆ DIO6_SPI0_CSN

#define DIO6_SPI0_CSN IOC_PORTCFG_PFUNC1

◆ DIO6_T1_C2

#define DIO6_T1_C2 IOC_PORTCFG_PFUNC3

◆ DIO6_UART0_TXD

#define DIO6_UART0_TXD IOC_PORTCFG_PFUNC5

◆ DIO7_ADC0_AREFM

#define DIO7_ADC0_AREFM IOC_PORTCFG_ANA

◆ DIO7_GPIO7

#define DIO7_GPIO7 IOC_PORTCFG_BASE

◆ DIO7_LRFD4

#define DIO7_LRFD4 IOC_PORTCFG_PFUNC3

◆ DIO7_T3_C1

#define DIO7_T3_C1 IOC_PORTCFG_PFUNC1

◆ DIO8_DTB3

#define DIO8_DTB3 IOC_PORTCFG_DTB

◆ DIO8_GPIO8

#define DIO8_GPIO8 IOC_PORTCFG_BASE

◆ DIO8_I2C0_SDA

#define DIO8_I2C0_SDA IOC_PORTCFG_PFUNC4

◆ DIO8_SPI0_SCLK

#define DIO8_SPI0_SCLK IOC_PORTCFG_PFUNC1

◆ DIO8_T0_C0N

#define DIO8_T0_C0N IOC_PORTCFG_PFUNC5

◆ DIO8_T1_C0N

#define DIO8_T1_C0N IOC_PORTCFG_PFUNC3

◆ DIO8_UART0_RTS

#define DIO8_UART0_RTS IOC_PORTCFG_PFUNC2

◆ DIO9_GPIO9

#define DIO9_GPIO9 IOC_PORTCFG_BASE

◆ DIO9_LRFD3

#define DIO9_LRFD3 IOC_PORTCFG_PFUNC3

◆ DIO9_T3_C0

#define DIO9_T3_C0 IOC_PORTCFG_PFUNC1

◆ IOC_PORTCFG_ANA

#define IOC_PORTCFG_ANA 6U

◆ IOC_PORTCFG_BASE

#define IOC_PORTCFG_BASE 0U

◆ IOC_PORTCFG_DTB

#define IOC_PORTCFG_DTB 7U

◆ IOC_PORTCFG_PFUNC1

#define IOC_PORTCFG_PFUNC1 1U

◆ IOC_PORTCFG_PFUNC2

#define IOC_PORTCFG_PFUNC2 2U

◆ IOC_PORTCFG_PFUNC3

#define IOC_PORTCFG_PFUNC3 3U

◆ IOC_PORTCFG_PFUNC4

#define IOC_PORTCFG_PFUNC4 4U

◆ IOC_PORTCFG_PFUNC5

#define IOC_PORTCFG_PFUNC5 5U

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