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| #define | CH32V20X_V30X_AHB_PCENR_OFFSET   0 | 
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| #define | CH32V20X_V30X_APB2_PCENR_OFFSET   1 | 
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| #define | CH32V20X_V30X_APB1_PCENR_OFFSET   2 | 
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| #define | CH32V20X_V30X_CLOCK_CONFIG(bus,  bit)   (((CH32V20X_V30X_##bus##_PCENR_OFFSET) << 5) | (bit)) | 
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| #define | CH32V20X_V30X_CLOCK_DMA1   CH32V20X_V30X_CLOCK_CONFIG(AHB, 0) | 
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| #define | CH32V20X_V30X_CLOCK_DMA2   CH32V20X_V30X_CLOCK_CONFIG(AHB, 1) | 
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| #define | CH32V20X_V30X_CLOCK_SRAM   CH32V20X_V30X_CLOCK_CONFIG(AHB, 2) | 
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| #define | CH32V20X_V30X_CLOCK_FLITF   CH32V20X_V30X_CLOCK_CONFIG(AHB, 4) | 
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| #define | CH32V20X_V30X_CLOCK_CRC   CH32V20X_V30X_CLOCK_CONFIG(AHB, 6) | 
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| #define | CH32V20X_V30X_CLOCK_FSMC   CH32V20X_V30X_CLOCK_CONFIG(AHB, 8) | 
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| #define | CH32V20X_V30X_CLOCK_RNG   CH32V20X_V30X_CLOCK_CONFIG(AHB, 9) | 
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| #define | CH32V20X_V30X_CLOCK_SDIO   CH32V20X_V30X_CLOCK_CONFIG(AHB, 10) | 
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| #define | CH32V20X_V30X_CLOCK_USBHS   CH32V20X_V30X_CLOCK_CONFIG(AHB, 11) | 
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| #define | CH32V20X_V30X_CLOCK_OTG_FS   CH32V20X_V30X_CLOCK_CONFIG(AHB, 12) | 
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| #define | CH32V20X_V30X_CLOCK_DVP   CH32V20X_V30X_CLOCK_CONFIG(AHB, 13) | 
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| #define | CH32V20X_V30X_CLOCK_ETHMAC   CH32V20X_V30X_CLOCK_CONFIG(AHB, 14) | 
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| #define | CH32V20X_V30X_CLOCK_ETHMACTX   CH32V20X_V30X_CLOCK_CONFIG(AHB, 15) | 
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| #define | CH32V20X_V30X_CLOCK_ETHMACRX   CH32V20X_V30X_CLOCK_CONFIG(AHB, 16) | 
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| #define | CH32V20X_V30X_CLOCK_BLEC   CH32V20X_V30X_CLOCK_CONFIG(AHB, 16) | 
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| #define | CH32V20X_V30X_CLOCK_BLES   CH32V20X_V30X_CLOCK_CONFIG(AHB, 17) | 
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| #define | CH32V20X_V30X_CLOCK_AFIO   CH32V20X_V30X_CLOCK_CONFIG(APB2, 0) | 
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| #define | CH32V20X_V30X_CLOCK_IOPA   CH32V20X_V30X_CLOCK_CONFIG(APB2, 2) | 
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| #define | CH32V20X_V30X_CLOCK_IOPB   CH32V20X_V30X_CLOCK_CONFIG(APB2, 3) | 
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| #define | CH32V20X_V30X_CLOCK_IOPC   CH32V20X_V30X_CLOCK_CONFIG(APB2, 4) | 
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| #define | CH32V20X_V30X_CLOCK_IOPD   CH32V20X_V30X_CLOCK_CONFIG(APB2, 5) | 
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| #define | CH32V20X_V30X_CLOCK_IOPE   CH32V20X_V30X_CLOCK_CONFIG(APB2, 6) | 
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| #define | CH32V20X_V30X_CLOCK_ADC1   CH32V20X_V30X_CLOCK_CONFIG(APB2, 9) | 
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| #define | CH32V20X_V30X_CLOCK_ADC2   CH32V20X_V30X_CLOCK_CONFIG(APB2, 10) | 
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| #define | CH32V20X_V30X_CLOCK_TIM1   CH32V20X_V30X_CLOCK_CONFIG(APB2, 11) | 
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| #define | CH32V20X_V30X_CLOCK_SPI1   CH32V20X_V30X_CLOCK_CONFIG(APB2, 12) | 
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| #define | CH32V20X_V30X_CLOCK_TIM8   CH32V20X_V30X_CLOCK_CONFIG(APB2, 13) | 
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| #define | CH32V20X_V30X_CLOCK_USART1   CH32V20X_V30X_CLOCK_CONFIG(APB2, 14) | 
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| #define | CH32V20X_V30X_CLOCK_TIM9   CH32V20X_V30X_CLOCK_CONFIG(APB2, 19) | 
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| #define | CH32V20X_V30X_CLOCK_TIM10   CH32V20X_V30X_CLOCK_CONFIG(APB2, 20) | 
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| #define | CH32V20X_V30X_CLOCK_TIM2   CH32V20X_V30X_CLOCK_CONFIG(APB1, 0) | 
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| #define | CH32V20X_V30X_CLOCK_TIM3   CH32V20X_V30X_CLOCK_CONFIG(APB1, 1) | 
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| #define | CH32V20X_V30X_CLOCK_TIM4   CH32V20X_V30X_CLOCK_CONFIG(APB1, 2) | 
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| #define | CH32V20X_V30X_CLOCK_TIM5   CH32V20X_V30X_CLOCK_CONFIG(APB1, 3) | 
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| #define | CH32V20X_V30X_CLOCK_TIM6   CH32V20X_V30X_CLOCK_CONFIG(APB1, 4) | 
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| #define | CH32V20X_V30X_CLOCK_TIM7   CH32V20X_V30X_CLOCK_CONFIG(APB1, 5) | 
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| #define | CH32V20X_V30X_CLOCK_USART6   CH32V20X_V30X_CLOCK_CONFIG(APB1, 6) | 
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| #define | CH32V20X_V30X_CLOCK_USART7   CH32V20X_V30X_CLOCK_CONFIG(APB1, 7) | 
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| #define | CH32V20X_V30X_CLOCK_USART8   CH32V20X_V30X_CLOCK_CONFIG(APB1, 8) | 
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| #define | CH32V20X_V30X_CLOCK_WWDG   CH32V20X_V30X_CLOCK_CONFIG(APB1, 11) | 
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| #define | CH32V20X_V30X_CLOCK_SPI2   CH32V20X_V30X_CLOCK_CONFIG(APB1, 14) | 
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| #define | CH32V20X_V30X_CLOCK_SPI3   CH32V20X_V30X_CLOCK_CONFIG(APB1, 15) | 
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| #define | CH32V20X_V30X_CLOCK_USART2   CH32V20X_V30X_CLOCK_CONFIG(APB1, 17) | 
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| #define | CH32V20X_V30X_CLOCK_USART3   CH32V20X_V30X_CLOCK_CONFIG(APB1, 18) | 
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| #define | CH32V20X_V30X_CLOCK_USART4   CH32V20X_V30X_CLOCK_CONFIG(APB1, 19) | 
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| #define | CH32V20X_V30X_CLOCK_USART5   CH32V20X_V30X_CLOCK_CONFIG(APB1, 20) | 
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| #define | CH32V20X_V30X_CLOCK_I2C1   CH32V20X_V30X_CLOCK_CONFIG(APB1, 21) | 
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| #define | CH32V20X_V30X_CLOCK_I2C2   CH32V20X_V30X_CLOCK_CONFIG(APB1, 22) | 
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| #define | CH32V20X_V30X_CLOCK_USBD   CH32V20X_V30X_CLOCK_CONFIG(APB1, 23) | 
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| #define | CH32V20X_V30X_CLOCK_CAN1   CH32V20X_V30X_CLOCK_CONFIG(APB1, 25) | 
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| #define | CH32V20X_V30X_CLOCK_CAN2   CH32V20X_V30X_CLOCK_CONFIG(APB1, 26) | 
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| #define | CH32V20X_V30X_CLOCK_BKP   CH32V20X_V30X_CLOCK_CONFIG(APB1, 27) | 
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| #define | CH32V20X_V30X_CLOCK_PWR   CH32V20X_V30X_CLOCK_CONFIG(APB1, 28) | 
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| #define | CH32V20X_V30X_CLOCK_DAC   CH32V20X_V30X_CLOCK_CONFIG(APB1, 29) | 
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