ARC Cluster registers and accessors. More...

#include <zephyr/arch/arc/v2/aux_regs.h>
#include <zephyr/sys/util_macro.h>

Macros
#define	ARC_CLN_MST_NOC_0_BCR 0

#define	ARC_CLN_MST_NOC_1_BCR 1

#define	ARC_CLN_MST_NOC_2_BCR 2

#define	ARC_CLN_MST_NOC_3_BCR 3

#define	ARC_CLN_MST_PER_0_BCR 16

#define	ARC_CLN_MST_PER_1_BCR 17

#define	ARC_CLN_PER_0_BASE 2688

#define	ARC_CLN_PER_0_SIZE 2689

#define	ARC_CLN_PER_1_BASE 2690

#define	ARC_CLN_PER_1_SIZE 2691

#define	ARC_CLN_SCM_BCR_0 100

#define	ARC_CLN_SCM_BCR_1 101

#define	ARC_CLN_MST_NOC_0_0_ADDR 292

#define	ARC_CLN_MST_NOC_0_0_SIZE 293

#define	ARC_CLN_MST_NOC_0_1_ADDR 2560

#define	ARC_CLN_MST_NOC_0_1_SIZE 2561

#define	ARC_CLN_MST_NOC_0_2_ADDR 2562

#define	ARC_CLN_MST_NOC_0_2_SIZE 2563

#define	ARC_CLN_MST_NOC_0_3_ADDR 2564

#define	ARC_CLN_MST_NOC_0_3_SIZE 2565

#define	ARC_CLN_MST_NOC_0_4_ADDR 2566

#define	ARC_CLN_MST_NOC_0_4_SIZE 2567

#define	ARC_CLN_PER0_BASE 2688

#define	ARC_CLN_PER0_SIZE 2689

#define	ARC_CLN_SHMEM_ADDR 200

#define	ARC_CLN_SHMEM_SIZE 201

#define	ARC_CLN_CACHE_ADDR_LO0 204

#define	ARC_CLN_CACHE_ADDR_LO1 205

#define	ARC_CLN_CACHE_ADDR_HI0 206

#define	ARC_CLN_CACHE_ADDR_HI1 207

#define	ARC_CLN_CACHE_CMD 207

#define	ARC_CLN_CACHE_CMD_OP_NOP 0b0000

#define	ARC_CLN_CACHE_CMD_OP_LOOKUP 0b0001

#define	ARC_CLN_CACHE_CMD_OP_PROBE 0b0010

#define	ARC_CLN_CACHE_CMD_OP_IDX_INV 0b0101

#define	ARC_CLN_CACHE_CMD_OP_IDX_CLN 0b0110

#define	ARC_CLN_CACHE_CMD_OP_IDX_CLN_INV 0b0111

#define	ARC_CLN_CACHE_CMD_OP_REG_INV 0b1001

#define	ARC_CLN_CACHE_CMD_OP_REG_CLN 0b1010

#define	ARC_CLN_CACHE_CMD_OP_REG_CLN_INV 0b1011

#define	ARC_CLN_CACHE_CMD_OP_ADDR_INV 0b1101

#define	ARC_CLN_CACHE_CMD_OP_ADDR_CLN 0b1110

#define	ARC_CLN_CACHE_CMD_OP_ADDR_CLN_INV 0b1111

#define	ARC_CLN_CACHE_CMD_INCR BIT(4)

#define	ARC_CLN_CACHE_STATUS 209

#define	ARC_CLN_CACHE_STATUS_BUSY BIT(23)

#define	ARC_CLN_CACHE_STATUS_DONE BIT(24)

#define	ARC_CLN_CACHE_STATUS_MASK BIT(26)

#define	ARC_CLN_CACHE_STATUS_EN BIT(27)

#define	ARC_CLN_CACHE_ERR 210

#define	ARC_CLN_CACHE_ERR_ADDR0 211

#define	ARC_CLN_CACHE_ERR_ADDR1 212

Functions
static unsigned int	arc_cln_read_reg_nolock (unsigned int reg)

static void	arc_cln_write_reg_nolock (unsigned int reg, unsigned int data)

Detailed Description

ARC Cluster registers and accessors.

Macro Definition Documentation

◆ ARC_CLN_CACHE_ADDR_HI0

#define ARC_CLN_CACHE_ADDR_HI0 206

◆ ARC_CLN_CACHE_ADDR_HI1

#define ARC_CLN_CACHE_ADDR_HI1 207

◆ ARC_CLN_CACHE_ADDR_LO0

#define ARC_CLN_CACHE_ADDR_LO0 204

◆ ARC_CLN_CACHE_ADDR_LO1

#define ARC_CLN_CACHE_ADDR_LO1 205

◆ ARC_CLN_CACHE_CMD

#define ARC_CLN_CACHE_CMD 207

◆ ARC_CLN_CACHE_CMD_INCR

#define ARC_CLN_CACHE_CMD_INCR BIT(4)

◆ ARC_CLN_CACHE_CMD_OP_ADDR_CLN

#define ARC_CLN_CACHE_CMD_OP_ADDR_CLN 0b1110

◆ ARC_CLN_CACHE_CMD_OP_ADDR_CLN_INV

#define ARC_CLN_CACHE_CMD_OP_ADDR_CLN_INV 0b1111

◆ ARC_CLN_CACHE_CMD_OP_ADDR_INV

#define ARC_CLN_CACHE_CMD_OP_ADDR_INV 0b1101

◆ ARC_CLN_CACHE_CMD_OP_IDX_CLN

#define ARC_CLN_CACHE_CMD_OP_IDX_CLN 0b0110

◆ ARC_CLN_CACHE_CMD_OP_IDX_CLN_INV

#define ARC_CLN_CACHE_CMD_OP_IDX_CLN_INV 0b0111

◆ ARC_CLN_CACHE_CMD_OP_IDX_INV

#define ARC_CLN_CACHE_CMD_OP_IDX_INV 0b0101

◆ ARC_CLN_CACHE_CMD_OP_LOOKUP

#define ARC_CLN_CACHE_CMD_OP_LOOKUP 0b0001

◆ ARC_CLN_CACHE_CMD_OP_NOP

#define ARC_CLN_CACHE_CMD_OP_NOP 0b0000

◆ ARC_CLN_CACHE_CMD_OP_PROBE

#define ARC_CLN_CACHE_CMD_OP_PROBE 0b0010

◆ ARC_CLN_CACHE_CMD_OP_REG_CLN

#define ARC_CLN_CACHE_CMD_OP_REG_CLN 0b1010

◆ ARC_CLN_CACHE_CMD_OP_REG_CLN_INV

#define ARC_CLN_CACHE_CMD_OP_REG_CLN_INV 0b1011

◆ ARC_CLN_CACHE_CMD_OP_REG_INV

#define ARC_CLN_CACHE_CMD_OP_REG_INV 0b1001

◆ ARC_CLN_CACHE_ERR

#define ARC_CLN_CACHE_ERR 210

◆ ARC_CLN_CACHE_ERR_ADDR0

#define ARC_CLN_CACHE_ERR_ADDR0 211

◆ ARC_CLN_CACHE_ERR_ADDR1

#define ARC_CLN_CACHE_ERR_ADDR1 212

◆ ARC_CLN_CACHE_STATUS

#define ARC_CLN_CACHE_STATUS 209

◆ ARC_CLN_CACHE_STATUS_BUSY

#define ARC_CLN_CACHE_STATUS_BUSY BIT(23)

◆ ARC_CLN_CACHE_STATUS_DONE

#define ARC_CLN_CACHE_STATUS_DONE BIT(24)

◆ ARC_CLN_CACHE_STATUS_EN

#define ARC_CLN_CACHE_STATUS_EN BIT(27)

◆ ARC_CLN_CACHE_STATUS_MASK

#define ARC_CLN_CACHE_STATUS_MASK BIT(26)

◆ ARC_CLN_MST_NOC_0_0_ADDR

#define ARC_CLN_MST_NOC_0_0_ADDR 292

◆ ARC_CLN_MST_NOC_0_0_SIZE

#define ARC_CLN_MST_NOC_0_0_SIZE 293

◆ ARC_CLN_MST_NOC_0_1_ADDR

#define ARC_CLN_MST_NOC_0_1_ADDR 2560

◆ ARC_CLN_MST_NOC_0_1_SIZE

#define ARC_CLN_MST_NOC_0_1_SIZE 2561

◆ ARC_CLN_MST_NOC_0_2_ADDR

#define ARC_CLN_MST_NOC_0_2_ADDR 2562

◆ ARC_CLN_MST_NOC_0_2_SIZE

#define ARC_CLN_MST_NOC_0_2_SIZE 2563

◆ ARC_CLN_MST_NOC_0_3_ADDR

#define ARC_CLN_MST_NOC_0_3_ADDR 2564

◆ ARC_CLN_MST_NOC_0_3_SIZE

#define ARC_CLN_MST_NOC_0_3_SIZE 2565

◆ ARC_CLN_MST_NOC_0_4_ADDR

#define ARC_CLN_MST_NOC_0_4_ADDR 2566

◆ ARC_CLN_MST_NOC_0_4_SIZE

#define ARC_CLN_MST_NOC_0_4_SIZE 2567

◆ ARC_CLN_MST_NOC_0_BCR

#define ARC_CLN_MST_NOC_0_BCR 0

◆ ARC_CLN_MST_NOC_1_BCR

#define ARC_CLN_MST_NOC_1_BCR 1

◆ ARC_CLN_MST_NOC_2_BCR

#define ARC_CLN_MST_NOC_2_BCR 2

◆ ARC_CLN_MST_NOC_3_BCR

#define ARC_CLN_MST_NOC_3_BCR 3

◆ ARC_CLN_MST_PER_0_BCR

#define ARC_CLN_MST_PER_0_BCR 16

◆ ARC_CLN_MST_PER_1_BCR

#define ARC_CLN_MST_PER_1_BCR 17

◆ ARC_CLN_PER0_BASE

#define ARC_CLN_PER0_BASE 2688

◆ ARC_CLN_PER0_SIZE

#define ARC_CLN_PER0_SIZE 2689

◆ ARC_CLN_PER_0_BASE

#define ARC_CLN_PER_0_BASE 2688

◆ ARC_CLN_PER_0_SIZE

#define ARC_CLN_PER_0_SIZE 2689

◆ ARC_CLN_PER_1_BASE

#define ARC_CLN_PER_1_BASE 2690

◆ ARC_CLN_PER_1_SIZE

#define ARC_CLN_PER_1_SIZE 2691

◆ ARC_CLN_SCM_BCR_0

#define ARC_CLN_SCM_BCR_0 100

◆ ARC_CLN_SCM_BCR_1

#define ARC_CLN_SCM_BCR_1 101

◆ ARC_CLN_SHMEM_ADDR

#define ARC_CLN_SHMEM_ADDR 200

◆ ARC_CLN_SHMEM_SIZE

#define ARC_CLN_SHMEM_SIZE 201

Function Documentation

◆ arc_cln_read_reg_nolock()

static unsigned int arc_cln_read_reg_nolock ( unsigned int reg )

inlinestatic

◆ arc_cln_write_reg_nolock()

static void arc_cln_write_reg_nolock	(	unsigned int	reg,
		unsigned int	data
	)