I2S (Inter-IC Sound) Interface. More...

Data Structures
struct	i2s_config
	Interface configuration options. More...

Macros
#define	I2S_FMT_DATA_FORMAT_SHIFT 0
	Data Format bit field position.

#define	I2S_FMT_DATA_FORMAT_MASK (0x7 << I2S_FMT_DATA_FORMAT_SHIFT)
	Data Format bit field mask.

#define	I2S_FMT_DATA_FORMAT_I2S (0 << I2S_FMT_DATA_FORMAT_SHIFT)
	Standard I2S Data Format.

#define	I2S_FMT_DATA_FORMAT_PCM_SHORT (1 << I2S_FMT_DATA_FORMAT_SHIFT)
	PCM Short Frame Sync Data Format.

#define	I2S_FMT_DATA_FORMAT_PCM_LONG (2 << I2S_FMT_DATA_FORMAT_SHIFT)
	PCM Long Frame Sync Data Format.

#define	I2S_FMT_DATA_FORMAT_LEFT_JUSTIFIED (3 << I2S_FMT_DATA_FORMAT_SHIFT)
	Left Justified Data Format.

#define	I2S_FMT_DATA_FORMAT_RIGHT_JUSTIFIED (4 << I2S_FMT_DATA_FORMAT_SHIFT)
	Right Justified Data Format.

#define	I2S_FMT_DATA_ORDER_MSB (0 << 3)
	Send MSB first.

#define	I2S_FMT_DATA_ORDER_LSB BIT(3)
	Send LSB first.

#define	I2S_FMT_DATA_ORDER_INV I2S_FMT_DATA_ORDER_LSB
	Invert bit ordering, send LSB first.

#define	I2S_FMT_CLK_FORMAT_SHIFT 4
	Data Format bit field position.

#define	I2S_FMT_CLK_FORMAT_MASK (0x3 << I2S_FMT_CLK_FORMAT_SHIFT)
	Data Format bit field mask.

#define	I2S_FMT_BIT_CLK_INV BIT(4)
	Invert bit clock.

#define	I2S_FMT_FRAME_CLK_INV BIT(5)
	Invert frame clock.

#define	I2S_FMT_CLK_NF_NB (0 << I2S_FMT_CLK_FORMAT_SHIFT)
	Normal Frame, Normal Bit Clk.

#define	I2S_FMT_CLK_NF_IB (1 << I2S_FMT_CLK_FORMAT_SHIFT)
	Normal Frame, Inverted Bit Clk.

#define	I2S_FMT_CLK_IF_NB (2 << I2S_FMT_CLK_FORMAT_SHIFT)
	Inverted Frame, Normal Bit Clk.

#define	I2S_FMT_CLK_IF_IB (3 << I2S_FMT_CLK_FORMAT_SHIFT)
	Inverted Frame, Inverted Bit Clk.

#define	I2S_OPT_BIT_CLK_CONT (0 << 0)
	Run bit clock continuously.

#define	I2S_OPT_BIT_CLK_GATED BIT(0)
	Run bit clock when sending data only.

#define	I2S_OPT_BIT_CLK_MASTER (0 << 1)
	I2S driver is bit clock master.

#define	I2S_OPT_BIT_CLK_SLAVE BIT(1)
	I2S driver is bit clock slave.

#define	I2S_OPT_FRAME_CLK_MASTER (0 << 2)
	I2S driver is frame clock master.

#define	I2S_OPT_FRAME_CLK_SLAVE BIT(2)
	I2S driver is frame clock slave.

#define	I2S_OPT_LOOPBACK BIT(7)
	Loop back mode.

#define	I2S_OPT_PINGPONG BIT(6)
	Ping pong mode.

Typedefs
typedef uint8_t	i2s_fmt_t
	I2S data stream format options.

typedef uint8_t	i2s_opt_t
	I2S configuration options.

Enumerations
enum	i2s_dir { I2S_DIR_RX , I2S_DIR_TX , I2S_DIR_BOTH }
	I2C Direction. More...

enum	i2s_state { I2S_STATE_NOT_READY , I2S_STATE_READY , I2S_STATE_RUNNING , I2S_STATE_STOPPING , I2S_STATE_ERROR }
	Interface state. More...

enum	i2s_trigger_cmd { I2S_TRIGGER_START , I2S_TRIGGER_STOP , I2S_TRIGGER_DRAIN , I2S_TRIGGER_DROP , I2S_TRIGGER_PREPARE }
	Trigger command. More...

Functions
int	i2s_configure (const struct device dev, enum i2s_dir dir, const struct i2s_config cfg)
	Configure operation of a host I2S controller.

static const struct i2s_config *	i2s_config_get (const struct device *dev, enum i2s_dir dir)
	Fetch configuration information of a host I2S controller.

static int	i2s_read (const struct device dev, void mem_block, size_t size)
	Read data from the RX queue.

int	i2s_buf_read (const struct device dev, void buf, size_t *size)
	Read data from the RX queue into a provided buffer.

static int	i2s_write (const struct device dev, void mem_block, size_t size)
	Write data to the TX queue.

int	i2s_buf_write (const struct device dev, void buf, size_t size)
	Write data to the TX queue from a provided buffer.

int	i2s_trigger (const struct device *dev, enum i2s_dir dir, enum i2s_trigger_cmd cmd)
	Send a trigger command.

Detailed Description

I2S (Inter-IC Sound) Interface.

Since: 1.9

Version: 1.0.0

The I2S API provides support for the standard I2S interface standard as well as common non-standard extensions such as PCM Short/Long Frame Sync, Left/Right Justified Data Format.

Macro Definition Documentation

◆ I2S_FMT_BIT_CLK_INV

#define I2S_FMT_BIT_CLK_INV BIT(4)

#include <include/zephyr/drivers/i2s.h>

Invert bit clock.

◆ I2S_FMT_CLK_FORMAT_MASK

#define I2S_FMT_CLK_FORMAT_MASK (0x3 << I2S_FMT_CLK_FORMAT_SHIFT)

#include <include/zephyr/drivers/i2s.h>

Data Format bit field mask.

◆ I2S_FMT_CLK_FORMAT_SHIFT

#define I2S_FMT_CLK_FORMAT_SHIFT 4

#include <include/zephyr/drivers/i2s.h>

Data Format bit field position.

◆ I2S_FMT_CLK_IF_IB

#define I2S_FMT_CLK_IF_IB (3 << I2S_FMT_CLK_FORMAT_SHIFT)

#include <include/zephyr/drivers/i2s.h>

Inverted Frame, Inverted Bit Clk.

◆ I2S_FMT_CLK_IF_NB

#define I2S_FMT_CLK_IF_NB (2 << I2S_FMT_CLK_FORMAT_SHIFT)

#include <include/zephyr/drivers/i2s.h>

Inverted Frame, Normal Bit Clk.

◆ I2S_FMT_CLK_NF_IB

#define I2S_FMT_CLK_NF_IB (1 << I2S_FMT_CLK_FORMAT_SHIFT)

#include <include/zephyr/drivers/i2s.h>

Normal Frame, Inverted Bit Clk.

◆ I2S_FMT_CLK_NF_NB

#define I2S_FMT_CLK_NF_NB (0 << I2S_FMT_CLK_FORMAT_SHIFT)

#include <include/zephyr/drivers/i2s.h>

Normal Frame, Normal Bit Clk.

◆ I2S_FMT_DATA_FORMAT_I2S

#define I2S_FMT_DATA_FORMAT_I2S (0 << I2S_FMT_DATA_FORMAT_SHIFT)

#include <include/zephyr/drivers/i2s.h>

Standard I2S Data Format.

Serial data is transmitted in two's complement with the MSB first. Both Word Select (WS) and Serial Data (SD) signals are sampled on the rising edge of the clock signal (SCK). The MSB is always sent one clock period after the WS changes. Left channel data are sent first indicated by WS = 0, followed by right channel data indicated by WS = 1.

   -. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-.
SCK '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '
   -.                               .-------------------------------.
WS  '-------------------------------'                               '----
   -.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.
SD  |   |MSB|   |...|   |LSB| x |...| x |MSB|   |...|   |LSB| x |...| x |
   -'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'
        | Left channel                  | Right channel                 |

◆ I2S_FMT_DATA_FORMAT_LEFT_JUSTIFIED

#define I2S_FMT_DATA_FORMAT_LEFT_JUSTIFIED (3 << I2S_FMT_DATA_FORMAT_SHIFT)

#include <include/zephyr/drivers/i2s.h>

Left Justified Data Format.

Serial data is transmitted in two's complement with the MSB first. Both Word Select (WS) and Serial Data (SD) signals are sampled on the rising edge of the clock signal (SCK). The bits within the data word are left justified such that the MSB is always sent in the clock period following the WS transition. Left channel data are sent first indicated by WS = 1, followed by right channel data indicated by WS = 0.

     .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-.
SCK -' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-
       .-------------------------------.                               .-
WS  ---'                               '-------------------------------'
    ---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.-
SD     |MSB|   |...|   |LSB| x |...| x |MSB|   |...|   |LSB| x |...| x |
    ---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'-
       | Left channel                  | Right channel                 |

◆ I2S_FMT_DATA_FORMAT_MASK

#define I2S_FMT_DATA_FORMAT_MASK (0x7 << I2S_FMT_DATA_FORMAT_SHIFT)

#include <include/zephyr/drivers/i2s.h>

Data Format bit field mask.

◆ I2S_FMT_DATA_FORMAT_PCM_LONG

#define I2S_FMT_DATA_FORMAT_PCM_LONG (2 << I2S_FMT_DATA_FORMAT_SHIFT)

#include <include/zephyr/drivers/i2s.h>

PCM Long Frame Sync Data Format.

Serial data is transmitted in two's complement with the MSB first. Both Word Select (WS) and Serial Data (SD) signals are sampled on the falling edge of the clock signal (SCK). The rising edge of the frame sync signal (WS) indicates the start of the PCM word. The frame sync has an arbitrary length, however it has to fall before the start of the next frame. An arbitrary number of data words can be sent in one frame.

     .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-.
SCK -' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-
         .--- ---.    ---.        ---.                               .---
WS      -'       '-      '-          '-                             -'
    -.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---
SD   |   |MSB|   |...|   |LSB|MSB|   |...|   |LSB|MSB|   |...|   |LSB|
    -'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---
         | Word 1            | Word 2            | Word 3  |  Word n |

◆ I2S_FMT_DATA_FORMAT_PCM_SHORT

#define I2S_FMT_DATA_FORMAT_PCM_SHORT (1 << I2S_FMT_DATA_FORMAT_SHIFT)

#include <include/zephyr/drivers/i2s.h>

PCM Short Frame Sync Data Format.

Serial data is transmitted in two's complement with the MSB first. Both Word Select (WS) and Serial Data (SD) signals are sampled on the falling edge of the clock signal (SCK). The falling edge of the frame sync signal (WS) indicates the start of the PCM word. The frame sync is one clock cycle long. An arbitrary number of data words can be sent in one frame.

     .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-.
SCK -' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-
     .---.                                                       .---.
WS  -'   '-                                                     -'   '-
    -.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---
SD   |   |MSB|   |...|   |LSB|MSB|   |...|   |LSB|MSB|   |...|   |LSB|
    -'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---
         | Word 1            | Word 2            | Word 3  |  Word n |

◆ I2S_FMT_DATA_FORMAT_RIGHT_JUSTIFIED

#define I2S_FMT_DATA_FORMAT_RIGHT_JUSTIFIED (4 << I2S_FMT_DATA_FORMAT_SHIFT)

#include <include/zephyr/drivers/i2s.h>

Right Justified Data Format.

Serial data is transmitted in two's complement with the MSB first. Both Word Select (WS) and Serial Data (SD) signals are sampled on the rising edge of the clock signal (SCK). The bits within the data word are right justified such that the LSB is always sent in the clock period preceding the WS transition. Left channel data are sent first indicated by WS = 1, followed by right channel data indicated by WS = 0.

     .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-.
SCK -' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-
       .-------------------------------.                               .-
WS  ---'                               '-------------------------------'
    ---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.-
SD     | x |...| x |MSB|   |...|   |LSB| x |...| x |MSB|   |...|   |LSB|
    ---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'-
       | Left channel                  | Right channel                 |

◆ I2S_FMT_DATA_FORMAT_SHIFT

#define I2S_FMT_DATA_FORMAT_SHIFT 0

#include <include/zephyr/drivers/i2s.h>

Data Format bit field position.

◆ I2S_FMT_DATA_ORDER_INV

#define I2S_FMT_DATA_ORDER_INV I2S_FMT_DATA_ORDER_LSB

#include <include/zephyr/drivers/i2s.h>

Invert bit ordering, send LSB first.

◆ I2S_FMT_DATA_ORDER_LSB

#define I2S_FMT_DATA_ORDER_LSB BIT(3)

#include <include/zephyr/drivers/i2s.h>

Send LSB first.

◆ I2S_FMT_DATA_ORDER_MSB

#define I2S_FMT_DATA_ORDER_MSB (0 << 3)

#include <include/zephyr/drivers/i2s.h>

Send MSB first.

◆ I2S_FMT_FRAME_CLK_INV

#define I2S_FMT_FRAME_CLK_INV BIT(5)

#include <include/zephyr/drivers/i2s.h>

Invert frame clock.

◆ I2S_OPT_BIT_CLK_CONT

#define I2S_OPT_BIT_CLK_CONT (0 << 0)

#include <include/zephyr/drivers/i2s.h>

Run bit clock continuously.

◆ I2S_OPT_BIT_CLK_GATED

#define I2S_OPT_BIT_CLK_GATED BIT(0)

#include <include/zephyr/drivers/i2s.h>

Run bit clock when sending data only.

◆ I2S_OPT_BIT_CLK_MASTER

#define I2S_OPT_BIT_CLK_MASTER (0 << 1)

#include <include/zephyr/drivers/i2s.h>

I2S driver is bit clock master.

◆ I2S_OPT_BIT_CLK_SLAVE

#define I2S_OPT_BIT_CLK_SLAVE BIT(1)

#include <include/zephyr/drivers/i2s.h>

I2S driver is bit clock slave.

◆ I2S_OPT_FRAME_CLK_MASTER

#define I2S_OPT_FRAME_CLK_MASTER (0 << 2)

#include <include/zephyr/drivers/i2s.h>

I2S driver is frame clock master.

◆ I2S_OPT_FRAME_CLK_SLAVE

#define I2S_OPT_FRAME_CLK_SLAVE BIT(2)

#include <include/zephyr/drivers/i2s.h>

I2S driver is frame clock slave.

◆ I2S_OPT_LOOPBACK

#define I2S_OPT_LOOPBACK BIT(7)

#include <include/zephyr/drivers/i2s.h>

Loop back mode.

In loop back mode RX input will be connected internally to TX output. This is used primarily for testing.

◆ I2S_OPT_PINGPONG

#define I2S_OPT_PINGPONG BIT(6)

#include <include/zephyr/drivers/i2s.h>

Ping pong mode.

In ping pong mode TX output will keep alternating between a ping buffer and a pong buffer. This is normally used in audio streams when one buffer is being populated while the other is being played (DMAed) and vice versa. So, in this mode, 2 sets of buffers fixed in size are used. Static Arrays are used to achieve this and hence they are never freed.

Typedef Documentation

◆ i2s_fmt_t

typedef uint8_t i2s_fmt_t

#include <include/zephyr/drivers/i2s.h>

I2S data stream format options.

◆ i2s_opt_t

typedef uint8_t i2s_opt_t

#include <include/zephyr/drivers/i2s.h>

I2S configuration options.

Enumeration Type Documentation

◆ i2s_dir

enum i2s_dir

#include <include/zephyr/drivers/i2s.h>

I2C Direction.

Enumerator
I2S_DIR_RX	Receive data.
I2S_DIR_TX	Transmit data.
I2S_DIR_BOTH	Both receive and transmit data.

◆ i2s_state

enum i2s_state

#include <include/zephyr/drivers/i2s.h>

Interface state.

Enumerator
I2S_STATE_NOT_READY	The interface is not ready. The interface was initialized but is not yet ready to receive / transmit data. Call i2s_configure() to configure interface and change its state to READY.
I2S_STATE_READY	The interface is ready to receive / transmit data.
I2S_STATE_RUNNING	The interface is receiving / transmitting data.
I2S_STATE_STOPPING	The interface is draining its transmit queue.
I2S_STATE_ERROR	TX buffer underrun or RX buffer overrun has occurred.

◆ i2s_trigger_cmd

enum i2s_trigger_cmd

#include <include/zephyr/drivers/i2s.h>

Trigger command.

Enumerator
I2S_TRIGGER_START	Start the transmission / reception of data. If I2S_DIR_TX is set some data has to be queued for transmission by the i2s_write() function. This trigger can be used in READY state only and changes the interface state to RUNNING.
I2S_TRIGGER_STOP	Stop the transmission / reception of data. Stop the transmission / reception of data at the end of the current memory block. This trigger can be used in RUNNING state only and at first changes the interface state to STOPPING. When the current TX / RX block is transmitted / received the state is changed to READY. Subsequent START trigger will resume transmission / reception where it stopped.
I2S_TRIGGER_DRAIN	Empty the transmit queue. Send all data in the transmit queue and stop the transmission. If the trigger is applied to the RX queue it has the same effect as I2S_TRIGGER_STOP. This trigger can be used in RUNNING state only and at first changes the interface state to STOPPING. When all TX blocks are transmitted the state is changed to READY.
I2S_TRIGGER_DROP	Discard the transmit / receive queue. Stop the transmission / reception immediately and discard the contents of the respective queue. This trigger can be used in any state other than NOT_READY and changes the interface state to READY.
I2S_TRIGGER_PREPARE	Prepare the queues after underrun/overrun error has occurred. This trigger can be used in ERROR state only and changes the interface state to READY.

Function Documentation

◆ i2s_buf_read()

int i2s_buf_read	(	const struct device *	dev,
		void *	buf,
		size_t *	size
	)

#include <include/zephyr/drivers/i2s.h>

Read data from the RX queue into a provided buffer.

Data received by the I2S interface is stored in the RX queue consisting of memory blocks preallocated by this function from rx_mem_slab (as defined by i2s_configure). Calling this function removes one block from the queue which is copied into the provided buffer and then freed.

The provided buffer must be large enough to contain a full memory block of data, which is parameterized for the channel via i2s_configure().

This function is otherwise equivalent to i2s_read().

Parameters

dev	Pointer to the device structure for the driver instance.
buf	Destination buffer for read data, which must be at least the as large as the configured memory block size for the RX channel.
size	Pointer to the variable storing the number of bytes read.

Return values

0	If successful.
-EIO	The interface is in NOT_READY or ERROR state and there are no more data blocks in the RX queue.
-EBUSY	Returned without waiting.
-EAGAIN	Waiting period timed out.

◆ i2s_buf_write()

int i2s_buf_write	(	const struct device *	dev,
		void *	buf,
		size_t	size
	)

#include <include/zephyr/drivers/i2s.h>

Write data to the TX queue from a provided buffer.

This function acquires a memory block from the I2S channel TX queue and copies the provided data buffer into it. It is otherwise equivalent to i2s_write().

Parameters

dev	Pointer to the device structure for the driver instance.
buf	Pointer to a buffer containing the data to transmit.
size	Number of bytes to write. This value has to be equal or smaller than the size of the channel's TX memory block configuration.

Return values

0	If successful.
-EIO	The interface is not in READY or RUNNING state.
-EBUSY	Returned without waiting.
-EAGAIN	Waiting period timed out.
-ENOMEM	No memory in TX slab queue.
-EINVAL	Size parameter larger than TX queue memory block.

◆ i2s_config_get()

static const struct i2s_config * i2s_config_get	(	const struct device *	dev,
		enum i2s_dir	dir
	)

inlinestatic

#include <include/zephyr/drivers/i2s.h>

Fetch configuration information of a host I2S controller.

Parameters

dev	Pointer to the device structure for the driver instance
dir	Stream direction: RX or TX as defined by I2S_DIR_*

Return values

Pointer to the structure containing configuration parameters, or NULL if un-configured

◆ i2s_configure()

int i2s_configure	(	const struct device *	dev,
		enum i2s_dir	dir,
		const struct i2s_config *	cfg
	)

#include <include/zephyr/drivers/i2s.h>

Configure operation of a host I2S controller.

The dir parameter specifies if Transmit (TX) or Receive (RX) direction will be configured by data provided via cfg parameter.

The function can be called in NOT_READY or READY state only. If executed successfully the function will change the interface state to READY.

If the function is called with the parameter cfg->frame_clk_freq set to 0 the interface state will be changed to NOT_READY.

Parameters

dev	Pointer to the device structure for the driver instance.
dir	Stream direction: RX, TX, or both, as defined by I2S_DIR_*. The I2S_DIR_BOTH value may not be supported by some drivers. For those, the RX and TX streams need to be configured separately.
cfg	Pointer to the structure containing configuration parameters.

Return values

0	If successful.
-EINVAL	Invalid argument.
-ENOSYS	I2S_DIR_BOTH value is not supported.

◆ i2s_read()

static int i2s_read	(	const struct device *	dev,
		void **	mem_block,
		size_t *	size
	)

inlinestatic

#include <include/zephyr/drivers/i2s.h>

Read data from the RX queue.

Data received by the I2S interface is stored in the RX queue consisting of memory blocks preallocated by this function from rx_mem_slab (as defined by i2s_configure). Ownership of the RX memory block is passed on to the user application which has to release it.

The data is read in chunks equal to the size of the memory block. If the interface is in READY state the number of bytes read can be smaller.

If there is no data in the RX queue the function will block waiting for the next RX memory block to fill in. This operation can timeout as defined by i2s_configure. If the timeout value is set to K_NO_WAIT the function is non-blocking.

Reading from the RX queue is possible in any state other than NOT_READY. If the interface is in the ERROR state it is still possible to read all the valid data stored in RX queue. Afterwards the function will return -EIO error.

Parameters

dev	Pointer to the device structure for the driver instance.
mem_block	Pointer to the RX memory block containing received data.
size	Pointer to the variable storing the number of bytes read.

Return values

0	If successful.
-EIO	The interface is in NOT_READY or ERROR state and there are no more data blocks in the RX queue.
-EBUSY	Returned without waiting.
-EAGAIN	Waiting period timed out.

◆ i2s_trigger()

int i2s_trigger	(	const struct device *	dev,
		enum i2s_dir	dir,
		enum i2s_trigger_cmd	cmd
	)

#include <include/zephyr/drivers/i2s.h>

Send a trigger command.

Parameters

dev	Pointer to the device structure for the driver instance.
dir	Stream direction: RX, TX, or both, as defined by I2S_DIR_*. The I2S_DIR_BOTH value may not be supported by some drivers. For those, triggering need to be done separately for the RX and TX streams.
cmd	Trigger command.

Return values

0	If successful.
-EINVAL	Invalid argument.
-EIO	The trigger cannot be executed in the current state or a DMA channel cannot be allocated.
-ENOMEM	RX/TX memory block not available.
-ENOSYS	I2S_DIR_BOTH value is not supported.

◆ i2s_write()

static int i2s_write	(	const struct device *	dev,
		void *	mem_block,
		size_t	size
	)

inlinestatic

#include <include/zephyr/drivers/i2s.h>

Write data to the TX queue.

Data to be sent by the I2S interface is stored first in the TX queue. TX queue consists of memory blocks preallocated by the user from tx_mem_slab (as defined by i2s_configure). This function takes ownership of the memory block and will release it when all data are transmitted.

If there are no free slots in the TX queue the function will block waiting for the next TX memory block to be send and removed from the queue. This operation can timeout as defined by i2s_configure. If the timeout value is set to K_NO_WAIT the function is non-blocking.

Writing to the TX queue is only possible if the interface is in READY or RUNNING state.

Parameters

dev	Pointer to the device structure for the driver instance.
mem_block	Pointer to the TX memory block containing data to be sent.
size	Number of bytes to write. This value has to be equal or smaller than the size of the memory block.

Return values

0	If successful.
-EIO	The interface is not in READY or RUNNING state.
-EBUSY	Returned without waiting.
-EAGAIN	Waiting period timed out.

Data Structures

Macros

Typedefs

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ I2S_FMT_BIT_CLK_INV

◆ I2S_FMT_CLK_FORMAT_MASK

◆ I2S_FMT_CLK_FORMAT_SHIFT

◆ I2S_FMT_CLK_IF_IB

◆ I2S_FMT_CLK_IF_NB

◆ I2S_FMT_CLK_NF_IB

◆ I2S_FMT_CLK_NF_NB

◆ I2S_FMT_DATA_FORMAT_I2S

◆ I2S_FMT_DATA_FORMAT_LEFT_JUSTIFIED

◆ I2S_FMT_DATA_FORMAT_MASK

◆ I2S_FMT_DATA_FORMAT_PCM_LONG

◆ I2S_FMT_DATA_FORMAT_PCM_SHORT

◆ I2S_FMT_DATA_FORMAT_RIGHT_JUSTIFIED

◆ I2S_FMT_DATA_FORMAT_SHIFT

◆ I2S_FMT_DATA_ORDER_INV

◆ I2S_FMT_DATA_ORDER_LSB

◆ I2S_FMT_DATA_ORDER_MSB

◆ I2S_FMT_FRAME_CLK_INV

◆ I2S_OPT_BIT_CLK_CONT

◆ I2S_OPT_BIT_CLK_GATED

◆ I2S_OPT_BIT_CLK_MASTER

◆ I2S_OPT_BIT_CLK_SLAVE

◆ I2S_OPT_FRAME_CLK_MASTER

◆ I2S_OPT_FRAME_CLK_SLAVE

◆ I2S_OPT_LOOPBACK

◆ I2S_OPT_PINGPONG

Typedef Documentation

◆ i2s_fmt_t

◆ i2s_opt_t

Enumeration Type Documentation

◆ i2s_dir

◆ i2s_state

◆ i2s_trigger_cmd

Function Documentation

◆ i2s_buf_read()

◆ i2s_buf_write()

◆ i2s_config_get()

◆ i2s_configure()

◆ i2s_read()

◆ i2s_trigger()

◆ i2s_write()