Zephyr Project API
3.7.0
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
nxp_s32k146_clock.h
Go to the documentation of this file.
1
/*
2
* Copyright 2023 NXP
3
*
4
* SPDX-License-Identifier: Apache-2.0
5
*/
6
7
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NXP_S32K146_CLOCK_H_
8
#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NXP_S32K146_CLOCK_H_
9
10
#define NXP_S32_LPO_128K_CLK 1U
11
#define NXP_S32_SIRC_CLK 2U
12
#define NXP_S32_SIRC_VLP_CLK 3U
13
#define NXP_S32_SIRC_STOP_CLK 4U
14
#define NXP_S32_FIRC_CLK 5U
15
#define NXP_S32_FIRC_VLP_CLK 6U
16
#define NXP_S32_FIRC_STOP_CLK 7U
17
#define NXP_S32_SOSC_CLK 8U
18
#define NXP_S32_SPLL_CLK 9U
19
#define NXP_S32_SIRCDIV1_CLK 10U
20
#define NXP_S32_SIRCDIV2_CLK 11U
21
#define NXP_S32_FIRCDIV1_CLK 12U
22
#define NXP_S32_FIRCDIV2_CLK 13U
23
#define NXP_S32_SOSCDIV1_CLK 14U
24
#define NXP_S32_SOSCDIV2_CLK 15U
25
#define NXP_S32_SPLLDIV1_CLK 16U
26
#define NXP_S32_SPLLDIV2_CLK 17U
27
#define NXP_S32_LPO_32K_CLK 18U
28
#define NXP_S32_LPO_1K_CLK 19U
29
#define NXP_S32_TCLK0_REF_CLK 20U
30
#define NXP_S32_TCLK1_REF_CLK 21U
31
#define NXP_S32_TCLK2_REF_CLK 22U
32
#define NXP_S32_SCS_CLK 24U
33
#define NXP_S32_SCS_RUN_CLK 25U
34
#define NXP_S32_SCS_VLPR_CLK 26U
35
#define NXP_S32_SCS_HSRUN_CLK 27U
36
#define NXP_S32_CORE_CLK 28U
37
#define NXP_S32_CORE_RUN_CLK 29U
38
#define NXP_S32_CORE_VLPR_CLK 30U
39
#define NXP_S32_CORE_HSRUN_CLK 31U
40
#define NXP_S32_BUS_CLK 32U
41
#define NXP_S32_BUS_RUN_CLK 33U
42
#define NXP_S32_BUS_VLPR_CLK 34U
43
#define NXP_S32_BUS_HSRUN_CLK 35U
44
#define NXP_S32_SLOW_CLK 36U
45
#define NXP_S32_SLOW_RUN_CLK 37U
46
#define NXP_S32_SLOW_VLPR_CLK 38U
47
#define NXP_S32_SLOW_HSRUN_CLK 39U
48
#define NXP_S32_RTC_CLK 40U
49
#define NXP_S32_LPO_CLK 41U
50
#define NXP_S32_SCG_CLKOUT_CLK 42U
51
#define NXP_S32_FTM0_EXT_CLK 43U
52
#define NXP_S32_FTM1_EXT_CLK 44U
53
#define NXP_S32_FTM2_EXT_CLK 45U
54
#define NXP_S32_FTM3_EXT_CLK 46U
55
#define NXP_S32_FTM4_EXT_CLK 47U
56
#define NXP_S32_FTM5_EXT_CLK 48U
57
#define NXP_S32_ADC0_CLK 50U
58
#define NXP_S32_ADC1_CLK 51U
59
#define NXP_S32_CLKOUT0_CLK 52U
60
#define NXP_S32_CMP0_CLK 53U
61
#define NXP_S32_CRC0_CLK 54U
62
#define NXP_S32_DMA0_CLK 55U
63
#define NXP_S32_DMAMUX0_CLK 56U
64
#define NXP_S32_EIM0_CLK 57U
65
#define NXP_S32_ERM0_CLK 58U
66
#define NXP_S32_EWM0_CLK 59U
67
#define NXP_S32_FLEXCAN0_CLK 60U
68
#define NXP_S32_FLEXCAN1_CLK 61U
69
#define NXP_S32_FLEXCAN2_CLK 62U
70
#define NXP_S32_FLEXIO_CLK 63U
71
#define NXP_S32_FTFC_CLK 64U
72
#define NXP_S32_FTM0_CLK 65U
73
#define NXP_S32_FTM1_CLK 66U
74
#define NXP_S32_FTM2_CLK 67U
75
#define NXP_S32_FTM3_CLK 68U
76
#define NXP_S32_FTM4_CLK 69U
77
#define NXP_S32_FTM5_CLK 70U
78
#define NXP_S32_LPI2C0_CLK 71U
79
#define NXP_S32_LPIT0_CLK 72U
80
#define NXP_S32_LPSPI0_CLK 73U
81
#define NXP_S32_LPSPI1_CLK 74U
82
#define NXP_S32_LPSPI2_CLK 75U
83
#define NXP_S32_LPTMR0_CLK 76U
84
#define NXP_S32_LPUART0_CLK 77U
85
#define NXP_S32_LPUART1_CLK 78U
86
#define NXP_S32_LPUART2_CLK 79U
87
#define NXP_S32_MPU0_CLK 80U
88
#define NXP_S32_MSCM0_CLK 81U
89
#define NXP_S32_PDB0_CLK 82U
90
#define NXP_S32_PDB1_CLK 83U
91
#define NXP_S32_PORTA_CLK 84U
92
#define NXP_S32_PORTB_CLK 85U
93
#define NXP_S32_PORTC_CLK 86U
94
#define NXP_S32_PORTD_CLK 87U
95
#define NXP_S32_PORTE_CLK 88U
96
#define NXP_S32_RTC0_CLK 89U
97
#define NXP_S32_TRACE_CLK 90U
98
99
#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NXP_S32K146_CLOCK_H_ */
include
zephyr
dt-bindings
clock
nxp_s32k146_clock.h
Generated on Sun Sep 15 2024 17:01:30 for Zephyr Project API by
1.9.8