pinctrl-rx-pfs.h File Reference

Renesas RX pin function selector devicetree bindings. More...

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Macros
#define	RX_PORT_NUM_POS   0
	Port number bit position.
#define	RX_PORT_NUM_MASK   0xf
	Port number mask.
#define	RX_PIN_NUM_POS   5
	Pin number bit position.
#define	RX_PIN_NUM_MASK   0xf
	Pin number mask.
#define	RX_PSEL_HIZ_JTAG_SWD   0x0
	Pin function selector: high impedance, JTAG/SWD.
#define	RX_PSEL_SCI_0   0xA
	Pin function selector: SCI channel 0.
#define	RX_PSEL_SCI_2   0xA
	Pin function selector: SCI channel 2.
#define	RX_PSEL_SCI_4   0xA
	Pin function selector: SCI channel 4.
#define	RX_PSEL_SCI_6   0xA
	Pin function selector: SCI channel 6.
#define	RX_PSEL_SCI_8   0xA
	Pin function selector: SCI channel 8.
#define	RX_PSEL_SCI_10   0xA
	Pin function selector: SCI channel 10.
#define	RX_PSEL_SCI_12   0xA
	Pin function selector: SCI channel 12.
#define	RX_PSEL_SCI_1   0xD
	Pin function selector: SCI channel 1.
#define	RX_PSEL_SCI_3   0xD
	Pin function selector: SCI channel 3.
#define	RX_PSEL_SCI_5   0xD
	Pin function selector: SCI channel 5.
#define	RX_PSEL_SCI_7   0xD
	Pin function selector: SCI channel 7.
#define	RX_PSEL_SCI_9   0xD
	Pin function selector: SCI channel 9.
#define	RX_PSEL_SCI_11   0xD
	Pin function selector: SCI channel 11.
#define	RX_PSEL_POS   9
	Pin function selector bit position.
#define	RX_PSEL_MASK   0x1f
	Pin function selector mask.
#define	RX_MODE_POS   16
	Mode bit position.
#define	RX_MODE_MASK   0x1
	Mode mask.
#define	RX_PSEL(psel, port_num, pin_num)
	Create a pin function selector configuration value.

Detailed Description

Renesas RX pin function selector devicetree bindings.

This header provides pin control definitions for Renesas RX series microcontrollers used in devicetree source files.

Macro Definition Documentation

RX_MODE_MASK

#define RX_MODE_MASK   0x1

Mode mask.

RX_MODE_POS

#define RX_MODE_POS   16

Mode bit position.

RX_PIN_NUM_MASK

#define RX_PIN_NUM_MASK   0xf

Pin number mask.

RX_PIN_NUM_POS

#define RX_PIN_NUM_POS   5

Pin number bit position.

RX_PORT_NUM_MASK

#define RX_PORT_NUM_MASK   0xf

Port number mask.

RX_PORT_NUM_POS

#define RX_PORT_NUM_POS   0

Port number bit position.

RX_PSEL

#define RX_PSEL	(		psel,
			port_num,
			pin_num )

Value:

(1 << RX_MODE_POS | psel << RX_PSEL_POS | port_num << RX_PORT_NUM_POS |                    \
 pin_num << RX_PIN_NUM_POS)

Create a pin function selector configuration value.

Parameters

psel	Pin function selector value
port_num	Port number
pin_num	Pin number

Returns

Configured pin control value

RX_PSEL_HIZ_JTAG_SWD

#define RX_PSEL_HIZ_JTAG_SWD   0x0

Pin function selector: high impedance, JTAG/SWD.

RX_PSEL_MASK

#define RX_PSEL_MASK   0x1f

Pin function selector mask.

RX_PSEL_POS

#define RX_PSEL_POS   9

Pin function selector bit position.

RX_PSEL_SCI_0

#define RX_PSEL_SCI_0   0xA

Pin function selector: SCI channel 0.

RX_PSEL_SCI_1

#define RX_PSEL_SCI_1   0xD

Pin function selector: SCI channel 1.

RX_PSEL_SCI_10

#define RX_PSEL_SCI_10   0xA

Pin function selector: SCI channel 10.

RX_PSEL_SCI_11

#define RX_PSEL_SCI_11   0xD

Pin function selector: SCI channel 11.

RX_PSEL_SCI_12

#define RX_PSEL_SCI_12   0xA

Pin function selector: SCI channel 12.

RX_PSEL_SCI_2

#define RX_PSEL_SCI_2   0xA

Pin function selector: SCI channel 2.

RX_PSEL_SCI_3

#define RX_PSEL_SCI_3   0xD

Pin function selector: SCI channel 3.

RX_PSEL_SCI_4

#define RX_PSEL_SCI_4   0xA

Pin function selector: SCI channel 4.

RX_PSEL_SCI_5

#define RX_PSEL_SCI_5   0xD

Pin function selector: SCI channel 5.

RX_PSEL_SCI_6

#define RX_PSEL_SCI_6   0xA

Pin function selector: SCI channel 6.

RX_PSEL_SCI_7

#define RX_PSEL_SCI_7   0xD

Pin function selector: SCI channel 7.

RX_PSEL_SCI_8

#define RX_PSEL_SCI_8   0xA

Pin function selector: SCI channel 8.

RX_PSEL_SCI_9

#define RX_PSEL_SCI_9   0xD

Pin function selector: SCI channel 9.