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Zephyr Project API 4.4.99
A Scalable Open Source RTOS
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Renesas RX GPIO I/O port devicetree bindings. More...
#include <zephyr/dt-bindings/dt-util.h>Go to the source code of this file.
Macros | |
| #define | RENESAS_GPIO_DS_POS (8) |
| GPIO drive strength bit position. | |
| #define | RENESAS_GPIO_DS_MSK GENMASK(RENESAS_GPIO_DS_POS + 1, RENESAS_GPIO_DS_POS) |
| GPIO drive strength mask. | |
| #define | RENESAS_GPIO_DS_LOW (0x0) |
| GPIO drive strength low. | |
| #define | RENESAS_GPIO_DS_MIDDLE BIT(RENESAS_GPIO_DS_POS) |
| GPIO drive strength middle. | |
| #define | RENESAS_GPIO_DS_HIGH_SPEED_HIGH_DRIVE BIT(RENESAS_GPIO_DS_POS + 1) |
| GPIO drive strength high speed high drive. | |
| #define | RENESAS_GPIO_DS_HIGH_DRIVE GENMASK(RENESAS_GPIO_DS_POS + 1, RENESAS_GPIO_DS_POS) |
| GPIO drive strength high drive. | |
Renesas RX GPIO I/O port devicetree bindings.
This header provides GPIO drive strength definitions for Renesas RX series microcontrollers used in devicetree source files.
| #define RENESAS_GPIO_DS_HIGH_DRIVE GENMASK(RENESAS_GPIO_DS_POS + 1, RENESAS_GPIO_DS_POS) |
GPIO drive strength high drive.
| #define RENESAS_GPIO_DS_HIGH_SPEED_HIGH_DRIVE BIT(RENESAS_GPIO_DS_POS + 1) |
GPIO drive strength high speed high drive.
| #define RENESAS_GPIO_DS_LOW (0x0) |
GPIO drive strength low.
| #define RENESAS_GPIO_DS_MIDDLE BIT(RENESAS_GPIO_DS_POS) |
GPIO drive strength middle.
| #define RENESAS_GPIO_DS_MSK GENMASK(RENESAS_GPIO_DS_POS + 1, RENESAS_GPIO_DS_POS) |
GPIO drive strength mask.
| #define RENESAS_GPIO_DS_POS (8) |
GPIO drive strength bit position.