Zephyr Project API 4.4.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
six301-clock.h File Reference

Go to the source code of this file.

Macros

#define CLOCK_ACMP0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 18))
#define CLOCK_ACMP1   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 19))
#define CLOCK_ADC0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 10))
#define CLOCK_AMUXCP0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 11))
#define CLOCK_BURAM   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 28))
#define CLOCK_BURTC   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 29))
#define CLOCK_DEVINFO   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 28))
#define CLOCK_DMEM   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 27))
#define CLOCK_DPLL0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 17))
#define CLOCK_ETAMPDET   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 2))
#define CLOCK_EUSART0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 22))
#define CLOCK_EUSART1   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 23))
#define CLOCK_EUSART2   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 24))
#define CLOCK_FSRCO   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 21))
#define CLOCK_GPCRC0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 3))
#define CLOCK_GPIO   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 26))
#define CLOCK_HFRCO0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 18))
#define CLOCK_HFRCOEM23   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 19))
#define CLOCK_HFXO0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 20))
#define CLOCK_HOSTPORTAL   (FIELD_PREP(CLOCK_REG_MASK, 3) | FIELD_PREP(CLOCK_BIT_MASK, 5))
#define CLOCK_I2C0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 14))
#define CLOCK_I2C1   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 15))
#define CLOCK_I2C2   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 25))
#define CLOCK_ICACHE0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 15))
#define CLOCK_KSU   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 1))
#define CLOCK_L2ICACHE0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 12))
#define CLOCK_LDMA0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 0))
#define CLOCK_LDMAXBAR0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 1))
#define CLOCK_LEDDRV0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 6))
#define CLOCK_LETIMER0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 12))
#define CLOCK_LFRCO   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 22))
#define CLOCK_LFXO   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 23))
#define CLOCK_LPWAES   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 2))
#define CLOCK_LPW0PORTAL   (FIELD_PREP(CLOCK_REG_MASK, 3) | FIELD_PREP(CLOCK_BIT_MASK, 6))
#define CLOCK_PCNT0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 21))
#define CLOCK_PIXELRZ0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 29))
#define CLOCK_PIXELRZ1   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 30))
#define CLOCK_PRS   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 27))
#define CLOCK_RPA   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 0))
#define CLOCK_SCRATCHPAD   (FIELD_PREP(CLOCK_REG_MASK, 3) | FIELD_PREP(CLOCK_BIT_MASK, 2))
#define CLOCK_SEMAILBOX   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 10))
#define CLOCK_SEMAPHORE0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 4))
#define CLOCK_SEMAPHORE1   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 5))
#define CLOCK_SEPORTAL   (FIELD_PREP(CLOCK_REG_MASK, 3) | FIELD_PREP(CLOCK_BIT_MASK, 7))
#define CLOCK_SMU   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 14))
#define CLOCK_SOCPLL0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 3))
#define CLOCK_SYMCRYPTO   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 31))
#define CLOCK_SYSCFG   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 16))
#define CLOCK_SYSRTC0   (FIELD_PREP(CLOCK_REG_MASK, 3) | FIELD_PREP(CLOCK_BIT_MASK, 0))
#define CLOCK_TIMER0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 4))
#define CLOCK_TIMER1   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 5))
#define CLOCK_TIMER2   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 6))
#define CLOCK_TIMER3   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 7))
#define CLOCK_ULFRCO   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 24))
#define CLOCK_WDOG0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 13))
#define CLOCK_WDOG1   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 17))

Macro Definition Documentation

◆ CLOCK_ACMP0

#define CLOCK_ACMP0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 18))

◆ CLOCK_ACMP1

#define CLOCK_ACMP1   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 19))

◆ CLOCK_ADC0

#define CLOCK_ADC0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 10))

◆ CLOCK_AMUXCP0

#define CLOCK_AMUXCP0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 11))

◆ CLOCK_BURAM

#define CLOCK_BURAM   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 28))

◆ CLOCK_BURTC

#define CLOCK_BURTC   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 29))

◆ CLOCK_DEVINFO

#define CLOCK_DEVINFO   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 28))

◆ CLOCK_DMEM

#define CLOCK_DMEM   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 27))

◆ CLOCK_DPLL0

#define CLOCK_DPLL0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 17))

◆ CLOCK_ETAMPDET

#define CLOCK_ETAMPDET   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 2))

◆ CLOCK_EUSART0

#define CLOCK_EUSART0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 22))

◆ CLOCK_EUSART1

#define CLOCK_EUSART1   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 23))

◆ CLOCK_EUSART2

#define CLOCK_EUSART2   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 24))

◆ CLOCK_FSRCO

#define CLOCK_FSRCO   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 21))

◆ CLOCK_GPCRC0

#define CLOCK_GPCRC0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 3))

◆ CLOCK_GPIO

#define CLOCK_GPIO   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 26))

◆ CLOCK_HFRCO0

#define CLOCK_HFRCO0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 18))

◆ CLOCK_HFRCOEM23

#define CLOCK_HFRCOEM23   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 19))

◆ CLOCK_HFXO0

#define CLOCK_HFXO0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 20))

◆ CLOCK_HOSTPORTAL

#define CLOCK_HOSTPORTAL   (FIELD_PREP(CLOCK_REG_MASK, 3) | FIELD_PREP(CLOCK_BIT_MASK, 5))

◆ CLOCK_I2C0

#define CLOCK_I2C0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 14))

◆ CLOCK_I2C1

#define CLOCK_I2C1   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 15))

◆ CLOCK_I2C2

#define CLOCK_I2C2   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 25))

◆ CLOCK_ICACHE0

#define CLOCK_ICACHE0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 15))

◆ CLOCK_KSU

#define CLOCK_KSU   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 1))

◆ CLOCK_L2ICACHE0

#define CLOCK_L2ICACHE0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 12))

◆ CLOCK_LDMA0

#define CLOCK_LDMA0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 0))

◆ CLOCK_LDMAXBAR0

#define CLOCK_LDMAXBAR0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 1))

◆ CLOCK_LEDDRV0

#define CLOCK_LEDDRV0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 6))

◆ CLOCK_LETIMER0

#define CLOCK_LETIMER0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 12))

◆ CLOCK_LFRCO

#define CLOCK_LFRCO   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 22))

◆ CLOCK_LFXO

#define CLOCK_LFXO   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 23))

◆ CLOCK_LPW0PORTAL

#define CLOCK_LPW0PORTAL   (FIELD_PREP(CLOCK_REG_MASK, 3) | FIELD_PREP(CLOCK_BIT_MASK, 6))

◆ CLOCK_LPWAES

#define CLOCK_LPWAES   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 2))

◆ CLOCK_PCNT0

#define CLOCK_PCNT0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 21))

◆ CLOCK_PIXELRZ0

#define CLOCK_PIXELRZ0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 29))

◆ CLOCK_PIXELRZ1

#define CLOCK_PIXELRZ1   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 30))

◆ CLOCK_PRS

#define CLOCK_PRS   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 27))

◆ CLOCK_RPA

#define CLOCK_RPA   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 0))

◆ CLOCK_SCRATCHPAD

#define CLOCK_SCRATCHPAD   (FIELD_PREP(CLOCK_REG_MASK, 3) | FIELD_PREP(CLOCK_BIT_MASK, 2))

◆ CLOCK_SEMAILBOX

#define CLOCK_SEMAILBOX   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 10))

◆ CLOCK_SEMAPHORE0

#define CLOCK_SEMAPHORE0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 4))

◆ CLOCK_SEMAPHORE1

#define CLOCK_SEMAPHORE1   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 5))

◆ CLOCK_SEPORTAL

#define CLOCK_SEPORTAL   (FIELD_PREP(CLOCK_REG_MASK, 3) | FIELD_PREP(CLOCK_BIT_MASK, 7))

◆ CLOCK_SMU

#define CLOCK_SMU   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 14))

◆ CLOCK_SOCPLL0

#define CLOCK_SOCPLL0   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 3))

◆ CLOCK_SYMCRYPTO

#define CLOCK_SYMCRYPTO   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 31))

◆ CLOCK_SYSCFG

#define CLOCK_SYSCFG   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 16))

◆ CLOCK_SYSRTC0

#define CLOCK_SYSRTC0   (FIELD_PREP(CLOCK_REG_MASK, 3) | FIELD_PREP(CLOCK_BIT_MASK, 0))

◆ CLOCK_TIMER0

#define CLOCK_TIMER0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 4))

◆ CLOCK_TIMER1

#define CLOCK_TIMER1   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 5))

◆ CLOCK_TIMER2

#define CLOCK_TIMER2   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 6))

◆ CLOCK_TIMER3

#define CLOCK_TIMER3   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 7))

◆ CLOCK_ULFRCO

#define CLOCK_ULFRCO   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 24))

◆ CLOCK_WDOG0

#define CLOCK_WDOG0   (FIELD_PREP(CLOCK_REG_MASK, 0) | FIELD_PREP(CLOCK_BIT_MASK, 13))

◆ CLOCK_WDOG1

#define CLOCK_WDOG1   (FIELD_PREP(CLOCK_REG_MASK, 1) | FIELD_PREP(CLOCK_BIT_MASK, 17))