Go to the source code of this file.
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| #define | STM32_SRC_SYSCLK 0x001 |
| | ID for system clock as source clock.
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| #define | STM32_SRC_LSE 0x002 |
| | ID for LSE clock as source clock.
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| #define | STM32_SRC_LSI 0x003 |
| | ID for LSI clock as source clock.
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| #define | NO_SEL 0xFF |
| | Dummy: Add a specifier when no selection is possible.
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| #define | STM32_CLOCK_DIV(div) |
| | Clock divider.
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| #define | STM32_DT_CLOCK_SELECT(val, msb, lsb, reg) |
| | Pack STM32 source clock selection RCC register bit fields for the DT.
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| #define | STM32_CLOCK(bus, bit) |
| | Pack RCC clock register offset and bit in two 32-bit values as expected for the Device Tree clocks property on STM32.
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◆ NO_SEL
Dummy: Add a specifier when no selection is possible.
◆ STM32_CLOCK
| #define STM32_CLOCK |
( |
| bus, |
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| bit ) |
Value:(STM32_CLOCK_BUS_##bus) (1 << bit)
Pack RCC clock register offset and bit in two 32-bit values as expected for the Device Tree clocks property on STM32.
- Parameters
-
| bus | STM32 bus name (expands to STM32_CLOCK_BUS_{bus}) |
| bit | Clock bit |
◆ STM32_CLOCK_DIV
| #define STM32_CLOCK_DIV |
( |
| div | ) |
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Value:
#define STM32_CLOCK_DIV_SHIFT
Definition stm32_clock.h:27
Clock divider.
◆ STM32_DT_CLOCK_SELECT
| #define STM32_DT_CLOCK_SELECT |
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| val, |
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| msb, |
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| lsb, |
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| reg ) |
Value:((((reg) & STM32_DT_CLKSEL_REG_MASK) << STM32_DT_CLKSEL_REG_SHIFT) | \
(((lsb) & STM32_DT_CLKSEL_SHIFT_MASK) << STM32_DT_CLKSEL_SHIFT_SHIFT) | \
((((msb) - (lsb)) & STM32_DT_CLKSEL_WIDTH_MASK) << STM32_DT_CLKSEL_WIDTH_SHIFT) | \
(((val) & STM32_DT_CLKSEL_VAL_MASK) << STM32_DT_CLKSEL_VAL_SHIFT))
Pack STM32 source clock selection RCC register bit fields for the DT.
- Parameters
-
| val | Clock configuration field value |
| msb | Field MSB's index |
| lsb | Field LSB's index |
| reg | Offset to target clock configuration register in RCC |
- Note
- Internally, the data are stored as follows
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'reg' range: 0x0~0xFFFF [ 00 : 15 ]
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'shift' range: 0~31 [ 16 : 20 ]
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'width' range: 0~7 [ 21 : 23 ] Value encodes bit fields width minus 1
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'val' range: 0x00~0xFF [ 24 : 31 ]
◆ STM32_SRC_LSE
| #define STM32_SRC_LSE 0x002 |
ID for LSE clock as source clock.
◆ STM32_SRC_LSI
| #define STM32_SRC_LSI 0x003 |
ID for LSI clock as source clock.
◆ STM32_SRC_SYSCLK
| #define STM32_SRC_SYSCLK 0x001 |
ID for system clock as source clock.