stm32_common_clocks.h File Reference

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Macros
#define	STM32_SRC_SYSCLK   0x001
	System clock.
#define	STM32_SRC_LSE   0x002
	Fixed clocks
#define	STM32_SRC_LSI   0x003
#define	NO_SEL   0xFF
	Dummy: Add a specifier when no selection is possible.
#define	STM32_CLOCK_DIV_SHIFT   12
#define	STM32_CLOCK_DIV(div)   (((div) - 1) << STM32_CLOCK_DIV_SHIFT)
	Clock divider.
#define	STM32_DT_CLKSEL_REG_MASK   0xFFFFU
	Helper macros to pack RCC clock source selection register info in the DT.
#define	STM32_DT_CLKSEL_REG_SHIFT   0U
#define	STM32_DT_CLKSEL_SHIFT_MASK   0x1FU
#define	STM32_DT_CLKSEL_SHIFT_SHIFT   16U
#define	STM32_DT_CLKSEL_WIDTH_MASK   0x3U
#define	STM32_DT_CLKSEL_WIDTH_SHIFT   21U
#define	STM32_DT_CLKSEL_VAL_MASK   0xFFU
#define	STM32_DT_CLKSEL_VAL_SHIFT   24U
#define	STM32_DT_CLOCK_SELECT(val, msb, lsb, reg)
	Pack STM32 source clock selection RCC register bit fields for the DT.
#define	STM32_CLOCK(bus, bit)   (STM32_CLOCK_BUS_##bus) (1 << bit)
	Pack RCC clock register offset and bit in two 32-bit values as expected for the Device Tree clocks property on STM32.

Macro Definition Documentation

NO_SEL

#define NO_SEL   0xFF

Dummy: Add a specifier when no selection is possible.

STM32_CLOCK

#define STM32_CLOCK	(		bus,
			bit
	)		(STM32_CLOCK_BUS_##bus) (1 << bit)

Pack RCC clock register offset and bit in two 32-bit values as expected for the Device Tree clocks property on STM32.

Parameters

bus	STM32 bus name (expands to STM32_CLOCK_BUS_{bus})
bit	Clock bit

STM32_CLOCK_DIV

#define STM32_CLOCK_DIV

(

div

)

(((div) - 1) << STM32_CLOCK_DIV_SHIFT)

Clock divider.

STM32_CLOCK_DIV_SHIFT

#define STM32_CLOCK_DIV_SHIFT   12

STM32_DT_CLKSEL_REG_MASK

#define STM32_DT_CLKSEL_REG_MASK   0xFFFFU

Helper macros to pack RCC clock source selection register info in the DT.

STM32_DT_CLKSEL_REG_SHIFT

#define STM32_DT_CLKSEL_REG_SHIFT   0U

STM32_DT_CLKSEL_SHIFT_MASK

#define STM32_DT_CLKSEL_SHIFT_MASK   0x1FU

STM32_DT_CLKSEL_SHIFT_SHIFT

#define STM32_DT_CLKSEL_SHIFT_SHIFT   16U

STM32_DT_CLKSEL_VAL_MASK

#define STM32_DT_CLKSEL_VAL_MASK   0xFFU

STM32_DT_CLKSEL_VAL_SHIFT

#define STM32_DT_CLKSEL_VAL_SHIFT   24U

STM32_DT_CLKSEL_WIDTH_MASK

#define STM32_DT_CLKSEL_WIDTH_MASK   0x3U

STM32_DT_CLKSEL_WIDTH_SHIFT

#define STM32_DT_CLKSEL_WIDTH_SHIFT   21U

STM32_DT_CLOCK_SELECT

#define STM32_DT_CLOCK_SELECT	(		val,
			msb,
			lsb,
			reg
	)

Value:

        ((((reg) & STM32_DT_CLKSEL_REG_MASK) << STM32_DT_CLKSEL_REG_SHIFT) |                    \
         (((lsb) & STM32_DT_CLKSEL_SHIFT_MASK) << STM32_DT_CLKSEL_SHIFT_SHIFT) |                \
         ((((msb) - (lsb)) & STM32_DT_CLKSEL_WIDTH_MASK) << STM32_DT_CLKSEL_WIDTH_SHIFT) |      \
         (((val) & STM32_DT_CLKSEL_VAL_MASK) << STM32_DT_CLKSEL_VAL_SHIFT))

Pack STM32 source clock selection RCC register bit fields for the DT.

Parameters

val	Clock configuration field value
msb	Field MSB's index
lsb	Field LSB's index
reg	Offset to target clock configuration register in RCC

Note

Internally, the data are stored as follows

'reg' range: 0x0~0xFFFF [ 00 : 15 ]

'shift' range: 0~31 [ 16 : 20 ]

'width' range: 0~7 [ 21 : 23 ] Value encodes bit fields width minus 1

'val' range: 0x00~0xFF [ 24 : 31 ]

STM32_SRC_LSE

#define STM32_SRC_LSE   0x002

Fixed clocks

STM32_SRC_LSI

#define STM32_SRC_LSI   0x003

STM32_SRC_SYSCLK

#define STM32_SRC_SYSCLK   0x001

System clock.