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◆ NO_SEL
Dummy: Add a specifier when no selection is possible.
◆ STM32_CLOCK
#define STM32_CLOCK |
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bus, |
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| (STM32_CLOCK_BUS_##bus) (1 << bit) |
Pack RCC clock register offset and bit in two 32-bit values as expected for the Device Tree clocks
property on STM32.
- Parameters
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bus | STM32 bus name (expands to STM32_CLOCK_BUS_{bus}) |
bit | Clock bit |
◆ STM32_CLOCK_DIV
◆ STM32_CLOCK_DIV_SHIFT
#define STM32_CLOCK_DIV_SHIFT 12 |
◆ STM32_DT_CLKSEL_MASK_MASK
#define STM32_DT_CLKSEL_MASK_MASK 0x1FU |
◆ STM32_DT_CLKSEL_MASK_SHIFT
#define STM32_DT_CLKSEL_MASK_SHIFT 22U |
◆ STM32_DT_CLKSEL_REG_MASK
#define STM32_DT_CLKSEL_REG_MASK 0xFFFFU |
Helper macros to pack RCC clock source selection register info in the DT.
◆ STM32_DT_CLKSEL_REG_SHIFT
#define STM32_DT_CLKSEL_REG_SHIFT 0U |
◆ STM32_DT_CLKSEL_SHIFT_MASK
#define STM32_DT_CLKSEL_SHIFT_MASK 0x3FU |
◆ STM32_DT_CLKSEL_SHIFT_SHIFT
#define STM32_DT_CLKSEL_SHIFT_SHIFT 16U |
◆ STM32_DT_CLKSEL_VAL_MASK
#define STM32_DT_CLKSEL_VAL_MASK 0x1FU |
◆ STM32_DT_CLKSEL_VAL_SHIFT
#define STM32_DT_CLKSEL_VAL_SHIFT 27U |
◆ STM32_DT_CLOCK_SELECT
#define STM32_DT_CLOCK_SELECT |
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val, |
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mask, |
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shift, |
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Value:
#define STM32_DT_CLKSEL_REG_SHIFT
Definition stm32_common_clocks.h:25
#define STM32_DT_CLKSEL_SHIFT_MASK
Definition stm32_common_clocks.h:26
#define STM32_DT_CLKSEL_MASK_SHIFT
Definition stm32_common_clocks.h:29
#define STM32_DT_CLKSEL_SHIFT_SHIFT
Definition stm32_common_clocks.h:27
#define STM32_DT_CLKSEL_VAL_SHIFT
Definition stm32_common_clocks.h:31
#define STM32_DT_CLKSEL_VAL_MASK
Definition stm32_common_clocks.h:30
#define STM32_DT_CLKSEL_REG_MASK
Helper macros to pack RCC clock source selection register info in the DT.
Definition stm32_common_clocks.h:24
#define STM32_DT_CLKSEL_MASK_MASK
Definition stm32_common_clocks.h:28
Pack STM32 source clock selection RCC register bit fields for the DT.
- Parameters
-
val | Clock configuration field value |
mask | Mask of register field in RCC register |
shift | Position of field within RCC register (= field LSB's index) |
reg | Offset to target clock configuration register in RCC |
- Note
- 'reg' range: 0x0~0xFFFF [ 00 : 15 ]
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'shift' range: 0~63 [ 16 : 21 ]
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'mask' range: 0x00~0x1F [ 22 : 26 ]
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'val' range: 0x00~0x1F [ 27 : 31 ]
◆ STM32_SRC_LSE
#define STM32_SRC_LSE 0x002 |
◆ STM32_SRC_LSI
#define STM32_SRC_LSI 0x003 |
◆ STM32_SRC_SYSCLK
#define STM32_SRC_SYSCLK 0x001 |