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◆ STM32_RESET_BUS_AHB1
      
        
          | #define STM32_RESET_BUS_AHB1   0x80 | 
      
 
 
◆ STM32_RESET_BUS_AHB2
      
        
          | #define STM32_RESET_BUS_AHB2   0x84 | 
      
 
 
◆ STM32_RESET_BUS_AHB3
      
        
          | #define STM32_RESET_BUS_AHB3   0x7C | 
      
 
 
◆ STM32_RESET_BUS_AHB4
      
        
          | #define STM32_RESET_BUS_AHB4   0x88 | 
      
 
 
◆ STM32_RESET_BUS_APB1H
      
        
          | #define STM32_RESET_BUS_APB1H   0x94 | 
      
 
 
◆ STM32_RESET_BUS_APB1L
      
        
          | #define STM32_RESET_BUS_APB1L   0x90 | 
      
 
 
◆ STM32_RESET_BUS_APB2
      
        
          | #define STM32_RESET_BUS_APB2   0x98 | 
      
 
 
◆ STM32_RESET_BUS_APB3
      
        
          | #define STM32_RESET_BUS_APB3   0x8C | 
      
 
 
◆ STM32_RESET_BUS_APB4
      
        
          | #define STM32_RESET_BUS_APB4   0x9C |