Migration guide to Zephyr v4.3.0 (Working Draft)
This document describes the changes required when migrating your application from Zephyr v4.2.0 to Zephyr v4.3.0.
Any other changes (not directly related to migrating applications) can be found in the release notes.
Build System
Kernel
Boards
mimxrt11x0: renamed lpadc1 to lpadc2 and renamed lpadc0 to lpadc1.
NXP
frdm_mcxa166
is renamed tofrdm_mcxa346
.NXP
frdm_mcxa276
is renamed tofrdm_mcxa266
.
Device Drivers and Devicetree
Phy
Nodes with compatible property
st,stm32u5-otghs-phy
now need to select the CLKSEL (phy reference clock) in the SYSCFG_OTGHSPHYCR register using the new property clock-reference. The selection directly depends on the value on OTGHSSEL (OTG_HS PHY kernel clock source selection) located in the RCC_CCIPR2 register.
Sensors
Nodes with compatible property
invensense,icm42688
now additionally need to also includeinvensense,icm4268x
in order to work.
Stepper
zephyr,gpio-stepper
has been replaced byzephyr,h-bridge-stepper
.
Bluetooth
bt_le_cs_test_param
andbt_le_cs_create_config_params
now require providing both the main and sub mode as a single parameter.bt_conn_le_cs_config
now reports both the main and sub mode as a single parameter.bt_conn_le_cs_main_mode
andbt_conn_le_cs_sub_mode
have been replaced withbt_conn_le_cs_mode
.
Bluetooth Controller
The following Kconfig option have been renamed:
Bluetooth Audio
bt_audio_codec_cfg
now requires setting the target latency and target PHY explicitly, rather than always setting the target latency to “Balanced” and the target PHY to LE 2M. To keep current functionality, set thetarget_latency
toBT_AUDIO_CODEC_CFG_TARGET_LATENCY_BALANCED
andtarget_phy
toBT_AUDIO_CODEC_CFG_TARGET_PHY_2M
. TheBT_AUDIO_CODEC_CFG
macro defaults to these values. (GitHub #93825`)Setting the BGS role for GMAP now requires also supporting and implementing the
CONFIG_BT_BAP_BROADCAST_ASSISTANT
. See the Basic Audio Profile (BAP) Broadcast Audio Assistant sample as a reference.
Ethernet
The
microchip,vsc8541
PHY driver now expects the reset-gpios entry to specify the GPIO_ACTIVE_LOW flag when the reset is being used as active low. Previously the active-low nature was hard-coded into the driver. (GitHub #91726).
Networking
The HTTP server now respects the configured
_config
value. Check that you provide applicable value toHTTP_SERVICE_DEFINE_EMPTY
,HTTPS_SERVICE_DEFINE_EMPTY
,HTTP_SERVICE_DEFINE
andHTTPS_SERVICE_DEFINE
.
Display
The RGB565 and BGR565 pixel formats were used interchangeably in the display sample. This has now been fixed. Boards and applications that were tested or developed based on the previous sample may be affected by this change (see GitHub #79996 for more information).
SSD1363’s properties using ‘greyscale’ now use ‘grayscale’.
PTP Clock
The doc of
ptp_clock_rate_adjust()
API didn’t provide proper and clear function description. Drivers implemented it to adjust rate ratio relatively based on current frequency. Now PI servo is introduced in both PTP and gPTP, and this API function is changed to use for rate ratio adjusting based on nominal frequency. Drivers implementingptp_clock_rate_adjust()
should be adjusted to account for the new behavior.
Other subsystems
Logging
The UART dictionary log parsing script scripts/logging/dictionary/log_parser_uart.py has been deprecated. Instead, the more generic script of scripts/logging/dictionary/live_log_parser.py should be used. The new script supports the same functionality (and more), but requires different command line arguments when invoked.
Modules
The TinyCrypt library was removed as the upstream version is no longer maintained. PSA Crypto API is now the recommended cryptographic library for Zephyr.
Silabs
Aligned the name of the Rail options with the other SiSDK related options:
CONFIG_RAIL_PA_CURVE_HEADER
toCONFIG_SILABS_SISDK_RAIL_PA_CURVE_HEADER
CONFIG_RAIL_PA_CURVE_TYPES_HEADER
toCONFIG_SILABS_SISDK_RAIL_PA_CURVE_TYPES_HEADER
CONFIG_RAIL_PA_ENABLE_CALIBRATION
toCONFIG_SILABS_SISDK_RAIL_PA_ENABLE_CALIBRATION
Fixed name of the
CONFIG_SOC_*
. These option contained PART_NUMBER in their while they shouldn’t.The separate
em3
power state was removed from Series 2 SoCs. The system automatically transitions to EM2 or EM3 depending on hardware peripheral requests for the oscillators.