CONFIG_RISCV_PMP

RISC-V PMP Support

Type: bool

Help

MCU implements Physical Memory Protection.
Memory protection against read-only area writing
is natively supported on real HW.

Direct dependencies

RISCV

(Includes any dependencies from ifs and menus.)

Default

• n

Symbols selected by this symbol

• THREAD_STACK_INFO

• CPU_HAS_MPU

• MPU

• SRAM_REGION_PERMISSIONS

• ARCH_MEM_DOMAIN_SYNCHRONOUS_API if USERSPACE

• PMP_POWER_OF_TWO_ALIGNMENT if USERSPACE

Symbols that select this symbol

• CORE_E31

Kconfig definition

At <Zephyr Architecture>/riscv/Kconfig:127

Included via Kconfig:8 → Kconfig.zephyr:39 → <Zephyr Architecture>/Kconfig:12

Menu path: (Top) → RISCV Options → RISCV Processor Options

menuconfig RISCV_PMP
    bool "RISC-V PMP Support"
    default n
    select THREAD_STACK_INFO
    select CPU_HAS_MPU
    select MPU
    select SRAM_REGION_PERMISSIONS
    select ARCH_MEM_DOMAIN_SYNCHRONOUS_API if USERSPACE
    select PMP_POWER_OF_TWO_ALIGNMENT if USERSPACE
    depends on RISCV
    help
      MCU implements Physical Memory Protection.
      Memory protection against read-only area writing
      is natively supported on real HW.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)