Zephyr Project API 3.7.0
A Scalable Open Source RTOS
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MIPI-DBI driver APIs. More...
Data Structures | |
struct | mipi_dbi_config |
MIPI DBI controller configuration. More... | |
struct | mipi_dbi_driver_api |
MIPI-DBI host driver API. More... | |
Macros | |
#define | MIPI_DBI_SPI_CONFIG_DT(node_id, operation_, delay_) |
initialize a MIPI DBI SPI configuration struct from devicetree | |
#define | MIPI_DBI_SPI_CONFIG_DT_INST(inst, operation_, delay_) MIPI_DBI_SPI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_) |
Initialize a MIPI DBI SPI configuration from devicetree instance. | |
#define | MIPI_DBI_CONFIG_DT(node_id, operation_, delay_) |
Initialize a MIPI DBI configuration from devicetree. | |
#define | MIPI_DBI_CONFIG_DT_INST(inst, operation_, delay_) MIPI_DBI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_) |
Initialize a MIPI DBI configuration from device instance. | |
#define | MIPI_DBI_MODE_SPI_3WIRE 0x1 |
SPI 3 wire (Type C1). | |
#define | MIPI_DBI_MODE_SPI_4WIRE 0x2 |
SPI 4 wire (Type C3). | |
#define | MIPI_DBI_MODE_6800_BUS_16_BIT 0x3 |
Parallel Bus protocol for MIPI DBI Type A based on Motorola 6800 bus. | |
#define | MIPI_DBI_MODE_6800_BUS_9_BIT 0x4 |
#define | MIPI_DBI_MODE_6800_BUS_8_BIT 0x5 |
#define | MIPI_DBI_MODE_8080_BUS_16_BIT 0x6 |
Parallel Bus protocol for MIPI DBI Type B based on Intel 8080 bus. | |
#define | MIPI_DBI_MODE_8080_BUS_9_BIT 0x7 |
#define | MIPI_DBI_MODE_8080_BUS_8_BIT 0x8 |
#define | MIPI_DBI_SPI_XFR_8BIT 8 |
SPI transfer of DBI commands as 8-bit blocks, the default behaviour in SPI 4 wire (Type C3) mode. | |
#define | MIPI_DBI_SPI_XFR_16BIT 16 |
SPI transfer of DBI commands as 16-bit blocks, a rare and seldom behaviour in SPI 4 wire (Type C3) mode. | |
Functions | |
static int | mipi_dbi_command_write (const struct device *dev, const struct mipi_dbi_config *config, uint8_t cmd, const uint8_t *data, size_t len) |
Write a command to the display controller. | |
static int | mipi_dbi_command_read (const struct device *dev, const struct mipi_dbi_config *config, uint8_t *cmds, size_t num_cmd, uint8_t *response, size_t len) |
Read a command response from the display controller. | |
static int | mipi_dbi_write_display (const struct device *dev, const struct mipi_dbi_config *config, const uint8_t *framebuf, struct display_buffer_descriptor *desc, enum display_pixel_format pixfmt) |
Write a display buffer to the display controller. | |
static int | mipi_dbi_reset (const struct device *dev, uint32_t delay) |
Resets attached display controller. | |
static int | mipi_dbi_release (const struct device *dev, const struct mipi_dbi_config *config) |
Releases a locked MIPI DBI device. | |
MIPI-DBI driver APIs.
#define MIPI_DBI_CONFIG_DT | ( | node_id, | |
operation_, | |||
delay_ | |||
) |
#include <include/zephyr/drivers/mipi_dbi.h>
Initialize a MIPI DBI configuration from devicetree.
This helper allows drivers to initialize a MIPI DBI configuration structure from devicetree. It sets the MIPI DBI mode, as well as configuration fields in the SPI configuration structure
node_id | Devicetree node identifier for the MIPI DBI device to initialize |
operation_ | the desired operation field in the struct spi_config |
delay_ | the desired delay field in the struct spi_config's spi_cs_control, if there is one |
#define MIPI_DBI_CONFIG_DT_INST | ( | inst, | |
operation_, | |||
delay_ | |||
) | MIPI_DBI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_) |
#include <include/zephyr/drivers/mipi_dbi.h>
Initialize a MIPI DBI configuration from device instance.
Equivalent to MIPI_DBI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)
inst | Instance of the device to initialize a MIPI DBI configuration for |
operation_ | the desired operation field in the struct spi_config |
delay_ | the desired delay field in the struct spi_config's spi_cs_control, if there is one |
#define MIPI_DBI_MODE_6800_BUS_16_BIT 0x3 |
#include <include/zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
Parallel Bus protocol for MIPI DBI Type A based on Motorola 6800 bus.
-. .--------. .------------------------ CS '---' '---' ------------------------------------------- RESX .-------------------------------- D/CX ----------' R/WX ------------------------------------------- ------------------------------------------- E .--------. .--------------------------. D[15:0]/ -| COMMAND|---| DATA | D[8:0]/ '--------' '--------------------------' D[7:0]
Please refer to the MIPI DBI specification for a detailed cycle diagram.
#define MIPI_DBI_MODE_6800_BUS_8_BIT 0x5 |
#define MIPI_DBI_MODE_6800_BUS_9_BIT 0x4 |
#define MIPI_DBI_MODE_8080_BUS_16_BIT 0x6 |
#include <include/zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
Parallel Bus protocol for MIPI DBI Type B based on Intel 8080 bus.
-. .- CS '---------------------------------------' ------------------------------------------- RESX --. .---------------------------- D/CX '-----------' ---. .--------. .---------------------- WRX '---' '---' ------------------------------------------- RDX .--------. .--------------------------. D[15:0]/ ---| COMMAND|---| DATA | D[8:0]/ '--------' '--------------------------' D[7:0]
Please refer to the MIPI DBI specification for a detailed cycle diagram.
#define MIPI_DBI_MODE_8080_BUS_8_BIT 0x8 |
#define MIPI_DBI_MODE_8080_BUS_9_BIT 0x7 |
#define MIPI_DBI_MODE_SPI_3WIRE 0x1 |
#include <include/zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
SPI 3 wire (Type C1).
Uses 9 write clocks to send a byte of data. The bit sent on the 9th clock indicates whether the byte is a command or data byte
.-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .- SCK -' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' -.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.- DOUT |D/C| D7| D6| D5| D4| D3| D2| D1| D0|D/C| D7| D6| D5| D4|...| -'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'- | Word 1 | Word n -. .- CS '-----------------------------------------------------------'
#define MIPI_DBI_MODE_SPI_4WIRE 0x2 |
#include <include/zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
SPI 4 wire (Type C3).
Uses 8 write clocks to send a byte of data. an additional C/D pin will be use to indicate whether the byte is a command or data byte
.-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. SCK -' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '--- -.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.- DOUT | D7| D6| D5| D4| D3| D2| D1| D0| D7| D6| D5| D4| D3| D2| D1| D0| -'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'- | Word 1 | Word n -. .- CS '---------------------------------------------------------------' -.-------------------------------.-------------------------------.- CD | D/C | D/C | -'-------------------------------'-------------------------------'-
#define MIPI_DBI_SPI_CONFIG_DT | ( | node_id, | |
operation_, | |||
delay_ | |||
) |
#include <include/zephyr/drivers/mipi_dbi.h>
initialize a MIPI DBI SPI configuration struct from devicetree
This helper allows drivers to initialize a MIPI DBI SPI configuration structure using devicetree.
node_id | Devicetree node identifier for the MIPI DBI device whose struct spi_config to create an initializer for |
operation_ | the desired operation field in the struct spi_config |
delay_ | the desired delay field in the struct spi_config's spi_cs_control, if there is one |
#define MIPI_DBI_SPI_CONFIG_DT_INST | ( | inst, | |
operation_, | |||
delay_ | |||
) | MIPI_DBI_SPI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_) |
#include <include/zephyr/drivers/mipi_dbi.h>
Initialize a MIPI DBI SPI configuration from devicetree instance.
This helper initializes a MIPI DBI SPI configuration from a devicetree instance. It is equivalent to MIPI_DBI_SPI_CONFIG_DT(DT_DRV_INST(inst))
inst | Instance number to initialize configuration from |
operation_ | the desired operation field in the struct spi_config |
delay_ | the desired delay field in the struct spi_config's spi_cs_control, if there is one |
#define MIPI_DBI_SPI_XFR_16BIT 16 |
#include <include/zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
SPI transfer of DBI commands as 16-bit blocks, a rare and seldom behaviour in SPI 4 wire (Type C3) mode.
The corresponding clocking diagram is slightly different to the illustration of Type C3.
.-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. SCK -' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '--- -.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.- DOUT |D15|D14|D13|D12|D11|D10| D9| D8| D7| D6| D5| D4| D3| D2| D1| D0| -'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'- | Word 1 (stuffing) : (byte) | -. .- CS '---------------------------------------------------------------' -.---------------------------------------------------------------.- CD | D/C | -'---------------------------------------------------------------'-
#define MIPI_DBI_SPI_XFR_8BIT 8 |
#include <include/zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
SPI transfer of DBI commands as 8-bit blocks, the default behaviour in SPI 4 wire (Type C3) mode.
The clocking diagram corresponds exactly to the illustration of Type C3.
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inlinestatic |
#include <include/zephyr/drivers/mipi_dbi.h>
Read a command response from the display controller.
Reads a command response from the display controller.
dev | mipi dbi controller |
config | MIPI DBI configuration |
cmds | array of one byte commands to send to display controller |
num_cmd | number of commands to write to display controller |
response | response buffer, filled with display controller response |
len | size of response buffer in bytes. |
0 | command read succeeded |
-EIO | I/O error |
-ETIMEDOUT | transfer timed out |
-EBUSY | controller is busy |
-ENOSYS | not implemented |
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inlinestatic |
#include <include/zephyr/drivers/mipi_dbi.h>
Write a command to the display controller.
Writes a command, along with an optional data buffer to the display. If data buffer and buffer length are NULL and 0 respectively, then only a command will be sent. Note that if the SPI configuration passed to this function locks the SPI bus, it is the caller's responsibility to release it with mipi_dbi_release()
dev | mipi dbi controller |
config | MIPI DBI configuration |
cmd | command to write to display controller |
data | optional data buffer to write after command |
len | size of data buffer in bytes. Set to 0 to skip sending data. |
0 | command write succeeded |
-EIO | I/O error |
-ETIMEDOUT | transfer timed out |
-EBUSY | controller is busy |
-ENOSYS | not implemented |
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inlinestatic |
#include <include/zephyr/drivers/mipi_dbi.h>
Releases a locked MIPI DBI device.
Releases a lock on a MIPI DBI device and/or the device's CS line if and only if the given config parameter was the last one to be used in any of the above functions, and if it has the SPI_LOCK_ON bit set and/or the SPI_HOLD_ON_CS bit set into its operation bits field. This lock functions exactly like the SPI lock, and can be used if the caller needs to keep CS asserted for multiple transactions, or the MIPI DBI device locked.
dev | mipi dbi controller |
config | MIPI DBI configuration |
0 | reset succeeded |
-EIO | I/O error |
-ENOSYS | not implemented |
-ENOTSUP | not supported |
#include <include/zephyr/drivers/mipi_dbi.h>
Resets attached display controller.
Resets the attached display controller.
dev | mipi dbi controller |
delay | duration to set reset signal for, in milliseconds |
0 | reset succeeded |
-EIO | I/O error |
-ENOSYS | not implemented |
-ENOTSUP | not supported |
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inlinestatic |
#include <include/zephyr/drivers/mipi_dbi.h>
Write a display buffer to the display controller.
Writes a display buffer to the controller. If the controller requires a "Write memory" command before writing display data, this should be sent with mipi_dbi_command_write
dev | mipi dbi controller |
config | MIPI DBI configuration |
framebuf | framebuffer to write to display |
desc | descriptor of framebuffer to write. Note that the pitch must be equal to width. "buf_size" field determines how many bytes will be written. |
pixfmt | pixel format of framebuffer data |
0 | buffer write succeeded. |
-EIO | I/O error |
-ETIMEDOUT | transfer timed out |
-EBUSY | controller is busy |
-ENOSYS | not implemented |