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Zephyr Project API 4.4.99
A Scalable Open Source RTOS
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Interfaces for Multi-bit Serial Peripheral Interface (MSPI) controllers. More...
Topics | |
| MSPI Configure API | |
| MSPI Configure API. | |
| MSPI Devicetree related macros | |
| MSPI Devicetree related macros. | |
| MSPI Emulation Interface | |
| MSPI Emulation Interface. | |
| MSPI Transfer API | |
| MSPI Transfer API. | |
| MSPI callback API | |
| MSPI callback API. | |
| Mspi_util | |
Files | |
| file | mspi.h |
| Main header file for MSPI (Multi-bit Serial Peripheral Interface) driver API. | |
Data Structures | |
| struct | mspi_driver_api |
| @driver_ops{MSPI} More... | |
Enumerations | |
| enum | mspi_op_mode { MSPI_OP_MODE_CONTROLLER = 0 , MSPI_OP_MODE_PERIPHERAL = 1 } |
| MSPI operational mode. More... | |
| enum | mspi_duplex { MSPI_HALF_DUPLEX = 0 , MSPI_FULL_DUPLEX = 1 } |
| MSPI duplex mode. More... | |
| enum | mspi_io_mode { MSPI_IO_MODE_SINGLE = 0 , MSPI_IO_MODE_DUAL = 1 , MSPI_IO_MODE_DUAL_1_1_2 = 2 , MSPI_IO_MODE_DUAL_1_2_2 = 3 , MSPI_IO_MODE_QUAD = 4 , MSPI_IO_MODE_QUAD_1_1_4 = 5 , MSPI_IO_MODE_QUAD_1_4_4 = 6 , MSPI_IO_MODE_OCTAL = 7 , MSPI_IO_MODE_OCTAL_1_1_8 = 8 , MSPI_IO_MODE_OCTAL_1_8_8 = 9 , MSPI_IO_MODE_HEX = 10 , MSPI_IO_MODE_HEX_8_8_16 = 11 , MSPI_IO_MODE_HEX_8_16_16 = 12 , MSPI_IO_MODE_MAX } |
| MSPI I/O mode capabilities Postfix like 1_4_4 stands for the number of lines used for command, address and data phases. More... | |
| enum | mspi_data_rate { MSPI_DATA_RATE_SINGLE = 0 , MSPI_DATA_RATE_S_S_D = 1 , MSPI_DATA_RATE_S_D_D = 2 , MSPI_DATA_RATE_DUAL = 3 , MSPI_DATA_RATE_MAX } |
| MSPI data rate capabilities SINGLE stands for single data rate for all phases. More... | |
| enum | mspi_cpp_mode { MSPI_CPP_MODE_0 = 0 , MSPI_CPP_MODE_1 = 1 , MSPI_CPP_MODE_2 = 2 , MSPI_CPP_MODE_3 = 3 } |
| MSPI Polarity & Phase Modes. More... | |
| enum | mspi_endian { MSPI_XFER_LITTLE_ENDIAN = 0 , MSPI_XFER_BIG_ENDIAN = 1 } |
| MSPI Endian. More... | |
| enum | mspi_ce_polarity { MSPI_CE_ACTIVE_LOW = 0 , MSPI_CE_ACTIVE_HIGH = 1 } |
| MSPI chip enable polarity. More... | |
| enum | mspi_bus_event { MSPI_BUS_RESET = 0 , MSPI_BUS_ERROR = 1 , MSPI_BUS_XFER_COMPLETE = 2 , MSPI_BUS_TIMEOUT = 3 , MSPI_BUS_EVENT_MAX } |
| MSPI bus event. More... | |
| enum | mspi_bus_event_cb_mask { MSPI_BUS_NO_CB = 0 , MSPI_BUS_RESET_CB = BIT(0) , MSPI_BUS_ERROR_CB = BIT(1) , MSPI_BUS_XFER_COMPLETE_CB = BIT(2) , MSPI_BUS_TIMEOUT_CB = BIT(3) } |
| MSPI bus event callback mask This is a preliminary list same as mspi_bus_event. More... | |
| enum | mspi_xfer_mode { MSPI_PIO , MSPI_DMA } |
| MSPI transfer modes. More... | |
| enum | mspi_xfer_priority { MSPI_XFER_PRIORITY_LOW , MSPI_XFER_PRIORITY_MEDIUM , MSPI_XFER_PRIORITY_HIGH } |
| MSPI transfer priority This is a preliminary list of priorities that are typically used with DMA. More... | |
| enum | mspi_xfer_direction { MSPI_RX , MSPI_TX } |
| MSPI transfer directions. More... | |
| enum | mspi_dev_cfg_mask { MSPI_DEVICE_CONFIG_NONE = 0 , MSPI_DEVICE_CONFIG_CE_NUM = BIT(0) , MSPI_DEVICE_CONFIG_FREQUENCY = BIT(1) , MSPI_DEVICE_CONFIG_IO_MODE = BIT(2) , MSPI_DEVICE_CONFIG_DATA_RATE = BIT(3) , MSPI_DEVICE_CONFIG_CPP = BIT(4) , MSPI_DEVICE_CONFIG_ENDIAN = BIT(5) , MSPI_DEVICE_CONFIG_CE_POL = BIT(6) , MSPI_DEVICE_CONFIG_DQS = BIT(7) , MSPI_DEVICE_CONFIG_RX_DUMMY = BIT(8) , MSPI_DEVICE_CONFIG_TX_DUMMY = BIT(9) , MSPI_DEVICE_CONFIG_READ_CMD = BIT(10) , MSPI_DEVICE_CONFIG_WRITE_CMD = BIT(11) , MSPI_DEVICE_CONFIG_CMD_LEN = BIT(12) , MSPI_DEVICE_CONFIG_ADDR_LEN = BIT(13) , MSPI_DEVICE_CONFIG_MEM_BOUND = BIT(14) , MSPI_DEVICE_CONFIG_BREAK_TIME = BIT(15) , MSPI_DEVICE_CONFIG_ALL = BIT_MASK(16) } |
| MSPI controller device specific configuration mask. More... | |
| enum | mspi_memmap_permit { MSPI_MEMMAP_READ_WRITE = 0 , MSPI_MEMMAP_READ_ONLY = 1 } |
| MSPI memory map access permissions. More... | |
| typedef int(* | mspi_api_config) (const struct mspi_dt_spec *spec) |
| @def_driverbackendgroup{MSPI,mspi_interface} | |
| typedef int(* | mspi_api_dev_config) (const struct device *controller, const struct mspi_dev_id *dev_id, const enum mspi_dev_cfg_mask param_mask, const struct mspi_dev_cfg *cfg) |
| Configure an MSPI controller with device specific parameters. | |
| typedef int(* | mspi_api_get_channel_status) (const struct device *controller, uint8_t ch) |
| Query to see if it a channel is ready. | |
| typedef int(* | mspi_api_transceive) (const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_xfer *req) |
| Transfer request over MSPI. | |
| typedef int(* | mspi_api_register_callback) (const struct device *controller, const struct mspi_dev_id *dev_id, const enum mspi_bus_event evt_type, mspi_callback_handler_t cb, struct mspi_callback_context *ctx) |
| Register the mspi callback functions. | |
| typedef int(* | mspi_api_memmap_config) (const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_memmap_cfg *memmap_cfg) |
| Configure MSPI memory map settings. | |
| typedef int(* | mspi_api_scramble_config) (const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_scramble_cfg *scramble_cfg) |
| Configure MSPI scrambling settings. | |
| typedef int(* | mspi_api_timing_config) (const struct device *controller, const struct mspi_dev_id *dev_id, const uint32_t param_mask, void *timing_cfg) |
| Configure MSPI timing settings. | |
Interfaces for Multi-bit Serial Peripheral Interface (MSPI) controllers.
| typedef int(* mspi_api_config) (const struct mspi_dt_spec *spec) |
#include <mspi.h>
@def_driverbackendgroup{MSPI,mspi_interface}
Configure an MSPI controller. See mspi_config() for argument description.
| typedef int(* mspi_api_dev_config) (const struct device *controller, const struct mspi_dev_id *dev_id, const enum mspi_dev_cfg_mask param_mask, const struct mspi_dev_cfg *cfg) |
#include <mspi.h>
Configure an MSPI controller with device specific parameters.
See mspi_dev_config() for argument description.
#include <mspi.h>
Query to see if it a channel is ready.
See mspi_get_channel_status() for argument description.
| typedef int(* mspi_api_memmap_config) (const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_memmap_cfg *memmap_cfg) |
#include <mspi.h>
Configure MSPI memory map settings.
See mspi_memmap_config() for argument description.
| typedef int(* mspi_api_register_callback) (const struct device *controller, const struct mspi_dev_id *dev_id, const enum mspi_bus_event evt_type, mspi_callback_handler_t cb, struct mspi_callback_context *ctx) |
#include <mspi.h>
Register the mspi callback functions.
See mspi_register_callback() for argument description.
| typedef int(* mspi_api_scramble_config) (const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_scramble_cfg *scramble_cfg) |
#include <mspi.h>
Configure MSPI scrambling settings.
See mspi_scramble_config() for argument description.
| typedef int(* mspi_api_timing_config) (const struct device *controller, const struct mspi_dev_id *dev_id, const uint32_t param_mask, void *timing_cfg) |
#include <mspi.h>
Configure MSPI timing settings.
See mspi_timing_config() for argument description.
| typedef int(* mspi_api_transceive) (const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_xfer *req) |
| enum mspi_bus_event |
#include <mspi.h>
MSPI bus event.
This is a preliminary list of events. I encourage the community to fill it up.
| Enumerator | |
|---|---|
| MSPI_BUS_RESET | |
| MSPI_BUS_ERROR | |
| MSPI_BUS_XFER_COMPLETE | |
| MSPI_BUS_TIMEOUT | When a request or xfer has timed out. |
| MSPI_BUS_EVENT_MAX | |
#include <mspi.h>
MSPI bus event callback mask This is a preliminary list same as mspi_bus_event.
I encourage the community to fill it up.
| Enumerator | |
|---|---|
| MSPI_BUS_NO_CB | |
| MSPI_BUS_RESET_CB | |
| MSPI_BUS_ERROR_CB | |
| MSPI_BUS_XFER_COMPLETE_CB | |
| MSPI_BUS_TIMEOUT_CB | |
| enum mspi_ce_polarity |
| enum mspi_cpp_mode |
#include <mspi.h>
MSPI Polarity & Phase Modes.
| Enumerator | |
|---|---|
| MSPI_CPP_MODE_0 | |
| MSPI_CPP_MODE_1 | |
| MSPI_CPP_MODE_2 | |
| MSPI_CPP_MODE_3 | |
| enum mspi_data_rate |
#include <mspi.h>
MSPI data rate capabilities SINGLE stands for single data rate for all phases.
DUAL stands for dual data rate for all phases. S_S_D stands for single data rate for command and address phases but dual data rate for data phase. S_D_D stands for single data rate for command phase but dual data rate for address and data phases.
| Enumerator | |
|---|---|
| MSPI_DATA_RATE_SINGLE | |
| MSPI_DATA_RATE_S_S_D | |
| MSPI_DATA_RATE_S_D_D | |
| MSPI_DATA_RATE_DUAL | |
| MSPI_DATA_RATE_MAX | |
| enum mspi_dev_cfg_mask |
#include <mspi.h>
MSPI controller device specific configuration mask.
| enum mspi_duplex |
| enum mspi_endian |
| enum mspi_io_mode |
#include <mspi.h>
MSPI I/O mode capabilities Postfix like 1_4_4 stands for the number of lines used for command, address and data phases.
Mode with no postfix has the same number of lines for all phases.
| enum mspi_memmap_permit |
#include <mspi.h>
MSPI memory map access permissions.
| Enumerator | |
|---|---|
| MSPI_MEMMAP_READ_WRITE | Allow read/write access to the memory mapped region. |
| MSPI_MEMMAP_READ_ONLY | Allow read only access to the memory mapped region. |
| enum mspi_op_mode |
| enum mspi_xfer_direction |
| enum mspi_xfer_mode |
| enum mspi_xfer_priority |
#include <mspi.h>
MSPI transfer priority This is a preliminary list of priorities that are typically used with DMA.
| Enumerator | |
|---|---|
| MSPI_XFER_PRIORITY_LOW | |
| MSPI_XFER_PRIORITY_MEDIUM | |
| MSPI_XFER_PRIORITY_HIGH | |