lis2du12.h File Reference

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Macros
#define	LIS2DU12_DT_FS_2G   0
#define	LIS2DU12_DT_FS_4G   1
#define	LIS2DU12_DT_FS_8G   2
#define	LIS2DU12_DT_FS_16G   3
#define	LIS2DU12_DT_ODR_OFF   0x00 /* Power-Down */
#define	LIS2DU12_DT_ODR_AT_1Hz6_ULP   0x01 /* 1Hz6 (ultra low power) */
#define	LIS2DU12_DT_ODR_AT_3Hz_ULP   0x02 /* 3Hz (ultra low power) */
#define	LIS2DU12_DT_ODR_AT_6Hz_ULP   0x03 /* 6Hz (ultra low power) */
#define	LIS2DU12_DT_ODR_AT_6Hz   0x04 /* 6Hz (normal) */
#define	LIS2DU12_DT_ODR_AT_12Hz   0x05 /* 12Hz5 (normal) */
#define	LIS2DU12_DT_ODR_AT_25Hz   0x06 /* 25Hz (normal) */
#define	LIS2DU12_DT_ODR_AT_50Hz   0x07 /* 50Hz (normal) */
#define	LIS2DU12_DT_ODR_AT_100Hz   0x08 /* 100Hz (normal) */
#define	LIS2DU12_DT_ODR_AT_200Hz   0x09 /* 200Hz (normal) */
#define	LIS2DU12_DT_ODR_AT_400Hz   0x0a /* 400Hz (normal) */
#define	LIS2DU12_DT_ODR_AT_800Hz   0x0b /* 800Hz (normal) */
#define	LIS2DU12_DT_ODR_TRIG_PIN   0x0e /* Single-shot high latency by INT2 */
#define	LIS2DU12_DT_ODR_TRIG_SW   0x0f /* Single-shot high latency by IF */

Macro Definition Documentation

LIS2DU12_DT_FS_16G

#define LIS2DU12_DT_FS_16G   3

LIS2DU12_DT_FS_2G

#define LIS2DU12_DT_FS_2G   0

LIS2DU12_DT_FS_4G

#define LIS2DU12_DT_FS_4G   1

LIS2DU12_DT_FS_8G

#define LIS2DU12_DT_FS_8G   2

LIS2DU12_DT_ODR_AT_100Hz

#define LIS2DU12_DT_ODR_AT_100Hz   0x08 /* 100Hz (normal) */

LIS2DU12_DT_ODR_AT_12Hz

#define LIS2DU12_DT_ODR_AT_12Hz   0x05 /* 12Hz5 (normal) */

LIS2DU12_DT_ODR_AT_1Hz6_ULP

#define LIS2DU12_DT_ODR_AT_1Hz6_ULP   0x01 /* 1Hz6 (ultra low power) */

LIS2DU12_DT_ODR_AT_200Hz

#define LIS2DU12_DT_ODR_AT_200Hz   0x09 /* 200Hz (normal) */

LIS2DU12_DT_ODR_AT_25Hz

#define LIS2DU12_DT_ODR_AT_25Hz   0x06 /* 25Hz (normal) */

LIS2DU12_DT_ODR_AT_3Hz_ULP

#define LIS2DU12_DT_ODR_AT_3Hz_ULP   0x02 /* 3Hz (ultra low power) */

LIS2DU12_DT_ODR_AT_400Hz

#define LIS2DU12_DT_ODR_AT_400Hz   0x0a /* 400Hz (normal) */

LIS2DU12_DT_ODR_AT_50Hz

#define LIS2DU12_DT_ODR_AT_50Hz   0x07 /* 50Hz (normal) */

LIS2DU12_DT_ODR_AT_6Hz

#define LIS2DU12_DT_ODR_AT_6Hz   0x04 /* 6Hz (normal) */

LIS2DU12_DT_ODR_AT_6Hz_ULP

#define LIS2DU12_DT_ODR_AT_6Hz_ULP   0x03 /* 6Hz (ultra low power) */

LIS2DU12_DT_ODR_AT_800Hz

#define LIS2DU12_DT_ODR_AT_800Hz   0x0b /* 800Hz (normal) */

LIS2DU12_DT_ODR_OFF

#define LIS2DU12_DT_ODR_OFF   0x00 /* Power-Down */

LIS2DU12_DT_ODR_TRIG_PIN

#define LIS2DU12_DT_ODR_TRIG_PIN   0x0e /* Single-shot high latency by INT2 */

LIS2DU12_DT_ODR_TRIG_SW

#define LIS2DU12_DT_ODR_TRIG_SW   0x0f /* Single-shot high latency by IF */