mtk_mt8188_clock.h File Reference

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Macros
#define	CLK_INFRA_AO_PMIC_TMR   0
#define	CLK_INFRA_AO_PMIC_AP   1
#define	CLK_INFRA_AO_PMIC_MD   2
#define	CLK_INFRA_AO_PMIC_CONN   3
#define	CLK_INFRA_AO_SEJ   4
#define	CLK_INFRA_AO_APXGPT   5
#define	CLK_INFRA_AO_GCE   6
#define	CLK_INFRA_AO_GCE2   7
#define	CLK_INFRA_AO_THERM   8
#define	CLK_INFRA_AO_PWM_HCLK   9
#define	CLK_INFRA_AO_PWM1   10
#define	CLK_INFRA_AO_PWM2   11
#define	CLK_INFRA_AO_PWM3   12
#define	CLK_INFRA_AO_PWM4   13
#define	CLK_INFRA_AO_PWM   14
#define	CLK_INFRA_AO_UART0   15
#define	CLK_INFRA_AO_UART1   16
#define	CLK_INFRA_AO_UART2   17
#define	CLK_INFRA_AO_UART3   18
#define	CLK_INFRA_AO_UART4   19
#define	CLK_INFRA_AO_GCE_26M   20
#define	CLK_INFRA_AO_CQ_DMA_FPC   21
#define	CLK_INFRA_AO_UART5   22
#define	CLK_INFRA_AO_HDMI_26M   23
#define	CLK_INFRA_AO_SPI0   24
#define	CLK_INFRA_AO_MSDC0   25
#define	CLK_INFRA_AO_MSDC1   26
#define	CLK_INFRA_AO_MSDC2   27
#define	CLK_INFRA_AO_MSDC0_SRC   28
#define	CLK_INFRA_AO_DVFSRC   29
#define	CLK_INFRA_AO_TRNG   30
#define	CLK_INFRA_AO_AUXADC   31
#define	CLK_INFRA_AO_CPUM   32
#define	CLK_INFRA_AO_HDMI_32K   33
#define	CLK_INFRA_AO_CEC_66M_HCLK   34
#define	CLK_INFRA_AO_PCIE_TL_26M   35
#define	CLK_INFRA_AO_MSDC1_SRC   36
#define	CLK_INFRA_AO_CEC_66M_BCLK   37
#define	CLK_INFRA_AO_PCIE_TL_96M   38
#define	CLK_INFRA_AO_DEVICE_APC   39
#define	CLK_INFRA_AO_ECC_66M_HCLK   40
#define	CLK_INFRA_AO_DEBUGSYS   41
#define	CLK_INFRA_AO_AUDIO   42
#define	CLK_INFRA_AO_PCIE_TL_32K   43
#define	CLK_INFRA_AO_DBG_TRACE   44
#define	CLK_INFRA_AO_DRAMC_F26M   45
#define	CLK_INFRA_AO_IRTX   46
#define	CLK_INFRA_AO_DISP_PWM   47
#define	CLK_INFRA_AO_CLDMA_BCLK   48
#define	CLK_INFRA_AO_AUDIO_26M_BCLK   49
#define	CLK_INFRA_AO_SPI1   50
#define	CLK_INFRA_AO_SPI2   51
#define	CLK_INFRA_AO_SPI3   52
#define	CLK_INFRA_AO_FSSPM   53
#define	CLK_INFRA_AO_SSPM_BUS_HCLK   54
#define	CLK_INFRA_AO_APDMA_BCLK   55
#define	CLK_INFRA_AO_SPI4   56
#define	CLK_INFRA_AO_SPI5   57
#define	CLK_INFRA_AO_CQ_DMA   58
#define	CLK_INFRA_AO_MSDC0_SELF   59
#define	CLK_INFRA_AO_MSDC1_SELF   60
#define	CLK_INFRA_AO_MSDC2_SELF   61
#define	CLK_INFRA_AO_I2S_DMA   62
#define	CLK_INFRA_AO_AP_MSDC0   63
#define	CLK_INFRA_AO_MD_MSDC0   64
#define	CLK_INFRA_AO_MSDC30_2   65
#define	CLK_INFRA_AO_GCPU   66
#define	CLK_INFRA_AO_PCIE_PERI_26M   67
#define	CLK_INFRA_AO_GCPU_66M_BCLK   68
#define	CLK_INFRA_AO_GCPU_133M_BCLK   69
#define	CLK_INFRA_AO_DISP_PWM1   70
#define	CLK_INFRA_AO_FBIST2FPC   71
#define	CLK_INFRA_AO_DEVICE_APC_SYNC   72
#define	CLK_INFRA_AO_PCIE_P1_PERI_26M   73
#define	CLK_INFRA_AO_133M_MCLK_CK   74
#define	CLK_INFRA_AO_66M_MCLK_CK   75
#define	CLK_INFRA_AO_PCIE_PL_P_250M_P0   76
#define	CLK_INFRA_AO_RG_AES_MSDCFDE_CK_0P   77
#define	CLK_INFRA_AO_NR_CLK   78

Macro Definition Documentation

CLK_INFRA_AO_133M_MCLK_CK

#define CLK_INFRA_AO_133M_MCLK_CK   74

CLK_INFRA_AO_66M_MCLK_CK

#define CLK_INFRA_AO_66M_MCLK_CK   75

CLK_INFRA_AO_AP_MSDC0

#define CLK_INFRA_AO_AP_MSDC0   63

CLK_INFRA_AO_APDMA_BCLK

#define CLK_INFRA_AO_APDMA_BCLK   55

CLK_INFRA_AO_APXGPT

#define CLK_INFRA_AO_APXGPT   5

CLK_INFRA_AO_AUDIO

#define CLK_INFRA_AO_AUDIO   42

CLK_INFRA_AO_AUDIO_26M_BCLK

#define CLK_INFRA_AO_AUDIO_26M_BCLK   49

CLK_INFRA_AO_AUXADC

#define CLK_INFRA_AO_AUXADC   31

CLK_INFRA_AO_CEC_66M_BCLK

#define CLK_INFRA_AO_CEC_66M_BCLK   37

CLK_INFRA_AO_CEC_66M_HCLK

#define CLK_INFRA_AO_CEC_66M_HCLK   34

CLK_INFRA_AO_CLDMA_BCLK

#define CLK_INFRA_AO_CLDMA_BCLK   48

CLK_INFRA_AO_CPUM

#define CLK_INFRA_AO_CPUM   32

CLK_INFRA_AO_CQ_DMA

#define CLK_INFRA_AO_CQ_DMA   58

CLK_INFRA_AO_CQ_DMA_FPC

#define CLK_INFRA_AO_CQ_DMA_FPC   21

CLK_INFRA_AO_DBG_TRACE

#define CLK_INFRA_AO_DBG_TRACE   44

CLK_INFRA_AO_DEBUGSYS

#define CLK_INFRA_AO_DEBUGSYS   41

CLK_INFRA_AO_DEVICE_APC

#define CLK_INFRA_AO_DEVICE_APC   39

CLK_INFRA_AO_DEVICE_APC_SYNC

#define CLK_INFRA_AO_DEVICE_APC_SYNC   72

CLK_INFRA_AO_DISP_PWM

#define CLK_INFRA_AO_DISP_PWM   47

CLK_INFRA_AO_DISP_PWM1

#define CLK_INFRA_AO_DISP_PWM1   70

CLK_INFRA_AO_DRAMC_F26M

#define CLK_INFRA_AO_DRAMC_F26M   45

CLK_INFRA_AO_DVFSRC

#define CLK_INFRA_AO_DVFSRC   29

CLK_INFRA_AO_ECC_66M_HCLK

#define CLK_INFRA_AO_ECC_66M_HCLK   40

CLK_INFRA_AO_FBIST2FPC

#define CLK_INFRA_AO_FBIST2FPC   71

CLK_INFRA_AO_FSSPM

#define CLK_INFRA_AO_FSSPM   53

CLK_INFRA_AO_GCE

#define CLK_INFRA_AO_GCE   6

CLK_INFRA_AO_GCE2

#define CLK_INFRA_AO_GCE2   7

CLK_INFRA_AO_GCE_26M

#define CLK_INFRA_AO_GCE_26M   20

CLK_INFRA_AO_GCPU

#define CLK_INFRA_AO_GCPU   66

CLK_INFRA_AO_GCPU_133M_BCLK

#define CLK_INFRA_AO_GCPU_133M_BCLK   69

CLK_INFRA_AO_GCPU_66M_BCLK

#define CLK_INFRA_AO_GCPU_66M_BCLK   68

CLK_INFRA_AO_HDMI_26M

#define CLK_INFRA_AO_HDMI_26M   23

CLK_INFRA_AO_HDMI_32K

#define CLK_INFRA_AO_HDMI_32K   33

CLK_INFRA_AO_I2S_DMA

#define CLK_INFRA_AO_I2S_DMA   62

CLK_INFRA_AO_IRTX

#define CLK_INFRA_AO_IRTX   46

CLK_INFRA_AO_MD_MSDC0

#define CLK_INFRA_AO_MD_MSDC0   64

CLK_INFRA_AO_MSDC0

#define CLK_INFRA_AO_MSDC0   25

CLK_INFRA_AO_MSDC0_SELF

#define CLK_INFRA_AO_MSDC0_SELF   59

CLK_INFRA_AO_MSDC0_SRC

#define CLK_INFRA_AO_MSDC0_SRC   28

CLK_INFRA_AO_MSDC1

#define CLK_INFRA_AO_MSDC1   26

CLK_INFRA_AO_MSDC1_SELF

#define CLK_INFRA_AO_MSDC1_SELF   60

CLK_INFRA_AO_MSDC1_SRC

#define CLK_INFRA_AO_MSDC1_SRC   36

CLK_INFRA_AO_MSDC2

#define CLK_INFRA_AO_MSDC2   27

CLK_INFRA_AO_MSDC2_SELF

#define CLK_INFRA_AO_MSDC2_SELF   61

CLK_INFRA_AO_MSDC30_2

#define CLK_INFRA_AO_MSDC30_2   65

CLK_INFRA_AO_NR_CLK

#define CLK_INFRA_AO_NR_CLK   78

CLK_INFRA_AO_PCIE_P1_PERI_26M

#define CLK_INFRA_AO_PCIE_P1_PERI_26M   73

CLK_INFRA_AO_PCIE_PERI_26M

#define CLK_INFRA_AO_PCIE_PERI_26M   67

CLK_INFRA_AO_PCIE_PL_P_250M_P0

#define CLK_INFRA_AO_PCIE_PL_P_250M_P0   76

CLK_INFRA_AO_PCIE_TL_26M

#define CLK_INFRA_AO_PCIE_TL_26M   35

CLK_INFRA_AO_PCIE_TL_32K

#define CLK_INFRA_AO_PCIE_TL_32K   43

CLK_INFRA_AO_PCIE_TL_96M

#define CLK_INFRA_AO_PCIE_TL_96M   38

CLK_INFRA_AO_PMIC_AP

#define CLK_INFRA_AO_PMIC_AP   1

CLK_INFRA_AO_PMIC_CONN

#define CLK_INFRA_AO_PMIC_CONN   3

CLK_INFRA_AO_PMIC_MD

#define CLK_INFRA_AO_PMIC_MD   2

CLK_INFRA_AO_PMIC_TMR

#define CLK_INFRA_AO_PMIC_TMR   0

CLK_INFRA_AO_PWM

#define CLK_INFRA_AO_PWM   14

CLK_INFRA_AO_PWM1

#define CLK_INFRA_AO_PWM1   10

CLK_INFRA_AO_PWM2

#define CLK_INFRA_AO_PWM2   11

CLK_INFRA_AO_PWM3

#define CLK_INFRA_AO_PWM3   12

CLK_INFRA_AO_PWM4

#define CLK_INFRA_AO_PWM4   13

CLK_INFRA_AO_PWM_HCLK

#define CLK_INFRA_AO_PWM_HCLK   9

CLK_INFRA_AO_RG_AES_MSDCFDE_CK_0P

#define CLK_INFRA_AO_RG_AES_MSDCFDE_CK_0P   77

CLK_INFRA_AO_SEJ

#define CLK_INFRA_AO_SEJ   4

CLK_INFRA_AO_SPI0

#define CLK_INFRA_AO_SPI0   24

CLK_INFRA_AO_SPI1

#define CLK_INFRA_AO_SPI1   50

CLK_INFRA_AO_SPI2

#define CLK_INFRA_AO_SPI2   51

CLK_INFRA_AO_SPI3

#define CLK_INFRA_AO_SPI3   52

CLK_INFRA_AO_SPI4

#define CLK_INFRA_AO_SPI4   56

CLK_INFRA_AO_SPI5

#define CLK_INFRA_AO_SPI5   57

CLK_INFRA_AO_SSPM_BUS_HCLK

#define CLK_INFRA_AO_SSPM_BUS_HCLK   54

CLK_INFRA_AO_THERM

#define CLK_INFRA_AO_THERM   8

CLK_INFRA_AO_TRNG

#define CLK_INFRA_AO_TRNG   30

CLK_INFRA_AO_UART0

#define CLK_INFRA_AO_UART0   15

CLK_INFRA_AO_UART1

#define CLK_INFRA_AO_UART1   16

CLK_INFRA_AO_UART2

#define CLK_INFRA_AO_UART2   17

CLK_INFRA_AO_UART3

#define CLK_INFRA_AO_UART3   18

CLK_INFRA_AO_UART4

#define CLK_INFRA_AO_UART4   19

CLK_INFRA_AO_UART5

#define CLK_INFRA_AO_UART5   22