Zephyr Project API 4.1.0
A Scalable Open Source RTOS
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stm32wl_clock.h
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1/*
2 * Copyright (c) 2022 Linaro Limited
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32WL_CLOCK_H_
7#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32WL_CLOCK_H_
8
10
12#define STM32_CLOCK_BUS_AHB1 0x048
13#define STM32_CLOCK_BUS_AHB2 0x04c
14#define STM32_CLOCK_BUS_AHB3 0x050
15#define STM32_CLOCK_BUS_APB1 0x058
16#define STM32_CLOCK_BUS_APB1_2 0x05c
17#define STM32_CLOCK_BUS_APB2 0x060
18#define STM32_CLOCK_BUS_APB3 0x064
19
20#define STM32_PERIPH_BUS_MIN STM32_CLOCK_BUS_AHB1
21#define STM32_PERIPH_BUS_MAX STM32_CLOCK_BUS_APB3
22
24/* RM0461, ยง6.4.29 Clock configuration register (RCC_CFGR3) */
25
26
28/* defined in stm32_common_clocks.h */
30/* Low speed clocks defined in stm32_common_clocks.h */
31#define STM32_SRC_HSI (STM32_SRC_LSI + 1)
32#define STM32_SRC_MSI (STM32_SRC_HSI + 1)
33/* #define STM32_SRC_HSI48 TBD */
35#define STM32_SRC_PCLK (STM32_SRC_MSI + 1)
37#define STM32_SRC_PLL_P (STM32_SRC_PCLK + 1)
38#define STM32_SRC_PLL_Q (STM32_SRC_PLL_P + 1)
39#define STM32_SRC_PLL_R (STM32_SRC_PLL_Q + 1)
40
42#define CCIPR_REG 0x88
43
45#define BDCR_REG 0x90
46
49#define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR_REG)
50#define USART2_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 2, CCIPR_REG)
51#define SPI2_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 8, CCIPR_REG)
52#define LPUART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 10, CCIPR_REG)
53#define I2C1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 12, CCIPR_REG)
54#define I2C2_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 14, CCIPR_REG)
55#define I2C3_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 16, CCIPR_REG)
56#define LPTIM1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 18, CCIPR_REG)
57#define LPTIM2_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 20, CCIPR_REG)
58#define LPTIM3_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 22, CCIPR_REG)
59#define ADC_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 28, CCIPR_REG)
60#define RNG_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 30, CCIPR_REG)
62#define RTC_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 8, BDCR_REG)
63
64#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32WL_CLOCK_H_ */