15#ifndef ZEPHYR_INCLUDE_ARCH_X86_ARCH_H_
16#define ZEPHYR_INCLUDE_ARCH_X86_ARCH_H_
23#define Z_X86_OOPS_VECTOR 32
25#if !defined(_ASMLANGUAGE)
42struct x86_msi_vector {
45#ifdef CONFIG_INTEL_VTD_ICTL
51typedef struct x86_msi_vector arch_msi_vector_t;
57 if ((key & 0x00000200U) != 0U) {
58 __asm__
volatile (
"sti" :::
"memory");
64 __asm__
volatile(
"outb %b0, %w1" ::
"a"(data),
"Nd"(port));
71 __asm__
volatile(
"inb %w1, %b0" :
"=a"(ret) :
"Nd"(port));
78 __asm__
volatile(
"outw %w0, %w1" ::
"a"(data),
"Nd"(port));
85 __asm__
volatile(
"inw %w1, %w0" :
"=a"(ret) :
"Nd"(port));
92 __asm__
volatile(
"outl %0, %w1" ::
"a"(data),
"Nd"(port));
99 __asm__
volatile(
"inl %w1, %0" :
"=a"(ret) :
"Nd"(port));
106 __asm__
volatile(
"movb %0, %1"
116 __asm__
volatile(
"movb %1, %0"
126 __asm__
volatile(
"movw %0, %1"
136 __asm__
volatile(
"movw %1, %0"
146 __asm__
volatile(
"movl %0, %1"
156 __asm__
volatile(
"movl %1, %0"
166 __asm__
volatile(
"btsl %1, %0"
167 :
"+m" (*(
volatile uint8_t *) (addr))
174 __asm__
volatile(
"btrl %1, %0"
175 :
"+m" (*(
volatile uint8_t *) (addr))
183 __asm__
volatile(
"btl %2, %1;"
185 :
"=r" (ret),
"+m" (*(
volatile uint8_t *) (addr))
196 __asm__
volatile(
"btsl %2, %1;"
198 :
"=r" (ret),
"+m" (*(
volatile uint8_t *) (addr))
209 __asm__
volatile(
"btrl %2, %1;"
211 :
"=r" (ret),
"+m" (*(
volatile uint8_t *) (addr))
217#define sys_bitfield_set_bit sys_set_bit
218#define sys_bitfield_clear_bit sys_clear_bit
219#define sys_bitfield_test_bit sys_test_bit
220#define sys_bitfield_test_and_set_bit sys_test_and_set_bit
221#define sys_bitfield_test_and_clear_bit sys_test_and_clear_bit
228extern unsigned char _irq_to_interrupt_vector[CONFIG_MAX_IRQ_LINES];
230#define Z_IRQ_TO_INTERRUPT_VECTOR(irq) \
231 ((unsigned int) _irq_to_interrupt_vector[(irq)])
277 return (key & 0x200) != 0;
288 __asm__
volatile(
"rdtsc" :
"=a" (rv) : :
"%edx");
298static inline uint64_t z_tsc_read(
void)
316 __asm__
volatile (
"lfence");
324 :
"%eax",
"%ebx",
"%ecx",
"%edx"
333 __asm__
volatile (
"rdtsc" :
"=a" (rv.lo),
"=d" (rv.hi));
336 __asm__
volatile (
"rdtsc" :
"=A" (rv.value));
344 __asm__
volatile(
"nop");
static ALWAYS_INLINE void arch_nop(void)
Definition arch.h:348
#define arch_irq_disable(irq)
Definition irq.h:44
#define arch_irq_enable(irq)
Definition irq.h:43
irp hi
Definition asm-macro-32-bit-gnu.h:10
Public interface for configuring interrupts.
static ALWAYS_INLINE void arch_irq_unlock(unsigned int key)
Definition arch.h:83
uint64_t sys_clock_cycle_get_64(void)
uint32_t sys_clock_cycle_get_32(void)
static uint32_t arch_k_cycle_get_32(void)
Definition arch.h:108
static uint64_t arch_k_cycle_get_64(void)
Definition arch.h:115
static ALWAYS_INLINE bool arch_irq_unlocked(unsigned int key)
Definition arch.h:96
Definitions of various linker Sections.
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT64_TYPE__ uint64_t
Definition stdint.h:91
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
__UINTPTR_TYPE__ uintptr_t
Definition stdint.h:105
__UINT16_TYPE__ uint16_t
Definition stdint.h:89
uint32_t io_port_t
Definition sys_io.h:19
uintptr_t mm_reg_t
Definition sys_io.h:20
uintptr_t mem_addr_t
Definition sys_io.h:21
static ALWAYS_INLINE int sys_test_and_set_bit(mem_addr_t addr, unsigned int bit)
Definition arch.h:191
static ALWAYS_INLINE void sys_set_bit(mem_addr_t addr, unsigned int bit)
Definition arch.h:164
static ALWAYS_INLINE uint8_t sys_in8(io_port_t port)
Definition arch.h:67
static ALWAYS_INLINE void sys_write8(uint8_t data, mm_reg_t addr)
Definition arch.h:104
static ALWAYS_INLINE void sys_clear_bit(mem_addr_t addr, unsigned int bit)
Definition arch.h:172
static ALWAYS_INLINE int sys_test_bit(mem_addr_t addr, unsigned int bit)
Definition arch.h:179
static ALWAYS_INLINE void sys_out8(uint8_t data, io_port_t port)
Definition arch.h:62
static ALWAYS_INLINE uint32_t sys_read32(mm_reg_t addr)
Definition arch.h:152
static ALWAYS_INLINE void sys_out16(uint16_t data, io_port_t port)
Definition arch.h:76
static ALWAYS_INLINE uint16_t sys_read16(mm_reg_t addr)
Definition arch.h:132
static ALWAYS_INLINE uint16_t sys_in16(io_port_t port)
Definition arch.h:81
static ALWAYS_INLINE void sys_write16(uint16_t data, mm_reg_t addr)
Definition arch.h:124
static ALWAYS_INLINE int sys_test_and_clear_bit(mem_addr_t addr, unsigned int bit)
Definition arch.h:204
static ALWAYS_INLINE uint8_t sys_read8(mm_reg_t addr)
Definition arch.h:112
static ALWAYS_INLINE void sys_out32(uint32_t data, io_port_t port)
Definition arch.h:90
static ALWAYS_INLINE void sys_write32(uint32_t data, mm_reg_t addr)
Definition arch.h:144
static ALWAYS_INLINE uint32_t sys_in32(io_port_t port)
Definition arch.h:95
IA-32 specific kernel interface header.
Intel-64 specific kernel interface header.