Zephyr Project API 4.1.99
A Scalable Open Source RTOS
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mspi.h
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1/*
2 * Copyright (c) 2025, Ambiq Micro Inc. <www.ambiq.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
14#ifndef ZEPHYR_INCLUDE_MSPI_H_
15#define ZEPHYR_INCLUDE_MSPI_H_
16
17#include <errno.h>
18
19#include <zephyr/sys/__assert.h>
20#include <zephyr/types.h>
21#include <zephyr/kernel.h>
22#include <zephyr/device.h>
23#include <zephyr/drivers/gpio.h>
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
43
51
74
91
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141
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159
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191
199
212
217#ifdef __cplusplus
218 /* For C++ compatibility. */
219 uint8_t dummy;
220#endif
221};
222
234
260
266 const struct device *bus;
269};
270
312
328
342
373
391
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447
457
467
475typedef void (*mspi_callback_handler_t)(struct mspi_callback_context *mspi_cb_ctx, ...);
476
482typedef int (*mspi_api_config)(const struct mspi_dt_spec *spec);
483
484typedef int (*mspi_api_dev_config)(const struct device *controller,
485 const struct mspi_dev_id *dev_id,
486 const enum mspi_dev_cfg_mask param_mask,
487 const struct mspi_dev_cfg *cfg);
488
489typedef int (*mspi_api_get_channel_status)(const struct device *controller, uint8_t ch);
490
491typedef int (*mspi_api_transceive)(const struct device *controller,
492 const struct mspi_dev_id *dev_id,
493 const struct mspi_xfer *req);
494
495typedef int (*mspi_api_register_callback)(const struct device *controller,
496 const struct mspi_dev_id *dev_id,
497 const enum mspi_bus_event evt_type,
499 struct mspi_callback_context *ctx);
500
501typedef int (*mspi_api_xip_config)(const struct device *controller,
502 const struct mspi_dev_id *dev_id,
503 const struct mspi_xip_cfg *xip_cfg);
504
505typedef int (*mspi_api_scramble_config)(const struct device *controller,
506 const struct mspi_dev_id *dev_id,
507 const struct mspi_scramble_cfg *scramble_cfg);
508
509typedef int (*mspi_api_timing_config)(const struct device *controller,
510 const struct mspi_dev_id *dev_id, const uint32_t param_mask,
511 void *timing_cfg);
512
523
550__syscall int mspi_config(const struct mspi_dt_spec *spec);
551
552static inline int z_impl_mspi_config(const struct mspi_dt_spec *spec)
553{
554 const struct mspi_driver_api *api = (const struct mspi_driver_api *)spec->bus->api;
555
556 return api->config(spec);
557}
558
586__syscall int mspi_dev_config(const struct device *controller,
587 const struct mspi_dev_id *dev_id,
588 const enum mspi_dev_cfg_mask param_mask,
589 const struct mspi_dev_cfg *cfg);
590
591static inline int z_impl_mspi_dev_config(const struct device *controller,
592 const struct mspi_dev_id *dev_id,
593 const enum mspi_dev_cfg_mask param_mask,
594 const struct mspi_dev_cfg *cfg)
595{
596 const struct mspi_driver_api *api = (const struct mspi_driver_api *)controller->api;
597
598 return api->dev_config(controller, dev_id, param_mask, cfg);
599}
600
612__syscall int mspi_get_channel_status(const struct device *controller, uint8_t ch);
613
614static inline int z_impl_mspi_get_channel_status(const struct device *controller, uint8_t ch)
615{
616 const struct mspi_driver_api *api = (const struct mspi_driver_api *)controller->api;
617
618 return api->get_channel_status(controller, ch);
619}
620
652__syscall int mspi_transceive(const struct device *controller,
653 const struct mspi_dev_id *dev_id,
654 const struct mspi_xfer *req);
655
656static inline int z_impl_mspi_transceive(const struct device *controller,
657 const struct mspi_dev_id *dev_id,
658 const struct mspi_xfer *req)
659{
660 const struct mspi_driver_api *api = (const struct mspi_driver_api *)controller->api;
661
662 if (!api->transceive) {
663 return -ENOTSUP;
664 }
665
666 return api->transceive(controller, dev_id, req);
667}
668
690__syscall int mspi_xip_config(const struct device *controller,
691 const struct mspi_dev_id *dev_id,
692 const struct mspi_xip_cfg *cfg);
693
694static inline int z_impl_mspi_xip_config(const struct device *controller,
695 const struct mspi_dev_id *dev_id,
696 const struct mspi_xip_cfg *cfg)
697{
698 const struct mspi_driver_api *api = (const struct mspi_driver_api *)controller->api;
699
700 if (!api->xip_config) {
701 return -ENOTSUP;
702 }
703
704 return api->xip_config(controller, dev_id, cfg);
705}
706
722__syscall int mspi_scramble_config(const struct device *controller,
723 const struct mspi_dev_id *dev_id,
724 const struct mspi_scramble_cfg *cfg);
725
726static inline int z_impl_mspi_scramble_config(const struct device *controller,
727 const struct mspi_dev_id *dev_id,
728 const struct mspi_scramble_cfg *cfg)
729{
730 const struct mspi_driver_api *api = (const struct mspi_driver_api *)controller->api;
731
732 if (!api->scramble_config) {
733 return -ENOTSUP;
734 }
735
736 return api->scramble_config(controller, dev_id, cfg);
737}
738
755__syscall int mspi_timing_config(const struct device *controller,
756 const struct mspi_dev_id *dev_id,
757 const uint32_t param_mask, void *cfg);
758
759static inline int z_impl_mspi_timing_config(const struct device *controller,
760 const struct mspi_dev_id *dev_id,
761 const uint32_t param_mask, void *cfg)
762{
763 const struct mspi_driver_api *api = (const struct mspi_driver_api *)controller->api;
764
765 if (!api->timing_config) {
766 return -ENOTSUP;
767 }
768
769 return api->timing_config(controller, dev_id, param_mask, cfg);
770}
771
794static inline int mspi_register_callback(const struct device *controller,
795 const struct mspi_dev_id *dev_id,
796 const enum mspi_bus_event evt_type,
798 struct mspi_callback_context *ctx)
799{
800 const struct mspi_driver_api *api = (const struct mspi_driver_api *)controller->api;
801
802 if (!api->register_callback) {
803 return -ENOTSUP;
804 }
805
806 return api->register_callback(controller, dev_id, evt_type, cb, ctx);
807}
808
811#ifdef __cplusplus
812}
813#endif
814
816
822
826#define MSPI_XIP_CFG_STRUCT_DECLARE(_name) \
827 IF_ENABLED(CONFIG_MSPI_XIP, (struct mspi_xip_cfg _name;))
828
832#define MSPI_XIP_BASE_ADDR_DECLARE(_name) \
833 IF_ENABLED(CONFIG_MSPI_XIP, (uint32_t _name;))
834
838#define MSPI_SCRAMBLE_CFG_STRUCT_DECLARE(_name) \
839 IF_ENABLED(CONFIG_MSPI_SCRAMBLE, (struct mspi_scramble_cfg _name;))
840
844#define MSPI_TIMING_CFG_STRUCT_DECLARE(_name) \
845 IF_ENABLED(CONFIG_MSPI_TIMING, (mspi_timing_cfg _name;))
846
850#define MSPI_TIMING_PARAM_DECLARE(_name) \
851 IF_ENABLED(CONFIG_MSPI_TIMING, (mspi_timing_param _name;))
852
856#define MSPI_OPTIONAL_CFG_STRUCT_INIT(code, _name, _object) \
857 IF_ENABLED(code, (._name = _object,))
858
862#define MSPI_XIP_BASE_ADDR_INIT(_name, _bus) \
863 IF_ENABLED(CONFIG_MSPI_XIP, (._name = DT_REG_ADDR_BY_IDX(_bus, 1),))
864
870#include <zephyr/syscalls/mspi.h>
871#endif /* ZEPHYR_INCLUDE_MSPI_H_ */
Public APIs for GPIO drivers.
System error numbers.
void(* mspi_callback_handler_t)(struct mspi_callback_context *mspi_cb_ctx,...)
Define the application callback handler function signature.
Definition mspi.h:475
static int mspi_register_callback(const struct device *controller, const struct mspi_dev_id *dev_id, const enum mspi_bus_event evt_type, mspi_callback_handler_t cb, struct mspi_callback_context *ctx)
Register the mspi callback functions.
Definition mspi.h:794
int mspi_config(const struct mspi_dt_spec *spec)
Configure a MSPI controller.
int mspi_get_channel_status(const struct device *controller, uint8_t ch)
Query to see if it a channel is ready.
mspi_timing_param
Stub for timing parameter.
Definition mspi.h:209
int mspi_dev_config(const struct device *controller, const struct mspi_dev_id *dev_id, const enum mspi_dev_cfg_mask param_mask, const struct mspi_dev_cfg *cfg)
Configure a MSPI controller with device specific parameters.
int mspi_xip_config(const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_xip_cfg *cfg)
Configure a MSPI XIP settings.
int mspi_scramble_config(const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_scramble_cfg *cfg)
Configure a MSPI scrambling settings.
int mspi_timing_config(const struct device *controller, const struct mspi_dev_id *dev_id, const uint32_t param_mask, void *cfg)
Configure a MSPI timing settings.
@ MSPI_TIMING_PARAM_DUMMY
Definition mspi.h:210
mspi_xip_permit
MSPI XIP access permissions.
Definition mspi.h:195
int(* mspi_api_scramble_config)(const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_scramble_cfg *scramble_cfg)
Definition mspi.h:505
mspi_xfer_mode
MSPI transfer modes.
Definition mspi.h:145
int(* mspi_api_transceive)(const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_xfer *req)
Definition mspi.h:491
mspi_duplex
MSPI duplex mode.
Definition mspi.h:47
mspi_ce_polarity
MSPI chip enable polarity.
Definition mspi.h:113
int(* mspi_api_config)(const struct mspi_dt_spec *spec)
MSPI driver API definition and system call entry points.
Definition mspi.h:482
mspi_endian
MSPI Endian.
Definition mspi.h:105
mspi_op_mode
MSPI operational mode.
Definition mspi.h:39
int(* mspi_api_timing_config)(const struct device *controller, const struct mspi_dev_id *dev_id, const uint32_t param_mask, void *timing_cfg)
Definition mspi.h:509
mspi_xfer_direction
MSPI transfer directions.
Definition mspi.h:163
mspi_bus_event
MSPI bus event.
Definition mspi.h:123
mspi_xfer_priority
MSPI transfer priority This is a preliminary list of priorities that are typically used with DMA.
Definition mspi.h:154
mspi_cpp_mode
MSPI Polarity & Phase Modes.
Definition mspi.h:95
mspi_dev_cfg_mask
MSPI controller device specific configuration mask.
Definition mspi.h:171
int(* mspi_api_dev_config)(const struct device *controller, const struct mspi_dev_id *dev_id, const enum mspi_dev_cfg_mask param_mask, const struct mspi_dev_cfg *cfg)
Definition mspi.h:484
int(* mspi_api_xip_config)(const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_xip_cfg *xip_cfg)
Definition mspi.h:501
mspi_io_mode
MSPI I/O mode capabilities Postfix like 1_4_4 stands for the number of lines used for command,...
Definition mspi.h:58
mspi_data_rate
MSPI data rate capabilities SINGLE stands for single data rate for all phases.
Definition mspi.h:84
mspi_bus_event_cb_mask
MSPI bus event callback mask This is a preliminary list same as mspi_bus_event.
Definition mspi.h:135
int(* mspi_api_register_callback)(const struct device *controller, const struct mspi_dev_id *dev_id, const enum mspi_bus_event evt_type, mspi_callback_handler_t cb, struct mspi_callback_context *ctx)
Definition mspi.h:495
int(* mspi_api_get_channel_status)(const struct device *controller, uint8_t ch)
Definition mspi.h:489
@ MSPI_XIP_READ_WRITE
Definition mspi.h:196
@ MSPI_XIP_READ_ONLY
Definition mspi.h:197
@ MSPI_DMA
Definition mspi.h:147
@ MSPI_PIO
Definition mspi.h:146
@ MSPI_FULL_DUPLEX
Definition mspi.h:49
@ MSPI_HALF_DUPLEX
Definition mspi.h:48
@ MSPI_CE_ACTIVE_HIGH
Definition mspi.h:115
@ MSPI_CE_ACTIVE_LOW
Definition mspi.h:114
@ MSPI_XFER_BIG_ENDIAN
Definition mspi.h:107
@ MSPI_XFER_LITTLE_ENDIAN
Definition mspi.h:106
@ MSPI_OP_MODE_PERIPHERAL
Definition mspi.h:41
@ MSPI_OP_MODE_CONTROLLER
Definition mspi.h:40
@ MSPI_RX
Definition mspi.h:164
@ MSPI_TX
Definition mspi.h:165
@ MSPI_BUS_EVENT_MAX
Definition mspi.h:127
@ MSPI_BUS_XFER_COMPLETE
Definition mspi.h:126
@ MSPI_BUS_ERROR
Definition mspi.h:125
@ MSPI_BUS_RESET
Definition mspi.h:124
@ MSPI_XFER_PRIORITY_HIGH
Definition mspi.h:157
@ MSPI_XFER_PRIORITY_LOW
Definition mspi.h:155
@ MSPI_XFER_PRIORITY_MEDIUM
Definition mspi.h:156
@ MSPI_CPP_MODE_3
Definition mspi.h:99
@ MSPI_CPP_MODE_1
Definition mspi.h:97
@ MSPI_CPP_MODE_2
Definition mspi.h:98
@ MSPI_CPP_MODE_0
Definition mspi.h:96
@ MSPI_DEVICE_CONFIG_CPP
Definition mspi.h:177
@ MSPI_DEVICE_CONFIG_DATA_RATE
Definition mspi.h:176
@ MSPI_DEVICE_CONFIG_RX_DUMMY
Definition mspi.h:181
@ MSPI_DEVICE_CONFIG_FREQUENCY
Definition mspi.h:174
@ MSPI_DEVICE_CONFIG_CMD_LEN
Definition mspi.h:185
@ MSPI_DEVICE_CONFIG_CE_NUM
Definition mspi.h:173
@ MSPI_DEVICE_CONFIG_IO_MODE
Definition mspi.h:175
@ MSPI_DEVICE_CONFIG_CE_POL
Definition mspi.h:179
@ MSPI_DEVICE_CONFIG_DQS
Definition mspi.h:180
@ MSPI_DEVICE_CONFIG_TX_DUMMY
Definition mspi.h:182
@ MSPI_DEVICE_CONFIG_ALL
Definition mspi.h:189
@ MSPI_DEVICE_CONFIG_WRITE_CMD
Definition mspi.h:184
@ MSPI_DEVICE_CONFIG_ADDR_LEN
Definition mspi.h:186
@ MSPI_DEVICE_CONFIG_ENDIAN
Definition mspi.h:178
@ MSPI_DEVICE_CONFIG_NONE
Definition mspi.h:172
@ MSPI_DEVICE_CONFIG_BREAK_TIME
Definition mspi.h:188
@ MSPI_DEVICE_CONFIG_MEM_BOUND
Definition mspi.h:187
@ MSPI_DEVICE_CONFIG_READ_CMD
Definition mspi.h:183
@ MSPI_IO_MODE_HEX
Definition mspi.h:69
@ MSPI_IO_MODE_QUAD_1_4_4
Definition mspi.h:65
@ MSPI_IO_MODE_OCTAL_1_8_8
Definition mspi.h:68
@ MSPI_IO_MODE_HEX_8_16_16
Definition mspi.h:71
@ MSPI_IO_MODE_SINGLE
Definition mspi.h:59
@ MSPI_IO_MODE_DUAL_1_1_2
Definition mspi.h:61
@ MSPI_IO_MODE_DUAL
Definition mspi.h:60
@ MSPI_IO_MODE_MAX
Definition mspi.h:72
@ MSPI_IO_MODE_DUAL_1_2_2
Definition mspi.h:62
@ MSPI_IO_MODE_QUAD_1_1_4
Definition mspi.h:64
@ MSPI_IO_MODE_OCTAL_1_1_8
Definition mspi.h:67
@ MSPI_IO_MODE_OCTAL
Definition mspi.h:66
@ MSPI_IO_MODE_HEX_8_8_16
Definition mspi.h:70
@ MSPI_IO_MODE_QUAD
Definition mspi.h:63
@ MSPI_DATA_RATE_SINGLE
Definition mspi.h:85
@ MSPI_DATA_RATE_S_S_D
Definition mspi.h:86
@ MSPI_DATA_RATE_MAX
Definition mspi.h:89
@ MSPI_DATA_RATE_S_D_D
Definition mspi.h:87
@ MSPI_DATA_RATE_DUAL
Definition mspi.h:88
@ MSPI_BUS_ERROR_CB
Definition mspi.h:138
@ MSPI_BUS_RESET_CB
Definition mspi.h:137
@ MSPI_BUS_XFER_COMPLETE_CB
Definition mspi.h:139
@ MSPI_BUS_NO_CB
Definition mspi.h:136
int mspi_transceive(const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_xfer *req)
Transfer request over MSPI.
#define BIT(n)
Unsigned integer with bit position n set (signed in assembly language).
Definition util_macro.h:44
#define BIT_MASK(n)
Bit mask with bits 0 through n-1 (inclusive) set, or 0 if n is 0.
Definition util_macro.h:68
#define ENOTSUP
Unsupported value.
Definition errno.h:114
Public kernel APIs.
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
__UINT16_TYPE__ uint16_t
Definition stdint.h:89
Runtime device structure (in ROM) per driver instance.
Definition device.h:504
const void * api
Address of the API structure exposed by the device instance.
Definition device.h:510
Container for GPIO pin information specified in devicetree.
Definition gpio.h:289
MSPI callback context.
Definition mspi.h:461
struct mspi_event mspi_evt
MSPI event
Definition mspi.h:463
void * ctx
user defined context
Definition mspi.h:465
MSPI Chip Select control structure.
Definition mspi.h:358
struct gpio_dt_spec gpio
GPIO devicetree specification of CE GPIO.
Definition mspi.h:365
uint32_t delay
Delay to wait.
Definition mspi.h:371
MSPI controller configuration.
Definition mspi.h:238
bool sw_multi_periph
Software managed multi peripheral enable.
Definition mspi.h:248
uint32_t num_ce_gpios
GPIO chip-select line numbers (optional)
Definition mspi.h:252
bool dqs_support
DQS support flag.
Definition mspi.h:246
struct gpio_dt_spec * ce_group
GPIO chip select lines (optional)
Definition mspi.h:250
enum mspi_duplex duplex
Configure duplex mode.
Definition mspi.h:244
uint32_t num_periph
Peripheral number from 0 to host controller peripheral limit.
Definition mspi.h:254
uint32_t max_freq
Maximum supported frequency in MHz.
Definition mspi.h:256
enum mspi_op_mode op_mode
Configure operation mode.
Definition mspi.h:242
uint8_t channel_num
mspi channel number
Definition mspi.h:240
bool re_init
Whether to re-initialize controller.
Definition mspi.h:258
MSPI controller device specific configuration.
Definition mspi.h:274
uint8_t cmd_length
Configure command length
Definition mspi.h:304
enum mspi_data_rate data_rate
Configure data rate.
Definition mspi.h:282
enum mspi_endian endian
Configure transfer endian.
Definition mspi.h:286
enum mspi_cpp_mode cpp
Configure clock polarity and phase.
Definition mspi.h:284
uint32_t mem_boundary
Configure memory boundary
Definition mspi.h:308
uint32_t time_to_break
Configure the time to break up a transfer into 2.
Definition mspi.h:310
uint8_t addr_length
Configure address length
Definition mspi.h:306
uint32_t freq
Configure frequency.
Definition mspi.h:278
uint16_t tx_dummy
Configure number of clock cycles between addr and data in TX direction.
Definition mspi.h:298
uint16_t rx_dummy
Configure number of clock cycles between addr and data in RX direction.
Definition mspi.h:294
enum mspi_ce_polarity ce_polarity
Configure chip enable polarity.
Definition mspi.h:288
uint8_t ce_num
Configure CE0 or CE1 or more.
Definition mspi.h:276
uint32_t read_cmd
Configure read command
Definition mspi.h:300
uint32_t write_cmd
Configure write command
Definition mspi.h:302
enum mspi_io_mode io_mode
Configure I/O mode.
Definition mspi.h:280
bool dqs_enable
Configure DQS mode.
Definition mspi.h:290
MSPI device ID The controller can identify its devices and determine whether the access is allowed in...
Definition mspi.h:228
uint16_t dev_idx
device index on DT
Definition mspi.h:232
struct gpio_dt_spec ce
device gpio ce
Definition mspi.h:230
Definition mspi.h:513
mspi_api_config config
Definition mspi.h:514
mspi_api_register_callback register_callback
Definition mspi.h:518
mspi_api_dev_config dev_config
Definition mspi.h:515
mspi_api_get_channel_status get_channel_status
Definition mspi.h:516
mspi_api_timing_config timing_config
Definition mspi.h:521
mspi_api_scramble_config scramble_config
Definition mspi.h:520
mspi_api_transceive transceive
Definition mspi.h:517
mspi_api_xip_config xip_config
Definition mspi.h:519
MSPI DT information.
Definition mspi.h:264
struct mspi_cfg config
MSPI hardware specific configuration.
Definition mspi.h:268
const struct device * bus
MSPI bus.
Definition mspi.h:266
MSPI event data.
Definition mspi.h:435
const struct mspi_xfer_packet * packet
Pointer to a transfer packet.
Definition mspi.h:441
uint32_t status
MSPI event status.
Definition mspi.h:443
uint32_t packet_idx
Packet index.
Definition mspi.h:445
const struct mspi_dev_id * dev_id
Pointer to the peripheral device ID.
Definition mspi.h:439
const struct device * controller
Pointer to the bus controller.
Definition mspi.h:437
MSPI event.
Definition mspi.h:451
enum mspi_bus_event evt_type
Event type.
Definition mspi.h:453
struct mspi_event_data evt_data
Data associated to the event.
Definition mspi.h:455
MSPI controller scramble configuration.
Definition mspi.h:332
bool enable
scramble enable
Definition mspi.h:334
uint32_t size
scramble region size
Definition mspi.h:340
uint32_t address_offset
scramble region start address = hardware default + address offset
Definition mspi.h:338
Stub for struct timing_cfg.
Definition mspi.h:216
MSPI peripheral xfer packet format.
Definition mspi.h:377
uint32_t num_bytes
Number of bytes to transfer
Definition mspi.h:387
uint32_t address
Transfer Address
Definition mspi.h:385
uint8_t * data_buf
Data Buffer
Definition mspi.h:389
uint32_t cmd
Transfer command
Definition mspi.h:383
enum mspi_bus_event_cb_mask cb_mask
Bus event callback masks
Definition mspi.h:381
enum mspi_xfer_direction dir
Direction (Transmit/Receive)
Definition mspi.h:379
MSPI peripheral xfer format This includes transfer related settings that may require configuring the ...
Definition mspi.h:397
bool hold_ce
Hold CE active after xfer
Definition mspi.h:411
uint8_t cmd_length
Configure command length
Definition mspi.h:407
uint32_t num_packet
Number of transfer packets
Definition mspi.h:419
const struct mspi_xfer_packet * packets
Transfer packets
Definition mspi.h:417
uint16_t rx_dummy
Configure RX dummy cycles
Definition mspi.h:405
enum mspi_xfer_priority priority
MSPI transfer priority
Definition mspi.h:415
bool async
Async or sync transfer
Definition mspi.h:399
uint8_t addr_length
Configure address length
Definition mspi.h:409
uint16_t tx_dummy
Configure TX dummy cycles
Definition mspi.h:403
struct mspi_ce_control ce_sw_ctrl
Software CE control
Definition mspi.h:413
enum mspi_xfer_mode xfer_mode
Transfer Mode
Definition mspi.h:401
uint32_t timeout
Transfer timeout value(ms)
Definition mspi.h:421
MSPI controller XIP configuration.
Definition mspi.h:316
enum mspi_xip_permit permission
XIP access permission.
Definition mspi.h:326
bool enable
XIP enable.
Definition mspi.h:318
uint32_t address_offset
XIP region start address = hardware default + address offset.
Definition mspi.h:322
uint32_t size
XIP region size.
Definition mspi.h:324
Macro utilities.