|
#define | STM32_CLOCK_CONTROL_NODE DT_NODELABEL(rcc) |
| Common clock control device node for all STM32 chips.
|
|
#define | STM32_AHB_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb_prescaler) |
| RCC node related symbols.
|
|
#define | STM32_APB1_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb1_prescaler) |
|
#define | STM32_APB2_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb2_prescaler) |
|
#define | STM32_APB3_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb3_prescaler) |
|
#define | STM32_APB5_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb5_prescaler) |
|
#define | STM32_APB7_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb7_prescaler) |
|
#define | STM32_AHB3_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb3_prescaler) |
|
#define | STM32_AHB4_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb4_prescaler) |
|
#define | STM32_AHB5_PRESCALER DT_PROP_OR(DT_NODELABEL(rcc), ahb5_prescaler, 1) |
|
#define | STM32_CPU1_PRESCALER DT_PROP(DT_NODELABEL(rcc), cpu1_prescaler) |
|
#define | STM32_CPU2_PRESCALER DT_PROP(DT_NODELABEL(rcc), cpu2_prescaler) |
|
#define | STM32_FLASH_PRESCALER STM32_CORE_PRESCALER |
|
#define | STM32_ADC_PRESCALER DT_PROP(DT_NODELABEL(rcc), adc_prescaler) |
|
#define | STM32_ADC12_PRESCALER DT_PROP(DT_NODELABEL(rcc), adc12_prescaler) |
|
#define | STM32_ADC34_PRESCALER DT_PROP(DT_NODELABEL(rcc), adc34_prescaler) |
|
#define | STM32_D1CPRE DT_PROP(DT_NODELABEL(rcc), d1cpre) |
| STM2H7RS specific RCC dividers.
|
|
#define | STM32_HPRE DT_PROP(DT_NODELABEL(rcc), hpre) |
|
#define | STM32_D2PPRE1 DT_PROP(DT_NODELABEL(rcc), d2ppre1) |
|
#define | STM32_D2PPRE2 DT_PROP(DT_NODELABEL(rcc), d2ppre2) |
|
#define | STM32_D1PPRE DT_PROP(DT_NODELABEL(rcc), d1ppre) |
|
#define | STM32_D3PPRE DT_PROP(DT_NODELABEL(rcc), d3ppre) |
|
#define | STM32_AHB5_DIV DT_PROP(DT_NODELABEL(rcc), ahb5_div) |
| STM2WBA specifics RCC dividers.
|
|
#define | DT_RCC_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(rcc)) |
|
#define | STM32_LSE_ENABLED 0 |
| PLL node related symbols.
|
|
#define | STM32_LSE_FREQ 0 |
|
#define | STM32_LSE_DRIVING 0 |
|
#define | STM32_LSE_BYPASS 0 |
|
#define | STM32_MSIS_ENABLED 0 |
|
#define | STM32_MSIS_RANGE 0 |
|
#define | STM32_MSIS_PLL_MODE 0 |
|
#define | STM32_MSIK_ENABLED 0 |
|
#define | STM32_MSIK_RANGE 0 |
|
#define | STM32_MSIK_PLL_MODE 0 |
|
#define | STM32_CSI_FREQ 0 |
|
#define | STM32_LSI_FREQ 0 |
|
#define | STM32_HSI_DIV_ENABLED 0 |
|
#define | STM32_HSI_DIVISOR 1 |
|
#define | STM32_HSI_FREQ 0 |
|
#define | STM32_HSE_FREQ 0 |
|
#define | STM32_CLOCK_INFO(clk_index, node_id) |
| Device tree clocks helpers
|
|
#define | STM32_DT_CLOCKS(node_id) |
|
#define | STM32_DT_INST_CLOCKS(inst) STM32_DT_CLOCKS(DT_DRV_INST(inst)) |
|
#define | STM32_DOMAIN_CLOCK_INST_SUPPORT(inst) DT_INST_CLOCKS_HAS_IDX(inst, 1) || |
|
#define | STM32_DT_INST_DEV_DOMAIN_CLOCK_SUPPORT (DT_INST_FOREACH_STATUS_OKAY(STM32_DOMAIN_CLOCK_INST_SUPPORT) 0) |
|
#define | STM32_DOMAIN_CLOCK_SUPPORT(id) DT_CLOCKS_HAS_IDX(DT_NODELABEL(id), 1) || |
|
#define | STM32_DT_DEV_DOMAIN_CLOCK_SUPPORT (DT_FOREACH_STATUS_OKAY(STM32_DOMAIN_CLOCK_SUPPORT) 0) |
|
#define | STM32_CLOCK_REG_GET(clock) (((clock) >> STM32_CLOCK_REG_SHIFT) & STM32_CLOCK_REG_MASK) |
| Clock source binding accessors.
|
|
#define | STM32_CLOCK_SHIFT_GET(clock) (((clock) >> STM32_CLOCK_SHIFT_SHIFT) & STM32_CLOCK_SHIFT_MASK) |
| Obtain position field from clock configuration.
|
|
#define | STM32_CLOCK_MASK_GET(clock) (((clock) >> STM32_CLOCK_MASK_SHIFT) & STM32_CLOCK_MASK_MASK) |
| Obtain mask field from clock configuration.
|
|
#define | STM32_CLOCK_VAL_GET(clock) (((clock) >> STM32_CLOCK_VAL_SHIFT) & STM32_CLOCK_VAL_MASK) |
| Obtain value field from clock configuration.
|
|
#define | STM32_MCO_CFGR_REG_GET(mco_cfgr) (((mco_cfgr) >> STM32_MCO_CFGR_REG_SHIFT) & STM32_MCO_CFGR_REG_MASK) |
| Obtain register field from MCO configuration.
|
|
#define | STM32_MCO_CFGR_SHIFT_GET(mco_cfgr) (((mco_cfgr) >> STM32_MCO_CFGR_SHIFT_SHIFT) & STM32_MCO_CFGR_SHIFT_MASK) |
| Obtain position field from MCO configuration.
|
|
#define | STM32_MCO_CFGR_MASK_GET(mco_cfgr) (((mco_cfgr) >> STM32_MCO_CFGR_MASK_SHIFT) & STM32_MCO_CFGR_MASK_MASK) |
| Obtain mask field from MCO configuration.
|
|
#define | STM32_MCO_CFGR_VAL_GET(mco_cfgr) (((mco_cfgr) >> STM32_MCO_CFGR_VAL_SHIFT) & STM32_MCO_CFGR_VAL_MASK) |
| Obtain value field from MCO configuration.
|
|