Zephyr Project API 4.2.0
A Scalable Open Source RTOS
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stm32_clock_control.h
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1/*
2 * Copyright (c) 2016 Open-RnD Sp. z o.o.
3 * Copyright (c) 2016 BayLibre, SAS
4 * Copyright (c) 2017-2022 Linaro Limited.
5 * Copyright (c) 2017 RnDity Sp. z o.o.
6 * Copyright (c) 2023 STMicroelectronics
7 *
8 * SPDX-License-Identifier: Apache-2.0
9 */
10#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_STM32_CLOCK_CONTROL_H_
11#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_STM32_CLOCK_CONTROL_H_
12
13#include <zephyr/drivers/clock_control.h>
14
15#if defined(CONFIG_SOC_SERIES_STM32C0X)
16#include <zephyr/dt-bindings/clock/stm32c0_clock.h>
17#elif defined(CONFIG_SOC_SERIES_STM32F0X)
18#include <zephyr/dt-bindings/clock/stm32f0_clock.h>
19#elif defined(CONFIG_SOC_SERIES_STM32F1X)
20#if defined(CONFIG_SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE)
21#include <zephyr/dt-bindings/clock/stm32f10x_clock.h>
22#else
23#include <zephyr/dt-bindings/clock/stm32f1_clock.h>
24#endif
25#elif defined(CONFIG_SOC_SERIES_STM32F3X)
26#include <zephyr/dt-bindings/clock/stm32f3_clock.h>
27#elif defined(CONFIG_SOC_SERIES_STM32F2X) || \
28 defined(CONFIG_SOC_SERIES_STM32F4X)
29#include <zephyr/dt-bindings/clock/stm32f4_clock.h>
30#include <zephyr/dt-bindings/clock/stm32f410_clock.h>
31#elif defined(CONFIG_SOC_SERIES_STM32F7X)
32#include <zephyr/dt-bindings/clock/stm32f7_clock.h>
33#elif defined(CONFIG_SOC_SERIES_STM32G0X)
34#include <zephyr/dt-bindings/clock/stm32g0_clock.h>
35#elif defined(CONFIG_SOC_SERIES_STM32G4X)
36#include <zephyr/dt-bindings/clock/stm32g4_clock.h>
37#elif defined(CONFIG_SOC_SERIES_STM32L0X)
38#include <zephyr/dt-bindings/clock/stm32l0_clock.h>
39#elif defined(CONFIG_SOC_SERIES_STM32L1X)
40#include <zephyr/dt-bindings/clock/stm32l1_clock.h>
41#elif defined(CONFIG_SOC_SERIES_STM32L4X) || \
42 defined(CONFIG_SOC_SERIES_STM32L5X)
43#include <zephyr/dt-bindings/clock/stm32l4_clock.h>
44#elif defined(CONFIG_SOC_SERIES_STM32MP2X)
45#include <zephyr/dt-bindings/clock/stm32mp2_clock.h>
46#elif defined(CONFIG_SOC_SERIES_STM32WBX)
47#include <zephyr/dt-bindings/clock/stm32wb_clock.h>
48#elif defined(CONFIG_SOC_SERIES_STM32WB0X)
49#include <zephyr/dt-bindings/clock/stm32wb0_clock.h>
50#elif defined(CONFIG_SOC_SERIES_STM32WLX)
51#include <zephyr/dt-bindings/clock/stm32wl_clock.h>
52#elif defined(CONFIG_SOC_SERIES_STM32H5X)
53#include <zephyr/dt-bindings/clock/stm32h5_clock.h>
54#elif defined(CONFIG_SOC_SERIES_STM32H7X)
55#include <zephyr/dt-bindings/clock/stm32h7_clock.h>
56#elif defined(CONFIG_SOC_SERIES_STM32H7RSX)
57#include <zephyr/dt-bindings/clock/stm32h7rs_clock.h>
58#elif defined(CONFIG_SOC_SERIES_STM32MP13X)
59#include <zephyr/dt-bindings/clock/stm32mp13_clock.h>
60#elif defined(CONFIG_SOC_SERIES_STM32N6X)
61#include <zephyr/dt-bindings/clock/stm32n6_clock.h>
62#elif defined(CONFIG_SOC_SERIES_STM32U0X)
63#include <zephyr/dt-bindings/clock/stm32u0_clock.h>
64#elif defined(CONFIG_SOC_SERIES_STM32U3X)
65#include <zephyr/dt-bindings/clock/stm32u3_clock.h>
66#elif defined(CONFIG_SOC_SERIES_STM32U5X)
67#include <zephyr/dt-bindings/clock/stm32u5_clock.h>
68#elif defined(CONFIG_SOC_SERIES_STM32WBAX)
69#include <zephyr/dt-bindings/clock/stm32wba_clock.h>
70#else
71#include <zephyr/dt-bindings/clock/stm32_clock.h>
72#endif
73
75#define STM32_CLOCK_CONTROL_NODE DT_NODELABEL(rcc)
76
79#define STM32_AHB_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb_prescaler)
80#define STM32_APB1_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb1_prescaler)
81#define STM32_APB2_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb2_prescaler)
82#define STM32_APB3_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb3_prescaler)
83#define STM32_APB4_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb4_prescaler)
84#define STM32_APB5_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb5_prescaler)
85#define STM32_APB7_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb7_prescaler)
86#define STM32_AHB3_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb3_prescaler)
87#define STM32_AHB4_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb4_prescaler)
88#define STM32_AHB5_PRESCALER DT_PROP_OR(DT_NODELABEL(rcc), ahb5_prescaler, 1)
89#define STM32_CPU1_PRESCALER DT_PROP(DT_NODELABEL(rcc), cpu1_prescaler)
90#define STM32_CPU2_PRESCALER DT_PROP(DT_NODELABEL(rcc), cpu2_prescaler)
91
92#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), ahb_prescaler)
93#define STM32_CORE_PRESCALER STM32_AHB_PRESCALER
94#elif DT_NODE_HAS_PROP(DT_NODELABEL(rcc), cpu1_prescaler)
95#define STM32_CORE_PRESCALER STM32_CPU1_PRESCALER
96#endif
97
98#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), ahb3_prescaler)
99#define STM32_FLASH_PRESCALER STM32_AHB3_PRESCALER
100#elif DT_NODE_HAS_PROP(DT_NODELABEL(rcc), ahb4_prescaler)
101#define STM32_FLASH_PRESCALER STM32_AHB4_PRESCALER
102#else
103#define STM32_FLASH_PRESCALER STM32_CORE_PRESCALER
104#endif
105
106#define STM32_ADC_PRESCALER DT_PROP(DT_NODELABEL(rcc), adc_prescaler)
107#define STM32_ADC12_PRESCALER DT_PROP(DT_NODELABEL(rcc), adc12_prescaler)
108#define STM32_ADC34_PRESCALER DT_PROP(DT_NODELABEL(rcc), adc34_prescaler)
109
111#if defined(CONFIG_SOC_SERIES_STM32H7RSX)
112#define STM32_D1CPRE DT_PROP(DT_NODELABEL(rcc), dcpre)
113#define STM32_HPRE DT_PROP(DT_NODELABEL(rcc), hpre)
114#define STM32_PPRE1 DT_PROP(DT_NODELABEL(rcc), ppre1)
115#define STM32_PPRE2 DT_PROP(DT_NODELABEL(rcc), ppre2)
116#define STM32_PPRE4 DT_PROP(DT_NODELABEL(rcc), ppre4)
117#define STM32_PPRE5 DT_PROP(DT_NODELABEL(rcc), ppre5)
118#else
119#define STM32_D1CPRE DT_PROP(DT_NODELABEL(rcc), d1cpre)
120#define STM32_HPRE DT_PROP(DT_NODELABEL(rcc), hpre)
121#define STM32_D2PPRE1 DT_PROP(DT_NODELABEL(rcc), d2ppre1)
122#define STM32_D2PPRE2 DT_PROP(DT_NODELABEL(rcc), d2ppre2)
123#define STM32_D1PPRE DT_PROP(DT_NODELABEL(rcc), d1ppre)
124#define STM32_D3PPRE DT_PROP(DT_NODELABEL(rcc), d3ppre)
125#endif /* CONFIG_SOC_SERIES_STM32H7RSX */
126
128#define STM32_AHB5_DIV DT_PROP(DT_NODELABEL(rcc), ahb5_div)
129
130#define DT_RCC_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(rcc))
131
132/* To enable use of IS_ENABLED utility macro, these symbols
133 * should not be defined directly using DT_SAME_NODE.
134 */
135#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(pll))
136#define STM32_SYSCLK_SRC_PLL 1
137#endif
138#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
139#define STM32_SYSCLK_SRC_HSI 1
140#endif
141#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
142#define STM32_SYSCLK_SRC_HSE 1
143#endif
144#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_msi))
145#define STM32_SYSCLK_SRC_MSI 1
146#endif
147#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_msis))
148#define STM32_SYSCLK_SRC_MSIS 1
149#endif
150#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_csi))
151#define STM32_SYSCLK_SRC_CSI 1
152#endif
153#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(ic2))
154#define STM32_SYSCLK_SRC_IC2 1
155#endif
156
157#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(rcc), st_stm32n6_rcc, okay)
158#if (DT_SAME_NODE(DT_CLOCKS_CTLR_BY_IDX(DT_NODELABEL(cpusw), 0), DT_NODELABEL(rcc)))
159#if (DT_CLOCKS_CELL_BY_IDX(DT_NODELABEL(cpusw), 0, bus) == STM32_SRC_HSI)
160#define STM32_CPUCLK_SRC_HSI 1
161#elif (DT_CLOCKS_CELL_BY_IDX(DT_NODELABEL(cpusw), 0, bus) == STM32_SRC_MSI)
162#define STM32_CPUCLK_SRC_MSI 1
163#elif (DT_CLOCKS_CELL_BY_IDX(DT_NODELABEL(cpusw), 0, bus) == STM32_SRC_HSE)
164#define STM32_CPUCLK_SRC_HSE 1
165#elif (DT_CLOCKS_CELL_BY_IDX(DT_NODELABEL(cpusw), 0, bus) == STM32_SRC_IC1)
166#define STM32_CPUCLK_SRC_IC1 1
167#endif
168#endif /* cpusw clk source is rcc */
169
170#define STM32_TIMG_PRESCALER DT_PROP(DT_NODELABEL(rcc), timg_prescaler)
171#endif /* rcc node compatible st_stm32n6_rcc and okay */
172
175#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f2_pll_clock, okay) || \
176 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f4_pll_clock, okay) || \
177 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f7_pll_clock, okay) || \
178 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32g0_pll_clock, okay) || \
179 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32g4_pll_clock, okay) || \
180 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32l4_pll_clock, okay) || \
181 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32u0_pll_clock, okay) || \
182 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32u5_pll_clock, okay) || \
183 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32wb_pll_clock, okay) || \
184 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32wba_pll_clock, okay) || \
185 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32h7_pll_clock, okay) || \
186 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32h7rs_pll_clock, okay) || \
187 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32mp13_pll_clock, okay)
188#define STM32_PLL_ENABLED 1
189#define STM32_PLL_M_DIVISOR DT_PROP(DT_NODELABEL(pll), div_m)
190#define STM32_PLL_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul_n)
191#define STM32_PLL_P_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll), div_p)
192#define STM32_PLL_P_DIVISOR DT_PROP_OR(DT_NODELABEL(pll), div_p, 1)
193#define STM32_PLL_Q_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll), div_q)
194#define STM32_PLL_Q_DIVISOR DT_PROP_OR(DT_NODELABEL(pll), div_q, 1)
195#define STM32_PLL_R_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll), div_r)
196#define STM32_PLL_R_DIVISOR DT_PROP_OR(DT_NODELABEL(pll), div_r, 1)
197#define STM32_PLL_S_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll), div_s)
198#define STM32_PLL_S_DIVISOR DT_PROP_OR(DT_NODELABEL(pll), div_s, 1)
199#define STM32_PLL_FRACN_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll), fracn)
200#define STM32_PLL_FRACN_VALUE DT_PROP_OR(DT_NODELABEL(pll), fracn, 1)
201#endif
202
203#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(plli2s), st_stm32f4_plli2s_clock, okay)
204#define STM32_PLLI2S_ENABLED 1
205#define STM32_PLLI2S_M_DIVISOR STM32_PLL_M_DIVISOR
206#define STM32_PLLI2S_N_MULTIPLIER DT_PROP(DT_NODELABEL(plli2s), mul_n)
207#define STM32_PLLI2S_R_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(plli2s), div_r)
208#define STM32_PLLI2S_R_DIVISOR DT_PROP_OR(DT_NODELABEL(plli2s), div_r, 1)
209#endif
210
211#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(plli2s), st_stm32f411_plli2s_clock, okay)
212#define STM32_PLLI2S_ENABLED 1
213#define STM32_PLLI2S_M_DIVISOR DT_PROP(DT_NODELABEL(plli2s), div_m)
214#define STM32_PLLI2S_N_MULTIPLIER DT_PROP(DT_NODELABEL(plli2s), mul_n)
215#define STM32_PLLI2S_Q_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(plli2s), div_q)
216#define STM32_PLLI2S_Q_DIVISOR DT_PROP_OR(DT_NODELABEL(plli2s), div_q, 1)
217#define STM32_PLLI2S_R_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(plli2s), div_r)
218#define STM32_PLLI2S_R_DIVISOR DT_PROP_OR(DT_NODELABEL(plli2s), div_r, 1)
219#endif
220
221#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll2), st_stm32u5_pll_clock, okay) || \
222 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll2), st_stm32h7_pll_clock, okay) || \
223 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll2), st_stm32h7rs_pll_clock, okay) || \
224 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll2), st_stm32mp13_pll_clock, okay)
225#define STM32_PLL2_ENABLED 1
226#define STM32_PLL2_M_DIVISOR DT_PROP(DT_NODELABEL(pll2), div_m)
227#define STM32_PLL2_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll2), mul_n)
228#define STM32_PLL2_P_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll2), div_p)
229#define STM32_PLL2_P_DIVISOR DT_PROP_OR(DT_NODELABEL(pll2), div_p, 1)
230#define STM32_PLL2_Q_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll2), div_q)
231#define STM32_PLL2_Q_DIVISOR DT_PROP_OR(DT_NODELABEL(pll2), div_q, 1)
232#define STM32_PLL2_R_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll2), div_r)
233#define STM32_PLL2_R_DIVISOR DT_PROP_OR(DT_NODELABEL(pll2), div_r, 1)
234#define STM32_PLL2_S_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll2), div_s)
235#define STM32_PLL2_S_DIVISOR DT_PROP_OR(DT_NODELABEL(pll2), div_s, 1)
236#define STM32_PLL2_T_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll2), div_t)
237#define STM32_PLL2_T_DIVISOR DT_PROP_OR(DT_NODELABEL(pll2), div_t, 1)
238#define STM32_PLL2_FRACN_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll2), fracn)
239#define STM32_PLL2_FRACN_VALUE DT_PROP_OR(DT_NODELABEL(pll2), fracn, 1)
240#endif
241
242#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll3), st_stm32h7_pll_clock, okay) || \
243 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll3), st_stm32u5_pll_clock, okay) || \
244 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll3), st_stm32h7rs_pll_clock, okay) || \
245 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll3), st_stm32mp13_pll_clock, okay)
246#define STM32_PLL3_ENABLED 1
247#define STM32_PLL3_M_DIVISOR DT_PROP(DT_NODELABEL(pll3), div_m)
248#define STM32_PLL3_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll3), mul_n)
249#define STM32_PLL3_P_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll3), div_p)
250#define STM32_PLL3_P_DIVISOR DT_PROP_OR(DT_NODELABEL(pll3), div_p, 1)
251#define STM32_PLL3_Q_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll3), div_q)
252#define STM32_PLL3_Q_DIVISOR DT_PROP_OR(DT_NODELABEL(pll3), div_q, 1)
253#define STM32_PLL3_R_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll3), div_r)
254#define STM32_PLL3_R_DIVISOR DT_PROP_OR(DT_NODELABEL(pll3), div_r, 1)
255#define STM32_PLL3_S_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll3), div_s)
256#define STM32_PLL3_S_DIVISOR DT_PROP_OR(DT_NODELABEL(pll3), div_s, 1)
257#define STM32_PLL3_FRACN_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll3), fracn)
258#define STM32_PLL3_FRACN_VALUE DT_PROP_OR(DT_NODELABEL(pll3), fracn, 1)
259#endif
260
261#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll4), st_stm32mp13_pll_clock, okay)
262#define STM32_PLL4_ENABLED 1
263#define STM32_PLL4_M_DIVISOR DT_PROP(DT_NODELABEL(pll4), div_m)
264#define STM32_PLL4_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll4), mul_n)
265#define STM32_PLL4_P_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll4), div_p)
266#define STM32_PLL4_P_DIVISOR DT_PROP_OR(DT_NODELABEL(pll4), div_p, 1)
267#define STM32_PLL4_Q_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll4), div_q)
268#define STM32_PLL4_Q_DIVISOR DT_PROP_OR(DT_NODELABEL(pll4), div_q, 1)
269#define STM32_PLL4_R_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll4), div_r)
270#define STM32_PLL4_R_DIVISOR DT_PROP_OR(DT_NODELABEL(pll4), div_r, 1)
271#define STM32_PLL4_FRACN_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll4), fracn)
272#define STM32_PLL4_FRACN_VALUE DT_PROP_OR(DT_NODELABEL(pll4), fracn, 1)
273#endif
274
275#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay)
276#define STM32_PLL_ENABLED 1
277#define STM32_PLL_XTPRE DT_PROP(DT_NODELABEL(pll), xtpre)
278#define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul)
279#define STM32_PLL_USBPRE DT_PROP(DT_NODELABEL(pll), usbpre)
280#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f0_pll_clock, okay) || \
281 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f100_pll_clock, okay) || \
282 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f105_pll_clock, okay)
283#define STM32_PLL_ENABLED 1
284#define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul)
285#define STM32_PLL_PREDIV DT_PROP(DT_NODELABEL(pll), prediv)
286#define STM32_PLL_USBPRE DT_PROP(DT_NODELABEL(pll), otgfspre)
287#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32l0_pll_clock, okay)
288#define STM32_PLL_ENABLED 1
289#define STM32_PLL_DIVISOR DT_PROP(DT_NODELABEL(pll), div)
290#define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul)
291#endif
292
293#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll2), st_stm32f105_pll2_clock, okay)
294#define STM32_PLL2_ENABLED 1
295#define STM32_PLL2_MULTIPLIER DT_PROP(DT_NODELABEL(pll2), mul)
296#define STM32_PLL2_PREDIV DT_PROP(DT_NODELABEL(pll2), prediv)
297#endif
298
299#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll1), st_stm32n6_pll_clock, okay)
300#define STM32_PLL1_ENABLED 1
301#define STM32_PLL1_M_DIVISOR DT_PROP(DT_NODELABEL(pll1), div_m)
302#define STM32_PLL1_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll1), mul_n)
303#define STM32_PLL1_P1_DIVISOR DT_PROP(DT_NODELABEL(pll1), div_p1)
304#define STM32_PLL1_P2_DIVISOR DT_PROP(DT_NODELABEL(pll1), div_p2)
305#endif
306
307#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll2), st_stm32n6_pll_clock, okay)
308#define STM32_PLL2_ENABLED 1
309#define STM32_PLL2_M_DIVISOR DT_PROP(DT_NODELABEL(pll2), div_m)
310#define STM32_PLL2_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll2), mul_n)
311#define STM32_PLL2_P1_DIVISOR DT_PROP(DT_NODELABEL(pll2), div_p1)
312#define STM32_PLL2_P2_DIVISOR DT_PROP(DT_NODELABEL(pll2), div_p2)
313#endif
314
315#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll3), st_stm32n6_pll_clock, okay)
316#define STM32_PLL3_ENABLED 1
317#define STM32_PLL3_M_DIVISOR DT_PROP(DT_NODELABEL(pll3), div_m)
318#define STM32_PLL3_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll3), mul_n)
319#define STM32_PLL3_P1_DIVISOR DT_PROP(DT_NODELABEL(pll3), div_p1)
320#define STM32_PLL3_P2_DIVISOR DT_PROP(DT_NODELABEL(pll3), div_p2)
321#endif
322
323#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll4), st_stm32n6_pll_clock, okay)
324#define STM32_PLL4_ENABLED 1
325#define STM32_PLL4_M_DIVISOR DT_PROP(DT_NODELABEL(pll4), div_m)
326#define STM32_PLL4_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll4), mul_n)
327#define STM32_PLL4_P1_DIVISOR DT_PROP(DT_NODELABEL(pll4), div_p1)
328#define STM32_PLL4_P2_DIVISOR DT_PROP(DT_NODELABEL(pll4), div_p2)
329#endif
330
332#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(pll)) && \
333 DT_NODE_HAS_PROP(DT_NODELABEL(pll), clocks)
334#define DT_PLL_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(pll))
335#if DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_msi))
336#define STM32_PLL_SRC_MSI 1
337#endif
338#if DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_msis))
339#define STM32_PLL_SRC_MSIS 1
340#endif
341#if DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
342#define STM32_PLL_SRC_HSI 1
343#endif
344#if DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_csi))
345#define STM32_PLL_SRC_CSI 1
346#endif
347#if DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
348#define STM32_PLL_SRC_HSE 1
349#endif
350#if DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(pll2))
351#define STM32_PLL_SRC_PLL2 1
352#endif
353
354#endif
355
357#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(pll2)) && \
358 DT_NODE_HAS_PROP(DT_NODELABEL(pll2), clocks)
359#define DT_PLL2_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(pll2))
360#if DT_SAME_NODE(DT_PLL2_CLOCKS_CTRL, DT_NODELABEL(clk_msi))
361#define STM32_PLL2_SRC_MSI 1
362#endif
363#if DT_SAME_NODE(DT_PLL2_CLOCKS_CTRL, DT_NODELABEL(clk_msis))
364#define STM32_PLL2_SRC_MSIS 1
365#endif
366#if DT_SAME_NODE(DT_PLL2_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
367#define STM32_PLL2_SRC_HSI 1
368#endif
369#if DT_SAME_NODE(DT_PLL2_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
370#define STM32_PLL2_SRC_HSE 1
371#endif
372
373#endif
374
376#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(pll3)) && \
377 DT_NODE_HAS_PROP(DT_NODELABEL(pll3), clocks)
378#define DT_PLL3_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(pll3))
379#if DT_SAME_NODE(DT_PLL3_CLOCKS_CTRL, DT_NODELABEL(clk_msi))
380#define STM32_PLL3_SRC_MSI 1
381#endif
382#if DT_SAME_NODE(DT_PLL3_CLOCKS_CTRL, DT_NODELABEL(clk_msis))
383#define STM32_PLL3_SRC_MSIS 1
384#endif
385#if DT_SAME_NODE(DT_PLL3_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
386#define STM32_PLL3_SRC_HSI 1
387#endif
388#if DT_SAME_NODE(DT_PLL3_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
389#define STM32_PLL3_SRC_HSE 1
390#endif
391
392#endif
393
395#if DT_NODE_HAS_STATUS(DT_NODELABEL(pll4), okay) && \
396 DT_NODE_HAS_PROP(DT_NODELABEL(pll4), clocks)
397#define DT_PLL4_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(pll4))
398#if DT_SAME_NODE(DT_PLL4_CLOCKS_CTRL, DT_NODELABEL(clk_msi))
399#define STM32_PLL4_SRC_MSI 1
400#endif
401#if DT_SAME_NODE(DT_PLL4_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
402#define STM32_PLL4_SRC_HSI 1
403#endif
404#if DT_SAME_NODE(DT_PLL4_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
405#define STM32_PLL4_SRC_HSE 1
406#endif
407
408#endif
409
410
413#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_lse), fixed_clock, okay)
414#define STM32_LSE_ENABLED 1
415#define STM32_LSE_FREQ DT_PROP(DT_NODELABEL(clk_lse), clock_frequency)
416#define STM32_LSE_DRIVING 0
417#define STM32_LSE_BYPASS DT_PROP(DT_NODELABEL(clk_lse), lse_bypass)
418#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_lse), st_stm32_lse_clock, okay)
419#define STM32_LSE_ENABLED 1
420#define STM32_LSE_FREQ DT_PROP(DT_NODELABEL(clk_lse), clock_frequency)
421#define STM32_LSE_DRIVING DT_PROP(DT_NODELABEL(clk_lse), driving_capability)
422#define STM32_LSE_BYPASS DT_PROP(DT_NODELABEL(clk_lse), lse_bypass)
423#else
424#define STM32_LSE_ENABLED 0
425#define STM32_LSE_FREQ 0
426#define STM32_LSE_DRIVING 0
427#define STM32_LSE_BYPASS 0
428#endif
429
430#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msi), st_stm32_msi_clock, okay) || \
431 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msi), st_stm32l0_msi_clock, okay)
432#define STM32_MSI_ENABLED 1
433#define STM32_MSI_RANGE DT_PROP(DT_NODELABEL(clk_msi), msi_range)
434#endif
435
436#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msi), st_stm32_msi_clock, okay)
437#define STM32_MSI_ENABLED 1
438#define STM32_MSI_PLL_MODE DT_PROP(DT_NODELABEL(clk_msi), msi_pll_mode)
439#endif
440
441#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msis), st_stm32u5_msi_clock, okay) || \
442 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msis), st_stm32u3_msi_clock, okay)
443#define STM32_MSIS_ENABLED 1
444#define STM32_MSIS_RANGE DT_PROP(DT_NODELABEL(clk_msis), msi_range)
445#define STM32_MSIS_PLL_MODE DT_PROP(DT_NODELABEL(clk_msis), msi_pll_mode)
446#else
447#define STM32_MSIS_ENABLED 0
448#define STM32_MSIS_RANGE 0
449#define STM32_MSIS_PLL_MODE 0
450#endif
451
452#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msik), st_stm32u5_msi_clock, okay) || \
453 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msik), st_stm32u3_msi_clock, okay)
454#define STM32_MSIK_ENABLED 1
455#define STM32_MSIK_RANGE DT_PROP(DT_NODELABEL(clk_msik), msi_range)
456#define STM32_MSIK_PLL_MODE DT_PROP(DT_NODELABEL(clk_msik), msi_pll_mode)
457#else
458#define STM32_MSIK_ENABLED 0
459#define STM32_MSIK_RANGE 0
460#define STM32_MSIK_PLL_MODE 0
461#endif
462
463#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_csi), fixed_clock, okay)
464#define STM32_CSI_ENABLED 1
465#define STM32_CSI_FREQ DT_PROP(DT_NODELABEL(clk_csi), clock_frequency)
466#else
467#define STM32_CSI_FREQ 0
468#endif
469
470#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_lsi), fixed_clock, okay)
471#define STM32_LSI_ENABLED 1
472#define STM32_LSI_FREQ DT_PROP(DT_NODELABEL(clk_lsi), clock_frequency)
473#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_lsi1), fixed_clock, okay)
474#define STM32_LSI_ENABLED 1
475#define STM32_LSI_FREQ DT_PROP(DT_NODELABEL(clk_lsi1), clock_frequency)
476#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_lsi2), fixed_clock, okay)
477#define STM32_LSI_ENABLED 1
478#define STM32_LSI_FREQ DT_PROP(DT_NODELABEL(clk_lsi2), clock_frequency)
479#else
480#define STM32_LSI_FREQ 0
481#endif
482
483#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi), fixed_clock, okay)
484#define STM32_HSI_DIV_ENABLED 0
485#define STM32_HSI_ENABLED 1
486#define STM32_HSI_FREQ DT_PROP(DT_NODELABEL(clk_hsi), clock_frequency)
487#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi), st_stm32h7_hsi_clock, okay) \
488 || DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi), st_stm32g0_hsi_clock, okay) \
489 || DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi), st_stm32c0_hsi_clock, okay) \
490 || DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi), st_stm32n6_hsi_clock, okay)
491#define STM32_HSI_DIV_ENABLED 1
492#define STM32_HSI_ENABLED 1
493#define STM32_HSI_DIVISOR DT_PROP(DT_NODELABEL(clk_hsi), hsi_div)
494#define STM32_HSI_FREQ DT_PROP(DT_NODELABEL(clk_hsi), clock_frequency)
495#else
496#define STM32_HSI_DIV_ENABLED 0
497#define STM32_HSI_DIVISOR 1
498#define STM32_HSI_FREQ 0
499#endif
500
501#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hse), fixed_clock, okay)
502#define STM32_HSE_ENABLED 1
503#define STM32_HSE_FREQ DT_PROP(DT_NODELABEL(clk_hse), clock_frequency)
504#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hse), st_stm32_hse_clock, okay)
505#define STM32_HSE_ENABLED 1
506#define STM32_HSE_BYPASS DT_PROP(DT_NODELABEL(clk_hse), hse_bypass)
507#define STM32_HSE_FREQ DT_PROP(DT_NODELABEL(clk_hse), clock_frequency)
508#define STM32_HSE_CSS DT_PROP(DT_NODELABEL(clk_hse), css_enabled)
509#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hse), st_stm32wl_hse_clock, okay)
510#define STM32_HSE_ENABLED 1
511#define STM32_HSE_TCXO DT_PROP(DT_NODELABEL(clk_hse), hse_tcxo)
512#define STM32_HSE_DIV2 DT_PROP(DT_NODELABEL(clk_hse), hse_div2)
513#define STM32_HSE_FREQ DT_PROP(DT_NODELABEL(clk_hse), clock_frequency)
514#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hse), st_stm32wba_hse_clock, okay)
515#define STM32_HSE_ENABLED 1
516#define STM32_HSE_DIV2 DT_PROP(DT_NODELABEL(clk_hse), hse_div2)
517#define STM32_HSE_FREQ DT_PROP(DT_NODELABEL(clk_hse), clock_frequency)
518#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hse), st_stm32n6_hse_clock, okay)
519#define STM32_HSE_ENABLED 1
520#define STM32_HSE_BYPASS DT_PROP(DT_NODELABEL(clk_hse), hse_bypass)
521#define STM32_HSE_DIV2 DT_PROP(DT_NODELABEL(clk_hse), hse_div2)
522#define STM32_HSE_FREQ DT_PROP(DT_NODELABEL(clk_hse), clock_frequency)
523#else
524#define STM32_HSE_FREQ 0
525#endif
526
527#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi48), fixed_clock, okay)
528#define STM32_HSI48_ENABLED 1
529#define STM32_HSI48_FREQ DT_PROP(DT_NODELABEL(clk_hsi48), clock_frequency)
530#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi48), st_stm32_hsi48_clock, okay)
531#define STM32_HSI48_ENABLED 1
532#define STM32_HSI48_FREQ DT_PROP(DT_NODELABEL(clk_hsi48), clock_frequency)
533#define STM32_HSI48_CRS_USB_SOF DT_PROP(DT_NODELABEL(clk_hsi48), crs_usb_sof)
534#endif
535
536#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(perck), st_stm32_clock_mux, okay)
537#define STM32_CKPER_ENABLED 1
538#endif
539
540#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(cpusw), st_stm32_clock_mux, okay)
541#define STM32_CPUSW_ENABLED 1
542#endif
543
544#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic1), st_stm32n6_ic_clock_mux, okay)
545#define STM32_IC1_ENABLED 1
546#define STM32_IC1_PLL_SRC DT_PROP(DT_NODELABEL(ic1), pll_src)
547#define STM32_IC1_DIV DT_PROP(DT_NODELABEL(ic1), ic_div)
548#endif
549
550#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic2), st_stm32n6_ic_clock_mux, okay)
551#define STM32_IC2_ENABLED 1
552#define STM32_IC2_PLL_SRC DT_PROP(DT_NODELABEL(ic2), pll_src)
553#define STM32_IC2_DIV DT_PROP(DT_NODELABEL(ic2), ic_div)
554#endif
555
556#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic3), st_stm32n6_ic_clock_mux, okay)
557#define STM32_IC3_ENABLED 1
558#define STM32_IC3_PLL_SRC DT_PROP(DT_NODELABEL(ic3), pll_src)
559#define STM32_IC3_DIV DT_PROP(DT_NODELABEL(ic3), ic_div)
560#endif
561
562#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic4), st_stm32n6_ic_clock_mux, okay)
563#define STM32_IC4_ENABLED 1
564#define STM32_IC4_PLL_SRC DT_PROP(DT_NODELABEL(ic4), pll_src)
565#define STM32_IC4_DIV DT_PROP(DT_NODELABEL(ic4), ic_div)
566#endif
567
568#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic5), st_stm32n6_ic_clock_mux, okay)
569#define STM32_IC5_ENABLED 1
570#define STM32_IC5_PLL_SRC DT_PROP(DT_NODELABEL(ic5), pll_src)
571#define STM32_IC5_DIV DT_PROP(DT_NODELABEL(ic5), ic_div)
572#endif
573
574#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic6), st_stm32n6_ic_clock_mux, okay)
575#define STM32_IC6_ENABLED 1
576#define STM32_IC6_PLL_SRC DT_PROP(DT_NODELABEL(ic6), pll_src)
577#define STM32_IC6_DIV DT_PROP(DT_NODELABEL(ic6), ic_div)
578#endif
579
580#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic7), st_stm32n6_ic_clock_mux, okay)
581#define STM32_IC7_ENABLED 1
582#define STM32_IC7_PLL_SRC DT_PROP(DT_NODELABEL(ic7), pll_src)
583#define STM32_IC7_DIV DT_PROP(DT_NODELABEL(ic7), ic_div)
584#endif
585
586#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic8), st_stm32n6_ic_clock_mux, okay)
587#define STM32_IC8_ENABLED 1
588#define STM32_IC8_PLL_SRC DT_PROP(DT_NODELABEL(ic8), pll_src)
589#define STM32_IC8_DIV DT_PROP(DT_NODELABEL(ic8), ic_div)
590#endif
591
592#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic9), st_stm32n6_ic_clock_mux, okay)
593#define STM32_IC9_ENABLED 1
594#define STM32_IC9_PLL_SRC DT_PROP(DT_NODELABEL(ic9), pll_src)
595#define STM32_IC9_DIV DT_PROP(DT_NODELABEL(ic9), ic_div)
596#endif
597
598#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic10), st_stm32n6_ic_clock_mux, okay)
599#define STM32_IC10_ENABLED 1
600#define STM32_IC10_PLL_SRC DT_PROP(DT_NODELABEL(ic10), pll_src)
601#define STM32_IC10_DIV DT_PROP(DT_NODELABEL(ic10), ic_div)
602#endif
603
604#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic11), st_stm32n6_ic_clock_mux, okay)
605#define STM32_IC11_ENABLED 1
606#define STM32_IC11_PLL_SRC DT_PROP(DT_NODELABEL(ic11), pll_src)
607#define STM32_IC11_DIV DT_PROP(DT_NODELABEL(ic11), ic_div)
608#endif
609
610#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic12), st_stm32n6_ic_clock_mux, okay)
611#define STM32_IC12_ENABLED 1
612#define STM32_IC12_PLL_SRC DT_PROP(DT_NODELABEL(ic12), pll_src)
613#define STM32_IC12_DIV DT_PROP(DT_NODELABEL(ic12), ic_div)
614#endif
615
616#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic13), st_stm32n6_ic_clock_mux, okay)
617#define STM32_IC13_ENABLED 1
618#define STM32_IC13_PLL_SRC DT_PROP(DT_NODELABEL(ic13), pll_src)
619#define STM32_IC13_DIV DT_PROP(DT_NODELABEL(ic13), ic_div)
620#endif
621
622#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic14), st_stm32n6_ic_clock_mux, okay)
623#define STM32_IC14_ENABLED 1
624#define STM32_IC14_PLL_SRC DT_PROP(DT_NODELABEL(ic14), pll_src)
625#define STM32_IC14_DIV DT_PROP(DT_NODELABEL(ic14), ic_div)
626#endif
627
628#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic15), st_stm32n6_ic_clock_mux, okay)
629#define STM32_IC15_ENABLED 1
630#define STM32_IC15_PLL_SRC DT_PROP(DT_NODELABEL(ic15), pll_src)
631#define STM32_IC15_DIV DT_PROP(DT_NODELABEL(ic15), ic_div)
632#endif
633
634#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic16), st_stm32n6_ic_clock_mux, okay)
635#define STM32_IC16_ENABLED 1
636#define STM32_IC16_PLL_SRC DT_PROP(DT_NODELABEL(ic16), pll_src)
637#define STM32_IC16_DIV DT_PROP(DT_NODELABEL(ic16), ic_div)
638#endif
639
640#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic17), st_stm32n6_ic_clock_mux, okay)
641#define STM32_IC17_ENABLED 1
642#define STM32_IC17_PLL_SRC DT_PROP(DT_NODELABEL(ic17), pll_src)
643#define STM32_IC17_DIV DT_PROP(DT_NODELABEL(ic17), ic_div)
644#endif
645
646#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic18), st_stm32n6_ic_clock_mux, okay)
647#define STM32_IC18_ENABLED 1
648#define STM32_IC18_PLL_SRC DT_PROP(DT_NODELABEL(ic18), pll_src)
649#define STM32_IC18_DIV DT_PROP(DT_NODELABEL(ic18), ic_div)
650#endif
651
652#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic19), st_stm32n6_ic_clock_mux, okay)
653#define STM32_IC19_ENABLED 1
654#define STM32_IC19_PLL_SRC DT_PROP(DT_NODELABEL(ic19), pll_src)
655#define STM32_IC19_DIV DT_PROP(DT_NODELABEL(ic19), ic_div)
656#endif
657
658#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ic20), st_stm32n6_ic_clock_mux, okay)
659#define STM32_IC20_ENABLED 1
660#define STM32_IC20_PLL_SRC DT_PROP(DT_NODELABEL(ic20), pll_src)
661#define STM32_IC20_DIV DT_PROP(DT_NODELABEL(ic20), ic_div)
662#endif
663
671
674#define STM32_CLOCK_INFO(clk_index, node_id) \
675 { \
676 .enr = DT_CLOCKS_CELL_BY_IDX(node_id, clk_index, bits), \
677 .bus = DT_CLOCKS_CELL_BY_IDX(node_id, clk_index, bus) & \
678 GENMASK(STM32_CLOCK_DIV_SHIFT - 1, 0), \
679 .div = DT_CLOCKS_CELL_BY_IDX(node_id, clk_index, bus) >> \
680 STM32_CLOCK_DIV_SHIFT, \
681 }
682#define STM32_DT_CLOCKS(node_id) \
683 { \
684 LISTIFY(DT_NUM_CLOCKS(node_id), \
685 STM32_CLOCK_INFO, (,), node_id) \
686 }
687
688#define STM32_DT_INST_CLOCKS(inst) \
689 STM32_DT_CLOCKS(DT_DRV_INST(inst))
690
691#define STM32_DOMAIN_CLOCK_INST_SUPPORT(inst) DT_INST_CLOCKS_HAS_IDX(inst, 1) ||
692#define STM32_DT_INST_DEV_DOMAIN_CLOCK_SUPPORT \
693 (DT_INST_FOREACH_STATUS_OKAY(STM32_DOMAIN_CLOCK_INST_SUPPORT) 0)
694
695#define STM32_DOMAIN_CLOCK_SUPPORT(id) DT_CLOCKS_HAS_IDX(DT_NODELABEL(id), 1) ||
696#define STM32_DT_DEV_DOMAIN_CLOCK_SUPPORT \
697 (DT_FOREACH_STATUS_OKAY(STM32_DOMAIN_CLOCK_SUPPORT) 0)
698
706#define STM32_DT_CLKSEL_REG_GET(clock) \
707 (((clock) >> STM32_DT_CLKSEL_REG_SHIFT) & STM32_DT_CLKSEL_REG_MASK)
708
714#define STM32_DT_CLKSEL_SHIFT_GET(clock) \
715 (((clock) >> STM32_DT_CLKSEL_SHIFT_SHIFT) & STM32_DT_CLKSEL_SHIFT_MASK)
716
722#define STM32_DT_CLKSEL_MASK_GET(clock) \
723 (((clock) >> STM32_DT_CLKSEL_MASK_SHIFT) & STM32_DT_CLKSEL_MASK_MASK)
724
730#define STM32_DT_CLKSEL_VAL_GET(clock) \
731 (((clock) >> STM32_DT_CLKSEL_VAL_SHIFT) & STM32_DT_CLKSEL_VAL_MASK)
732
733#if defined(STM32_HSE_CSS)
742void stm32_hse_css_callback(void);
743#endif
744
745#ifdef CONFIG_SOC_SERIES_STM32WB0X
750typedef void (*lsi_update_cb_t)(uint32_t new_lsi_frequency);
751
763int stm32wb0_register_lsi_update_callback(lsi_update_cb_t cb);
764#endif /* CONFIG_SOC_SERIES_STM32WB0X */
765
766#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_STM32_CLOCK_CONTROL_H_ */
clock_control.h
Public Clock Control APIs.
uint32_t
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
stm32_clock.h
STM32_CLOCK_DIV_SHIFT
#define STM32_CLOCK_DIV_SHIFT
Definition stm32_clock.h:27
stm32c0_clock.h
stm32f0_clock.h
stm32f10x_clock.h
stm32f1_clock.h
stm32f3_clock.h
stm32f410_clock.h
stm32f4_clock.h
stm32f7_clock.h
stm32g0_clock.h
stm32g4_clock.h
stm32h5_clock.h
stm32h7_clock.h
stm32h7rs_clock.h
stm32l0_clock.h
stm32l1_clock.h
stm32l4_clock.h
stm32mp13_clock.h
stm32mp2_clock.h
stm32n6_clock.h
stm32u0_clock.h
stm32u3_clock.h
stm32u5_clock.h
stm32wb0_clock.h
stm32wb_clock.h
stm32wba_clock.h
stm32wl_clock.h
stm32_pclken
Driver structure definition.
Definition stm32_clock_control.h:666
stm32_pclken::div
uint32_t div
Definition stm32_clock_control.h:668
stm32_pclken::bus
uint32_t bus
Definition stm32_clock_control.h:667
stm32_pclken::enr
uint32_t enr
Definition stm32_clock_control.h:669