| Zephyr Project API 4.2.99
    A Scalable Open Source RTOS | 
#include "stm32_common_clocks.h"Go to the source code of this file.
| Macros | |
| #define | STM32_CLOCK_BUS_AHB1 0x01c | 
| Bus gatting clocks. | |
| #define | STM32_CLOCK_BUS_APB2 0x020 | 
| #define | STM32_CLOCK_BUS_APB1 0x024 | 
| #define | STM32_PERIPH_BUS_MIN STM32_CLOCK_BUS_AHB1 | 
| #define | STM32_PERIPH_BUS_MAX STM32_CLOCK_BUS_APB1 | 
| #define | STM32_SRC_HSE (STM32_SRC_LSI + 1) | 
| Domain clocks. | |
| #define | STM32_SRC_HSI (STM32_SRC_HSE + 1) | 
| #define | STM32_SRC_TIMPCLK1 (STM32_SRC_HSI + 1) | 
| Bus clock. | |
| #define | STM32_SRC_TIMPCLK2 (STM32_SRC_TIMPCLK1 + 1) | 
| #define | CSR_REG 0x34 | 
| RCC_CSR register offset. | |
| #define | RTC_SEL(val) STM32_DT_CLOCK_SELECT((val), 17, 16, CSR_REG) | 
| #define CSR_REG 0x34 | 
RCC_CSR register offset.
| #define RTC_SEL | ( | val | ) | STM32_DT_CLOCK_SELECT((val), 17, 16, CSR_REG) | 
| #define STM32_CLOCK_BUS_AHB1 0x01c | 
Bus gatting clocks.
| #define STM32_CLOCK_BUS_APB1 0x024 | 
| #define STM32_CLOCK_BUS_APB2 0x020 | 
| #define STM32_PERIPH_BUS_MAX STM32_CLOCK_BUS_APB1 | 
| #define STM32_PERIPH_BUS_MIN STM32_CLOCK_BUS_AHB1 | 
| #define STM32_SRC_HSE (STM32_SRC_LSI + 1) | 
Domain clocks.
System clock Fixed clocks 
 
| #define STM32_SRC_HSI (STM32_SRC_HSE + 1) | 
| #define STM32_SRC_TIMPCLK1 (STM32_SRC_HSI + 1) | 
Bus clock.
| #define STM32_SRC_TIMPCLK2 (STM32_SRC_TIMPCLK1 + 1) |