stm32l0_clock.h File Reference

#include "stm32_common_clocks.h"

Go to the source code of this file.

Macros
#define	STM32_CLOCK_BUS_IOP   0x02c
	Bus gatting clocks.
#define	STM32_CLOCK_BUS_AHB1   0x030
#define	STM32_CLOCK_BUS_APB2   0x034
#define	STM32_CLOCK_BUS_APB1   0x038
#define	STM32_PERIPH_BUS_MIN   STM32_CLOCK_BUS_IOP
#define	STM32_PERIPH_BUS_MAX   STM32_CLOCK_BUS_APB1
#define	STM32_SRC_HSE   (STM32_SRC_LSI + 1)
	Domain clocks.
#define	STM32_SRC_HSI   (STM32_SRC_HSE + 1)
#define	STM32_SRC_HSI48   (STM32_SRC_HSI + 1)
#define	STM32_SRC_PCLK   (STM32_SRC_HSI48 + 1)
	Bus clock.
#define	CCIPR_REG   0x4C
	RCC_CCIPR register offset.
#define	CSR_REG   0x50
	RCC_CSR register offset.
#define	USART1_SEL(val)   STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR_REG)
	Device domain clocks selection helpers.
#define	USART2_SEL(val)   STM32_DT_CLOCK_SELECT((val), 3, 2, CCIPR_REG)
#define	LPUART1_SEL(val)   STM32_DT_CLOCK_SELECT((val), 3, 10, CCIPR_REG)
#define	I2C1_SEL(val)   STM32_DT_CLOCK_SELECT((val), 3, 12, CCIPR_REG)
#define	I2C3_SEL(val)   STM32_DT_CLOCK_SELECT((val), 3, 16, CCIPR_REG)
#define	LPTIM1_SEL(val)   STM32_DT_CLOCK_SELECT((val), 3, 18, CCIPR_REG)
#define	HSI48_SEL(val)   STM32_DT_CLOCK_SELECT((val), 1, 26, CCIPR_REG)
#define	RTC_SEL(val)   STM32_DT_CLOCK_SELECT((val), 3, 16, CSR_REG)
	CSR devices.

Macro Definition Documentation

CCIPR_REG

#define CCIPR_REG   0x4C

RCC_CCIPR register offset.

CSR_REG

#define CSR_REG   0x50

RCC_CSR register offset.

HSI48_SEL

#define HSI48_SEL

(

val

)

STM32_DT_CLOCK_SELECT((val), 1, 26, CCIPR_REG)

I2C1_SEL

#define I2C1_SEL

(

val

)

STM32_DT_CLOCK_SELECT((val), 3, 12, CCIPR_REG)

I2C3_SEL

#define I2C3_SEL

(

val

)

STM32_DT_CLOCK_SELECT((val), 3, 16, CCIPR_REG)

LPTIM1_SEL

#define LPTIM1_SEL

(

val

)

STM32_DT_CLOCK_SELECT((val), 3, 18, CCIPR_REG)

LPUART1_SEL

#define LPUART1_SEL

(

val

)

STM32_DT_CLOCK_SELECT((val), 3, 10, CCIPR_REG)

RTC_SEL

#define RTC_SEL

(

val

)

STM32_DT_CLOCK_SELECT((val), 3, 16, CSR_REG)

CSR devices.

STM32_CLOCK_BUS_AHB1

#define STM32_CLOCK_BUS_AHB1   0x030

STM32_CLOCK_BUS_APB1

#define STM32_CLOCK_BUS_APB1   0x038

STM32_CLOCK_BUS_APB2

#define STM32_CLOCK_BUS_APB2   0x034

STM32_CLOCK_BUS_IOP

#define STM32_CLOCK_BUS_IOP   0x02c

Bus gatting clocks.

STM32_PERIPH_BUS_MAX

#define STM32_PERIPH_BUS_MAX   STM32_CLOCK_BUS_APB1

STM32_PERIPH_BUS_MIN

#define STM32_PERIPH_BUS_MIN   STM32_CLOCK_BUS_IOP

STM32_SRC_HSE

#define STM32_SRC_HSE   (STM32_SRC_LSI + 1)

Domain clocks.

System clock Fixed clocks

STM32_SRC_HSI

#define STM32_SRC_HSI   (STM32_SRC_HSE + 1)

STM32_SRC_HSI48

#define STM32_SRC_HSI48   (STM32_SRC_HSI + 1)

STM32_SRC_PCLK

#define STM32_SRC_PCLK   (STM32_SRC_HSI48 + 1)

Bus clock.

USART1_SEL

#define USART1_SEL

(

val

)

STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR_REG)

Device domain clocks selection helpers.

CCIPR devices

USART2_SEL

#define USART2_SEL

(

val

)

STM32_DT_CLOCK_SELECT((val), 3, 2, CCIPR_REG)