mspi_cadence_timing_cfg Struct Reference

Timing configuration for the TI K3 MSPI peripheral. More...

#include <mspi_cadence.h>

Data Fields
uint8_t	rd_delay
	Amount of read data capture cycles that are applied to internal data capture circuit.

Detailed Description

Timing configuration for the TI K3 MSPI peripheral.

Field Documentation

rd_delay

uint8_t mspi_cadence_timing_cfg::rd_delay

Amount of read data capture cycles that are applied to internal data capture circuit.

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The documentation for this struct was generated from the following file:

• include/zephyr/drivers/mspi/mspi_cadence.h